ramips: fix pci/pcie related dtc warnings

Add the ranges property to the PCI bridges where missing. Add the unit
address to PCI bridge where missing.

Rework the complete rt3883 pci node. Drop the PCI unit nodes from the
dtsi. They are not used by any dts file and should be rather in the dts
than in the SoC dtsi. Express the PCI-PCI bridge in a clean devicetree
syntax. The ralink,pci-slot isn't used by any driver, drop it. Move the
pci interrupt controller out of the pci node. It doesn't share the same
reg and therefore should be an independent/SoC child node.

Move the pci related rt3883 pinctrl setting to the dtsi instead of
defining the very same for each rt3883 board.

If the device_type property is used for PCI units, the unit is treated
as pci bridge which it isn't. Drop it for PCI units.

Reference pci-bridges or the pci node defined in the dtsi instead of
recreating the whole node hierarchy. It allows to change the referenced
node in the dtsi without the need to touch all dts.

Fix the PCI(e) wireless unit addresses. All our PCI(e) wireless chips
are the first device on the bus. The unit address has to be the bus
address instead of the PCI vendor/device id.

Signed-off-by: Mathias Kresin <dev@kresin.me>
master
Mathias Kresin 2018-07-21 16:19:46 +02:00
parent d8e7a526a3
commit f9b8328d79
66 changed files with 573 additions and 682 deletions

View File

@ -110,18 +110,17 @@
&pcie {
status = "okay";
};
pcie-bridge {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
led {
led-sources = <2>;
led-active-low;
};
led {
led-sources = <2>;
led-active-low;
};
};
};

View File

@ -171,12 +171,11 @@
&pcie {
status = "okay";
};
pcie-bridge {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&radio 0x8000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&radio 0x8000>;
};
};

View File

@ -142,12 +142,11 @@
&pcie {
status = "okay";
};
pcie-bridge {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&radio 32768>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&radio 32768>;
};
};

View File

@ -178,15 +178,14 @@
&pcie {
status = "okay";
};
pcie-bridge {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&radio 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
mtd-mac-address = <&rom 0xf100>;
mtd-mac-address-increment = <(-1)>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&radio 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
mtd-mac-address = <&rom 0xf100>;
mtd-mac-address-increment = <(-1)>;
};
};

View File

@ -91,15 +91,14 @@
&pcie {
status = "okay";
};
pcie-bridge {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x28000>;
ieee80211-freq-limit = <5000000 6000000>;
mtd-mac-address = <&factory 0xf100>;
mtd-mac-address-increment = <(-1)>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x28000>;
ieee80211-freq-limit = <5000000 6000000>;
mtd-mac-address = <&factory 0xf100>;
mtd-mac-address-increment = <(-1)>;
};
};

View File

@ -177,15 +177,14 @@
&pcie {
status = "okay";
};
pcie-bridge {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&radio 32768>;
ieee80211-freq-limit = <5000000 6000000>;
mtd-mac-address = <&rom 0xf100>;
mtd-mac-address-increment = <(-1)>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&radio 32768>;
ieee80211-freq-limit = <5000000 6000000>;
mtd-mac-address = <&rom 0xf100>;
mtd-mac-address-increment = <(-1)>;
};
};

View File

@ -84,15 +84,14 @@
&pcie {
status = "okay";
};
pcie-bridge {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x28000>;
ieee80211-freq-limit = <5000000 6000000>;
mtd-mac-address = <&factory 0xf100>;
mtd-mac-address-increment = <(-1)>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x28000>;
ieee80211-freq-limit = <5000000 6000000>;
mtd-mac-address = <&factory 0xf100>;
mtd-mac-address-increment = <(-1)>;
};
};

View File

@ -187,12 +187,11 @@
&pcie {
status = "okay";
};
pcie-bridge {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&radio 32768>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&radio 32768>;
};
};

View File

@ -150,27 +150,16 @@
&pci {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pci_pins>;
};
pci_pins: pci {
pci {
ralink,group = "pci";
ralink,function = "pci-fnc";
};
};
&pci1 {
status = "okay";
host-bridge {
pci-bridge@1 {
status = "okay";
wifi@0,0 {
compatible = "pci0,0";
reg = <0x10000 0 0 0 0>;
ralink,5ghz = <0>;
ralink,mtd-eeprom = <&factory 0x8000>;
};
};
wifi@0,0 {
compatible = "pci0,0";
reg = <0x10000 0 0 0 0>;
ralink,5ghz = <0>;
ralink,mtd-eeprom = <&factory 0x8000>;
};
};

View File

@ -118,27 +118,16 @@
&pci {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pci_pins>;
};
pci_pins: pci {
pci {
ralink,group = "pci";
ralink,function = "pci-fnc";
};
};
&pci1 {
status = "okay";
host-bridge {
pci-bridge@1 {
status = "okay";
wifi@0,0 {
compatible = "pci0,0";
reg = <0x10000 0 0 0 0>;
ralink,5ghz = <0>;
ralink,mtd-eeprom = <&factory 0x2000>;
};
};
wifi@0,0 {
compatible = "pci0,0";
reg = <0x10000 0 0 0 0>;
ralink,5ghz = <0>;
ralink,mtd-eeprom = <&factory 0x2000>;
};
};

View File

@ -116,23 +116,21 @@
&pcie {
status = "okay";
};
pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&radio 0x2000>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&radio 0x2000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
pcie1 {
mt76@1,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&radio 0>;
ieee80211-freq-limit = <2400000 2500000>;
};
&pcie1 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&radio 0>;
ieee80211-freq-limit = <2400000 2500000>;
};
};

View File

@ -98,23 +98,21 @@
&pcie {
status = "okay";
};
pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
pcie1 {
mt76@1,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
&pcie1 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
};

View File

@ -137,14 +137,13 @@
&pcie {
status = "okay";
};
pcie-bridge {
mt76@0,0 {
reg = <0x0000 0 0 0 0 >;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0 >;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};

View File

@ -15,10 +15,6 @@
led-status = &led_wired_blue;
};
pci@440000 {
status = "ok";
};
cfi@1f000000 {
compatible = "cfi-flash";
reg = <0xbc400000 0x800000>;
@ -209,6 +205,10 @@
};
};
&pci {
status = "okay";
};
&wmac {
status = "okay";
ralink,mtd-eeprom = <&factory 0x0>;

View File

@ -93,23 +93,21 @@
&pcie {
status = "okay";
};
pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
pcie1 {
mt76@1,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
&pcie1 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
};

View File

@ -136,13 +136,12 @@
&pcie {
status = "okay";
};
pcie-bridge {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
};
};

View File

@ -122,23 +122,21 @@
&pcie {
status = "okay";
};
pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
};
pcie1 {
mt76@1,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie1 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};

View File

@ -122,14 +122,13 @@
&pcie {
status = "okay";
};
pcie-bridge {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};

View File

@ -99,13 +99,12 @@
&pcie {
status = "okay";
};
pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x0>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0>;
};
};

View File

@ -89,12 +89,12 @@
&pcie {
status = "okay";
pcie-bridge {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&art 0x1000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&art 0x1000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};

View File

@ -167,23 +167,23 @@
&pcie {
status = "okay";
};
pcie0 {
wifi@14c3,7603 {
compatible = "pci14c3,7603";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
&pcie0 {
wifi@0,0 {
compatible = "pci14c3,7603";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
};
pcie1 {
wifi@14c3,7662 {
compatible = "pci14c3,7662";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie1 {
wifi@0,0 {
compatible = "pci14c3,7662";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};

View File

@ -135,14 +135,13 @@
&pcie {
status = "okay";
};
pcie-bridge {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};

View File

@ -121,12 +121,11 @@
&pcie {
status = "okay";
};
pcie-bridge {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
};
};

View File

@ -142,12 +142,11 @@
&pcie {
status = "okay";
};
pcie-bridge {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
};
};

View File

@ -117,22 +117,20 @@
&pcie {
status = "okay";
};
pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
pcie1 {
mt76@1,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x0000>;
};
&pcie1 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
};
};

View File

@ -130,22 +130,20 @@
&pcie {
status = "okay";
};
pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
pcie1 {
mt76@1,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x0000>;
};
&pcie1 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
};
};

View File

@ -149,22 +149,20 @@
&pcie {
status = "okay";
};
pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
pcie1 {
mt76@1,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x0000>;
};
&pcie1 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
};
};

View File

@ -102,14 +102,13 @@
&pcie {
status = "okay";
};
pcie-bridge {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};

View File

@ -61,14 +61,13 @@
&pcie {
status = "okay";
};
pcie-bridge {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};

View File

@ -128,23 +128,21 @@
&pcie {
status = "okay";
};
pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
pcie1 {
mt76@1,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
&pcie1 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
};

View File

@ -131,26 +131,24 @@
&pcie {
status = "okay";
};
pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&radio 0>;
mtd-mac-address = <&config 0x10008>;
mtd-mac-address-increment = <1>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&radio 0>;
mtd-mac-address = <&config 0x10008>;
mtd-mac-address-increment = <1>;
};
};
pcie1 {
mt76@1,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&radio 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
mtd-mac-address = <&config 0x10008>;
mtd-mac-address-increment = <2>;
};
&pcie1 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&radio 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
mtd-mac-address = <&config 0x10008>;
mtd-mac-address-increment = <2>;
};
};

View File

@ -103,23 +103,21 @@
&pcie {
status = "okay";
};
pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
pcie1 {
mt76@1,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <2400000 2500000>;
};
&pcie1 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <2400000 2500000>;
};
};

View File

@ -163,13 +163,13 @@
&pcie {
status = "okay";
};
pcie-bridge {
wifi@1814,5592 {
compatible = "pci1814,5592";
reg = <0x0000 0 0 0 0>;
ralink,2ghz = <0>;
ralink,mtd-eeprom = <&factory 0x8000>;
};
&pcie0 {
wifi@1814,5592 {
compatible = "pci1814,5592";
reg = <0x0000 0 0 0 0>;
ralink,2ghz = <0>;
ralink,mtd-eeprom = <&factory 0x8000>;
};
};

View File

@ -118,26 +118,15 @@
&pci {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pci_pins>;
};
pci_pins: pci {
pci {
ralink,group = "pci";
ralink,function = "pci-fnc";
};
};
&pci1 {
status = "okay";
host-bridge {
pci-bridge@1 {
status = "okay";
wifi@1814,3091 {
compatible = "pci1814,3091";
reg = <0x10000 0 0 0 0>;
ralink,mtd-eeprom = <&factory 0x8000>;
};
};
wifi@0,0 {
compatible = "pci1814,3091";
reg = <0x10000 0 0 0 0>;
ralink,mtd-eeprom = <&factory 0x8000>;
};
};

View File

@ -95,23 +95,21 @@
&pcie {
status = "okay";
};
pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
pcie1 {
mt76@1,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
&pcie1 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
};

View File

@ -91,22 +91,20 @@
&pcie {
status = "okay";
};
pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
pcie1 {
mt76@1,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x0000>;
};
&pcie1 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
};
};

View File

@ -124,26 +124,15 @@
&pci {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pci_pins>;
};
pci_pins: pci {
pci {
ralink,group = "pci";
ralink,function = "pci-fnc";
};
};
&pci1 {
status = "okay";
host-bridge {
pci-bridge@1 {
status = "okay";
wifi@0,0 {
compatible = "pci0,0";
reg = < 0x10000 0 0 0 0 >;
ralink,2ghz = <0>;
};
};
wifi@0,0 {
compatible = "pci0,0";
reg = < 0x10000 0 0 0 0 >;
ralink,2ghz = <0>;
};
};

View File

@ -98,15 +98,14 @@
&pcie {
status = "okay";
};
pcie-bridge {
mt76@1,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x28000>;
ieee80211-freq-limit = <5000000 6000000>;
mtd-mac-address = <&factory 0xf100>;
mtd-mac-address-increment = <(-1)>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x28000>;
ieee80211-freq-limit = <5000000 6000000>;
mtd-mac-address = <&factory 0xf100>;
mtd-mac-address-increment = <(-1)>;
};
};

View File

@ -13,16 +13,6 @@
led-status = &led_status;
};
pci@440000 {
status = "okay";
host-bridge {
pci-bridge@1 {
status = "okay";
};
};
};
nor-flash@1c000000 {
compatible = "cfi-flash";
reg = <0x1c000000 0x800000>;
@ -85,6 +75,10 @@
status = "okay";
};
&pci {
status = "okay";
};
&wmac {
ralink,mtd-eeprom = <&factory 0>;
};

View File

@ -72,22 +72,22 @@
&pcie {
status = "okay";
};
pcie0 {
wifi@14c3,7603 {
compatible = "pci14c3,7603";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
};
&pcie0 {
wifi@0,0 {
compatible = "pci14c3,7603";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
};
};
pcie1 {
wifi@14c3,7662 {
compatible = "pci14c3,7662";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie1 {
wifi@0,0 {
compatible = "pci14c3,7662";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};

View File

@ -99,13 +99,13 @@
&pcie {
status = "okay";
pcie-bridge {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};

View File

@ -113,12 +113,13 @@
&pcie {
status = "okay";
pcie-bridge {
wifi@14c3,7662 {
compatible = "pci14c3,7662";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
&pcie0 {
wifi@14c3,7662 {
compatible = "pci14c3,7662";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};

View File

@ -85,23 +85,21 @@
&pcie {
status = "okay";
};
pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
pcie1 {
mt76@1,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
&pcie1 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
};

View File

@ -164,13 +164,13 @@
&pcie {
status = "okay";
};
pcie-bridge {
wifi@0,0 {
compatible = "pci0,0";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie0 {
wifi@0,0 {
compatible = "pci0,0";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};

View File

@ -151,12 +151,12 @@
&pcie {
status = "okay";
};
pcie-bridge {
wifi@1814,5592 {
compatible = "pci1814,5592";
reg = <0x0000 0 0 0 0>;
ralink,mtd-eeprom = <&factory 0x8000>;
};
&pcie0 {
wifi@1814,5592 {
compatible = "pci1814,5592";
reg = <0x0000 0 0 0 0>;
ralink,mtd-eeprom = <&factory 0x8000>;
};
};

View File

@ -79,25 +79,23 @@
&pcie {
status = "okay";
};
pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
mtd-mac-address = <&factory 0xe000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
mtd-mac-address = <&factory 0xe000>;
};
};
pcie1 {
mt76@1,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
mtd-mac-address = <&factory 0xe000>;
};
&pcie1 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
mtd-mac-address = <&factory 0xe000>;
};
};

View File

@ -72,13 +72,13 @@
&pcie {
status = "okay";
pcie-bridge {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};

View File

@ -153,26 +153,15 @@
&pci {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pci_pins>;
};
pci_pins: pci {
pci {
ralink,group = "pci";
ralink,function = "pci-fnc";
};
};
&pci1 {
status = "okay";
host-bridge {
pci-bridge@1 {
status = "okay";
wifi@1814,3091 {
compatible = "pci1814,3091";
reg = <0x10000 0 0 0 0>;
ralink,mtd-eeprom = <&factory 0x8000>;
};
};
wifi@0,0 {
compatible = "pci1814,3091";
reg = <0x10000 0 0 0 0>;
ralink,mtd-eeprom = <&factory 0x8000>;
};
};

View File

@ -145,22 +145,20 @@
&pcie {
status = "okay";
};
pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&iNIC_rf 0x0>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&iNIC_rf 0x0>;
};
};
pcie1 {
mt76@1,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&Factory 0x0>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie1 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&Factory 0x0>;
ieee80211-freq-limit = <5000000 6000000>;
};
};

View File

@ -145,13 +145,12 @@
&pcie {
status = "okay";
};
pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&Factory 0x0>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&Factory 0x0>;
};
};

View File

@ -111,22 +111,20 @@
&pcie {
status = "okay";
};
pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
pcie1 {
mt76@1,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x0000>;
};
&pcie1 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
};
};

View File

@ -105,26 +105,24 @@
&pcie {
status = "okay";
};
pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x0000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
};
};
pcie1 {
mt76@1,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
&pcie1 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
led {
led-sources = <2>;
led-active-low;
};
led {
led-sources = <2>;
led-active-low;
};
};
};

View File

@ -170,22 +170,20 @@
&pcie {
status = "okay";
};
pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
pcie1 {
mt76@1,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x0000>;
};
&pcie1 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
};
};

View File

@ -165,21 +165,19 @@
&pcie {
status = "okay";
};
pcie0 {
rt5592@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
ralink,mtd-eeprom = <&factory 0x8000>;
};
&pcie0 {
rt5592@0,0 {
reg = <0x0000 0 0 0 0>;
ralink,mtd-eeprom = <&factory 0x8000>;
};
};
pcie1 {
mt76@1,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x0000>;
};
&pcie1 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
};
};

View File

@ -15,10 +15,6 @@
led-status = &led_router;
};
pci@440000 {
status = "ok";
};
cfi@1f000000 {
compatible = "cfi-flash";
reg = <0x1f000000 0x800000>;
@ -138,6 +134,10 @@
};
};
&pci {
status = "okay";
};
&wmac {
ralink,mtd-eeprom = <&factory 0>;
};

View File

@ -81,14 +81,13 @@
&pcie {
status = "okay";
};
pcie-bridge {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};

View File

@ -121,14 +121,13 @@
&pcie {
status = "okay";
};
pcie-bridge {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};

View File

@ -83,23 +83,21 @@
&pcie {
status = "okay";
};
pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
pcie1 {
mt76@1,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
&pcie1 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
};

View File

@ -80,26 +80,26 @@
&pcie {
status = "okay";
};
pcie0 {
wifi@14c3,7662 {
compatible = "pci14c3,7662";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
&pcie0 {
wifi@0,0 {
compatible = "pci14c3,7662";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
led {
led-sources = <2>;
};
led {
led-sources = <2>;
};
};
};
pcie1 {
wifi@14c3,7603 {
compatible = "pci14c3,7603";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
};
&pcie1 {
wifi@0,0 {
compatible = "pci14c3,7603";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
};
};

View File

@ -93,23 +93,21 @@
&pcie {
status = "okay";
};
pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
pcie1 {
mt76@1,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
&pcie1 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
};

View File

@ -89,22 +89,22 @@
&pcie {
status = "okay";
};
pcie0 {
wifi@14c3,7603 {
compatible = "pci14c3,7603";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
};
&pcie0 {
wifi@0,0 {
compatible = "pci14c3,7603";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
};
};
pcie1 {
wifi@14c3,7662 {
compatible = "pci14c3,7662";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
&pcie1 {
wifi@0,0 {
compatible = "pci14c3,7662";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};

View File

@ -188,15 +188,14 @@
&pcie {
status = "okay";
};
pcie-bridge {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
mtd-mac-address = <&factory 0x8004>;
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
mtd-mac-address = <&factory 0x8004>;
};
};

View File

@ -555,13 +555,15 @@
status = "disabled";
pcie-bridge {
pcie0: pcie@0,0 {
reg = <0x0000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
ranges;
};
};

View File

@ -459,25 +459,31 @@
clocks = <&clkctrl 24 &clkctrl 25 &clkctrl 26>;
clock-names = "pcie0", "pcie1", "pcie2";
pcie0 {
pcie0: pcie@0,0 {
reg = <0x0000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
pcie1 {
pcie1: pcie@1,0 {
reg = <0x0800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
pcie2 {
pcie2: pcie@2,0 {
reg = <0x1000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
};
};
};

View File

@ -473,13 +473,15 @@
0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
>;
pcie-bridge {
pcie0: pcie@0,0 {
reg = <0x0000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
ranges;
};
};

View File

@ -306,6 +306,13 @@
ralink,function = "uartlite";
};
};
pci_pins: pci {
pci {
ralink,group = "pci";
ralink,function = "pci-fnc";
};
};
};
ethernet: ethernet@10100000 {
@ -350,6 +357,9 @@
#size-cells = <1>;
ranges; /* direct mapping */
pinctrl-names = "default";
pinctrl-0 = <&pci_pins>;
status = "disabled";
pciintc: interrupt-controller {
@ -361,7 +371,7 @@
interrupts = <4>;
};
host-bridge {
pci@0 {
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
@ -388,7 +398,7 @@
0x9000 0 0 4 &pciintc 19
>;
pci-bridge@1 {
pci1: pci@1 {
reg = <0x0800 0 0 0 0>;
device_type = "pci";
#interrupt-cells = <1>;
@ -397,33 +407,28 @@
status = "disabled";
ralink,pci-slot = <1>;
interrupt-map-mask = <0x0 0 0 0>;
interrupt-map = <0x0 0 0 0 &pciintc 20>;
bus-range = <1 255>;
ranges;
};
pci-slot@17 {
pci17: pci@11,0 {
reg = <0x8800 0 0 0 0>;
device_type = "pci";
#interrupt-cells = <1>;
#address-cells = <3>;
#size-cells = <2>;
ralink,pci-slot = <17>;
status = "disabled";
};
pci-slot@18 {
pci18: pci@12,0 {
reg = <0x9000 0 0 0 0>;
device_type = "pci";
#interrupt-cells = <1>;
#address-cells = <3>;
#size-cells = <2>;
ralink,pci-slot = <18>;
status = "disabled";
};
};