mirror of https://github.com/hak5/openwrt-owl.git
parent
783bb0e81c
commit
f086a123c9
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@ -1,323 +1,205 @@
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
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*
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* Copyright (C) 2006 infineon
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* Copyright (C) 2007 John Crispin <blogic@openwrt.org>
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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* Copyright (C) 2008 John Crispin <blogic@openwrt.org>
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* Based on EP93xx wdt driver
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*/
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#include <asm/uaccess.h>
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#include <linux/errno.h>
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#include <linux/proc_fs.h>
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#include <linux/ioctl.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/watchdog.h>
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#include <linux/fs.h>
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#include <linux/miscdevice.h>
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#include <asm-mips/ifxmips/ifxmips_wdt.h>
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#include <linux/miscdevice.h>
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#include <linux/watchdog.h>
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#include <linux/platform_device.h>
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#include <asm/uaccess.h>
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#include <asm-mips/ifxmips/ifxmips_cgu.h>
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#include <asm-mips/ifxmips/ifxmips.h>
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#define DRVNAME "ifxmips_wdt"
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#define IFXMIPS_WDT_PW1 0x00BE0000
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#define IFXMIPS_WDT_PW2 0x00DC0000
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// TODO remove magic numbers and weirdo macros
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extern unsigned int ifxmips_get_fpi_hz (void);
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#ifndef CONFIG_WATCHDOG_NOWAYOUT
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static int wdt_ok_to_close = 0;
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#endif
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static int ifxmips_wdt_inuse = 0;
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int wdt_timeout = 30;
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int
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ifxmips_wdt_enable (unsigned int timeout)
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ifxmips_wdt_enable(unsigned int timeout)
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{
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unsigned int wdt_cr = 0;
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unsigned int wdt_reload = 0;
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unsigned int wdt_clkdiv, wdt_pwl, ffpi;
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int retval = 0;
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/* clock divider & prewarning limit */
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wdt_clkdiv = 1 << (7 * IFXMIPS_BIU_WDT_CR_CLKDIV_GET(ifxmips_r32(IFXMIPS_BIU_WDT_CR)));
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wdt_pwl = 0x8000 >> IFXMIPS_BIU_WDT_CR_PWL_GET(ifxmips_r32(IFXMIPS_BIU_WDT_CR));
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ffpi = cgu_get_io_region_clock();
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printk("cpu clock = %d\n", ffpi);
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/* caculate reload value */
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wdt_reload = (timeout * (ffpi / wdt_clkdiv)) + wdt_pwl;
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printk(KERN_WARNING DRVNAME ": wdt_pwl=0x%x, wdt_clkdiv=%d, ffpi=%d, wdt_reload = 0x%x\n",
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wdt_pwl, wdt_clkdiv, ffpi, wdt_reload);
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if (wdt_reload > 0xFFFF)
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{
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printk(KERN_WARNING DRVNAME ": timeout too large %d\n", timeout);
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retval = -EINVAL;
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goto out;
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}
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/* Write first part of password access */
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ifxmips_w32(IFXMIPS_BIU_WDT_CR_PW_SET(IFXMIPS_WDT_PW1), IFXMIPS_BIU_WDT_CR);
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wdt_cr = ifxmips_r32(IFXMIPS_BIU_WDT_CR);
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wdt_cr &= (!IFXMIPS_BIU_WDT_CR_PW_SET(0xff) &
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!IFXMIPS_BIU_WDT_CR_PWL_SET(0x3) &
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!IFXMIPS_BIU_WDT_CR_CLKDIV_SET(0x3) &
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!IFXMIPS_BIU_WDT_CR_RELOAD_SET(0xffff));
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wdt_cr |= (IFXMIPS_BIU_WDT_CR_PW_SET(IFXMIPS_WDT_PW2) |
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IFXMIPS_BIU_WDT_CR_PWL_SET(IFXMIPS_BIU_WDT_CR_PWL_GET(ifxmips_r32(IFXMIPS_BIU_WDT_CR))) |
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IFXMIPS_BIU_WDT_CR_CLKDIV_SET(IFXMIPS_BIU_WDT_CR_CLKDIV_GET(ifxmips_r32(IFXMIPS_BIU_WDT_CR))) |
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IFXMIPS_BIU_WDT_CR_RELOAD_SET(wdt_reload) |
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IFXMIPS_BIU_WDT_CR_GEN);
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ifxmips_w32(wdt_cr, IFXMIPS_BIU_WDT_CR);
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printk("watchdog enabled\n");
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out:
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return retval;
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}
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void
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ifxmips_wdt_disable (void)
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{
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ifxmips_w32(IFXMIPS_BIU_WDT_CR_PW_SET(IFXMIPS_WDT_PW1), IFXMIPS_BIU_WDT_CR);
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ifxmips_w32(IFXMIPS_BIU_WDT_CR_PW_SET(IFXMIPS_WDT_PW2), IFXMIPS_BIU_WDT_CR);
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printk("watchdog disabled\n");
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}
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/* passed LPEN or DSEN */
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void
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ifxmips_wdt_enable_feature (int en, int type)
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{
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unsigned int wdt_cr = 0;
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ifxmips_w32(IFXMIPS_BIU_WDT_CR_PW_SET(IFXMIPS_WDT_PW1), IFXMIPS_BIU_WDT_CR);
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wdt_cr = ifxmips_r32(IFXMIPS_BIU_WDT_CR);
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if (en)
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{
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wdt_cr &= (~IFXMIPS_BIU_WDT_CR_PW_SET(0xff));
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wdt_cr |= (IFXMIPS_BIU_WDT_CR_PW_SET(IFXMIPS_WDT_PW2) | type);
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} else {
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wdt_cr &= (~IFXMIPS_BIU_WDT_CR_PW_SET(0xff) & ~type);
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wdt_cr |= IFXMIPS_BIU_WDT_CR_PW_SET(IFXMIPS_WDT_PW2);
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}
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ifxmips_w32(wdt_cr, IFXMIPS_BIU_WDT_CR);
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}
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void
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ifxmips_wdt_prewarning_limit (int pwl)
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{
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unsigned int wdt_cr = 0;
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wdt_cr = ifxmips_r32(IFXMIPS_BIU_WDT_CR);
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ifxmips_w32(IFXMIPS_BIU_WDT_CR_PW_SET(IFXMIPS_WDT_PW1), IFXMIPS_BIU_WDT_CR);
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wdt_cr &= 0xf300ffff;
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wdt_cr |= (IFXMIPS_BIU_WDT_CR_PW_SET(IFXMIPS_WDT_PW2) | IFXMIPS_BIU_WDT_CR_PWL_SET(pwl));
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/* Set reload value in second password access */
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ifxmips_w32(wdt_cr, IFXMIPS_BIU_WDT_CR);
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}
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void
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ifxmips_wdt_set_clkdiv (int clkdiv)
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{
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unsigned int wdt_cr = 0;
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wdt_cr = ifxmips_r32(IFXMIPS_BIU_WDT_CR);
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ifxmips_w32(IFXMIPS_BIU_WDT_CR_PW_SET(IFXMIPS_WDT_PW1), IFXMIPS_BIU_WDT_CR);
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wdt_cr &= 0xfc00ffff;
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wdt_cr |= (IFXMIPS_BIU_WDT_CR_PW_SET(IFXMIPS_WDT_PW2) | IFXMIPS_BIU_WDT_CR_CLKDIV_SET(clkdiv));
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/* Set reload value in second password access */
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ifxmips_w32(wdt_cr, IFXMIPS_BIU_WDT_CR);
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}
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static int
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ifxmips_wdt_ioctl (struct inode *inode, struct file *file, unsigned int cmd,
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unsigned long arg)
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{
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int result = 0;
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static int timeout = -1;
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unsigned int user_arg;
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if ((cmd != IFXMIPS_WDT_IOC_STOP) && (cmd != IFXMIPS_WDT_IOC_PING) && (cmd != IFXMIPS_WDT_IOC_GET_STATUS))
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{
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if (copy_from_user((void *) &user_arg, (void *) arg, sizeof (int))){
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result = -EINVAL;
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goto out;
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}
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}
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switch (cmd)
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{
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case IFXMIPS_WDT_IOC_START:
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if ((result = ifxmips_wdt_enable(user_arg)) < 0)
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timeout = -1;
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else
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timeout = user_arg;
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break;
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case IFXMIPS_WDT_IOC_STOP:
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printk(KERN_INFO DRVNAME ": disable watch dog timer\n");
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ifxmips_wdt_disable();
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break;
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case IFXMIPS_WDT_IOC_PING:
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if (timeout < 0)
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result = -EIO;
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else
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result = ifxmips_wdt_enable(timeout);
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break;
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case IFXMIPS_WDT_IOC_GET_STATUS:
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user_arg = ifxmips_r32(IFXMIPS_BIU_WDT_SR);
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copy_to_user((int*)arg, (int*)&user_arg, sizeof(int));
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break;
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case IFXMIPS_WDT_IOC_SET_PWL:
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ifxmips_wdt_prewarning_limit(user_arg);
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break;
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case IFXMIPS_WDT_IOC_SET_DSEN:
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ifxmips_wdt_enable_feature(user_arg, IFXMIPS_BIU_WDT_CR_DSEN);
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break;
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case IFXMIPS_WDT_IOC_SET_LPEN:
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ifxmips_wdt_enable_feature(user_arg, IFXMIPS_BIU_WDT_CR_LPEN);
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break;
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case IFXMIPS_WDT_IOC_SET_CLKDIV:
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ifxmips_wdt_set_clkdiv(user_arg);
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break;
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default:
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printk(KERN_WARNING DRVNAME ": unknown watchdog iotcl\n");
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}
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out:
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return result;
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}
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static int
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ifxmips_wdt_open (struct inode *inode, struct file *file)
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{
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if (ifxmips_wdt_inuse)
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return -EBUSY;
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ifxmips_wdt_inuse = 1;
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u32 fpi;
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fpi = cgu_get_io_region_clock();
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ifxmips_w32(IFXMIPS_WDT_PW1, IFXMIPS_BIU_WDT_CR);
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ifxmips_w32(IFXMIPS_WDT_PW2 |
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(0x3 << 26) | // PWL
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(0x3 << 24) | // CLKDIV
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(0x1 << 31) | // enable
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((timeout * (fpi / 0x40000)) + 0x1000), // reload
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IFXMIPS_BIU_WDT_CR);
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return 0;
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}
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static int
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ifxmips_wdt_release (struct inode *inode, struct file *file)
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void
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ifxmips_wdt_disable(void)
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{
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ifxmips_wdt_inuse = 0;
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return 0;
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#ifndef CONFIG_WATCHDOG_NOWAYOUT
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wdt_ok_to_close = 0;
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#endif
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ifxmips_w32(IFXMIPS_WDT_PW1, IFXMIPS_BIU_WDT_CR);
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ifxmips_w32(IFXMIPS_WDT_PW2, IFXMIPS_BIU_WDT_CR);
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}
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int
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ifxmips_wdt_register_proc_read (char *buf, char **start, off_t offset, int count,
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int *eof, void *data)
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static ssize_t
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ifxmips_wdt_write(struct file *file, const char __user *data, size_t len,
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loff_t *ppos)
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{
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int len = 0;
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size_t i;
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len += sprintf (buf + len, "IFXMIPS_BIU_WDT_PROC_READ\n");
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len += sprintf (buf + len, "IFXMIPS_BIU_WDT_CR(0x%08x) : 0x%08x\n",
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(unsigned int)IFXMIPS_BIU_WDT_CR, ifxmips_r32(IFXMIPS_BIU_WDT_CR));
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len += sprintf (buf + len, "IFXMIPS_BIU_WDT_SR(0x%08x) : 0x%08x\n",
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(unsigned int)IFXMIPS_BIU_WDT_SR, ifxmips_r32(IFXMIPS_BIU_WDT_SR));
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*eof = 1;
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if(!len)
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return 0;
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#ifndef CONFIG_WATCHDOG_NOWAYOUT
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for(i = 0; i != len; i++)
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{
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char c;
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if(get_user(c, data + i))
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return -EFAULT;
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if(c == 'V')
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wdt_ok_to_close = 1;
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}
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#endif
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ifxmips_wdt_enable(wdt_timeout);
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return len;
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}
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static struct watchdog_info ident = {
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.options = WDIOF_MAGICCLOSE,
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.identity = "ifxmips Watchdog",
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};
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static int
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ifxmips_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
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unsigned long arg)
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{
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int ret = -ENOTTY;
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switch(cmd)
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{
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case WDIOC_GETSUPPORT:
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ret = copy_to_user((struct watchdog_info __user *)arg, &ident,
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sizeof(ident)) ? -EFAULT : 0;
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break;
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case WDIOC_GETTIMEOUT:
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ret = put_user(wdt_timeout, (int __user *)arg);
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break;
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case WDIOC_SETTIMEOUT:
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ret = get_user(wdt_timeout, (int __user*)arg);
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break;
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case WDIOC_KEEPALIVE:
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ifxmips_wdt_enable(wdt_timeout);
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ret = 0;
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break;
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}
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return ret;
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}
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static int
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ifxmips_wdt_open(struct inode *inode, struct file *file)
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{
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ifxmips_wdt_enable(wdt_timeout);
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printk("ifxmips_wdt: activated");
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return nonseekable_open(inode, file);
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}
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static int ifxmips_wdt_release(struct inode *inode, struct file *file)
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{
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#ifndef CONFIG_WATCHDOG_NOWAYOUT
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if(wdt_ok_to_close)
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ifxmips_wdt_disable();
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else
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#endif
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printk(KERN_INFO "watchdog closed without warning, rebooting system\n");
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return 0;
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}
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static const struct file_operations ifxmips_wdt_fops = {
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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.write = ifxmips_wdt_write,
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.ioctl = ifxmips_wdt_ioctl,
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.open = ifxmips_wdt_open,
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.release = ifxmips_wdt_release,
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// .write = at91_wdt_write,
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};
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static struct miscdevice ifxmips_wdt_miscdev = {
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.minor = WATCHDOG_MINOR,
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.name = "ifxmips_wdt",
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.name = "watchdog",
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.fops = &ifxmips_wdt_fops,
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};
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static int
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ifxmips_wdt_probe (struct platform_device *pdev)
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ifxmips_wdt_probe(struct platform_device *dev)
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{
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int ret = misc_register(&ifxmips_wdt_miscdev);
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if (ret)
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return ret;
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create_proc_read_entry(DRVNAME, 0, NULL, ifxmips_wdt_register_proc_read, NULL);
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printk(KERN_INFO DRVNAME ": ifxmips watchdog loaded\n");
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return 0;
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int err;
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err = misc_register(&ifxmips_wdt_miscdev);
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if(err)
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printk("ifxmips_wdt: error creating device\n");
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else
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printk("ifxmips_wdt: loaded\n");
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return err;
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}
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static int
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ifxmips_wdt_remove (struct platform_device *pdev)
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ifxmips_wdt_remove(struct platform_device *dev)
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{
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ifxmips_wdt_disable();
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misc_deregister(&ifxmips_wdt_miscdev);
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remove_proc_entry(DRVNAME, NULL);
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return 0;
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}
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static struct
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platform_driver ifxmips_wdt_driver = {
|
||||
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static struct platform_driver ifxmips_wdt_driver = {
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.probe = ifxmips_wdt_probe,
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.remove = ifxmips_wdt_remove,
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.driver = {
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.name = DRVNAME,
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.name = "ifxmips_wdt",
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.owner = THIS_MODULE,
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},
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||||
};
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||||
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||||
int __init
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ifxmips_wdt_init_module (void)
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static int __init
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init_ifxmips_wdt(void)
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{
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int ret = platform_driver_register(&ifxmips_wdt_driver);
|
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if (ret)
|
||||
printk(KERN_INFO DRVNAME ": Error registering platfom driver!");
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||||
if(ret)
|
||||
printk(KERN_INFO "ifxmips_wdt: error registering platfom driver!");
|
||||
return ret;
|
||||
}
|
||||
|
||||
void
|
||||
ifxmips_wdt_cleanup_module (void)
|
||||
static void __exit
|
||||
exit_ifxmips_wdt(void)
|
||||
{
|
||||
platform_driver_unregister(&ifxmips_wdt_driver);
|
||||
}
|
||||
|
||||
module_init(ifxmips_wdt_init_module);
|
||||
module_exit(ifxmips_wdt_cleanup_module);
|
||||
module_init(init_ifxmips_wdt);
|
||||
module_exit(exit_ifxmips_wdt);
|
||||
|
||||
MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
|
||||
MODULE_DESCRIPTION("Watchdog driver for infineon ifxmips family");
|
||||
MODULE_DESCRIPTION("ifxmips Watchdog");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
|
||||
|
|
|
@ -273,17 +273,6 @@
|
|||
#define IFXMIPS_BIU_WDT_CR ((u32*)(IFXMIPS_WDT_BASE_ADDR + 0x03F0))
|
||||
#define IFXMIPS_BIU_WDT_SR ((u32*)(IFXMIPS_WDT_BASE_ADDR + 0x03F8))
|
||||
|
||||
#define IFXMIPS_BIU_WDT_CR_GEN (1 << 31)
|
||||
#define IFXMIPS_BIU_WDT_CR_DSEN (1 << 30)
|
||||
#define IFXMIPS_BIU_WDT_CR_LPEN (1 << 29)
|
||||
|
||||
#define IFXMIPS_BIU_WDT_CR_CLKDIV_GET(value) (((value) >> 24) & ((1 << 2) - 1))
|
||||
#define IFXMIPS_BIU_WDT_CR_PWL_GET(value) (((value) >> 26) & ((1 << 2) - 1))
|
||||
#define IFXMIPS_BIU_WDT_CR_PWL_SET(value) ((((1 << 2) - 1) & (value)) << 26)
|
||||
#define IFXMIPS_BIU_WDT_CR_PW_SET(value) (((( 1 << 8) - 1) & (value)) << 16)
|
||||
#define IFXMIPS_BIU_WDT_CR_CLKDIV_SET(value) (((( 1 << 2) - 1) & (value)) << 24)
|
||||
#define IFXMIPS_BIU_WDT_CR_RELOAD_SET(value) (((( 1 << 16) - 1) & (value)) << 0)
|
||||
|
||||
|
||||
/*------------ LED */
|
||||
|
||||
|
|
|
@ -1,48 +0,0 @@
|
|||
/*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
|
||||
*
|
||||
* Copyright (C) 2005 infineon
|
||||
* Copyright (C) 2007 John Crispin <blogic@openwrt.org>
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef IFXMIPS_WDT_H
|
||||
#define IFXMIPS_WDT_H
|
||||
|
||||
/* IFXMips wdt ioctl control */
|
||||
#define IFXMIPS_WDT_IOC_MAGIC 0xc0
|
||||
#define IFXMIPS_WDT_IOC_START _IOW(IFXMIPS_WDT_IOC_MAGIC, 0, int)
|
||||
#define IFXMIPS_WDT_IOC_STOP _IO(IFXMIPS_WDT_IOC_MAGIC, 1)
|
||||
#define IFXMIPS_WDT_IOC_PING _IO(IFXMIPS_WDT_IOC_MAGIC, 2)
|
||||
#define IFXMIPS_WDT_IOC_SET_PWL _IOW(IFXMIPS_WDT_IOC_MAGIC, 3, int)
|
||||
#define IFXMIPS_WDT_IOC_SET_DSEN _IOW(IFXMIPS_WDT_IOC_MAGIC, 4, int)
|
||||
#define IFXMIPS_WDT_IOC_SET_LPEN _IOW(IFXMIPS_WDT_IOC_MAGIC, 5, int)
|
||||
#define IFXMIPS_WDT_IOC_GET_STATUS _IOR(IFXMIPS_WDT_IOC_MAGIC, 6, int)
|
||||
#define IFXMIPS_WDT_IOC_SET_CLKDIV _IOW(IFXMIPS_WDT_IOC_MAGIC, 7, int)
|
||||
|
||||
/* password 1 and 2 */
|
||||
#define IFXMIPS_WDT_PW1 0x000000BE
|
||||
#define IFXMIPS_WDT_PW2 0x000000DC
|
||||
|
||||
#define IFXMIPS_WDT_CLKDIV0_VAL 1
|
||||
#define IFXMIPS_WDT_CLKDIV1_VAL 64
|
||||
#define IFXMIPS_WDT_CLKDIV2_VAL 4096
|
||||
#define IFXMIPS_WDT_CLKDIV3_VAL 262144
|
||||
#define IFXMIPS_WDT_CLKDIV0 0
|
||||
#define IFXMIPS_WDT_CLKDIV1 1
|
||||
#define IFXMIPS_WDT_CLKDIV2 2
|
||||
#define IFXMIPS_WDT_CLKDIV3 3
|
||||
|
||||
#endif
|
Loading…
Reference in New Issue