mirror of https://github.com/hak5/openwrt-owl.git
mpc85xx: remove linux 3.10 support
Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 43684owl
Felix Fietkau
parent
8692819c2c
commit
daeec86fba
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@ -1,287 +0,0 @@
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# CONFIG_40x is not set
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# CONFIG_44x is not set
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# CONFIG_ADVANCED_OPTIONS is not set
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CONFIG_AR8216_PHY=y
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CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
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CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
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CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
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CONFIG_ARCH_HAS_ILOG2_U32=y
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CONFIG_ARCH_HAS_WALK_MEMORY=y
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CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y
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CONFIG_ARCH_HIBERNATION_POSSIBLE=y
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CONFIG_ARCH_MAY_HAVE_PC_FDC=y
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# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set
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CONFIG_ARCH_REQUIRE_GPIOLIB=y
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CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
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CONFIG_ARCH_SUPPORTS_MSI=y
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CONFIG_ARCH_SUPPORTS_UPROBES=y
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CONFIG_ARCH_SUSPEND_POSSIBLE=y
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CONFIG_ARCH_USE_BUILTIN_BSWAP=y
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CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
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CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
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CONFIG_AUDIT_ARCH=y
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CONFIG_BOOKE=y
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CONFIG_BOUNCE=y
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# CONFIG_BSC9131_RDB is not set
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CONFIG_CLONE_BACKWARDS=y
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CONFIG_CMDLINE="console=ttyS0,115200"
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CONFIG_CMDLINE_BOOL=y
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# CONFIG_CPM2 is not set
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# CONFIG_CRYPTO_SHA1_PPC is not set
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CONFIG_DEBUG_BUGVERBOSE=y
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CONFIG_DEFAULT_UIMAGE=y
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CONFIG_DEVKMEM=y
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CONFIG_DNOTIFY=y
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CONFIG_DTC=y
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# CONFIG_E200 is not set
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CONFIG_E500=y
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CONFIG_EARLY_PRINTK=y
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CONFIG_ENABLE_MUST_CHECK=y
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# CONFIG_EPAPR_BOOT is not set
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CONFIG_ETHERNET_PACKET_MANGLE=y
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CONFIG_FSL_BOOKE=y
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CONFIG_FSL_EMB_PERFMON=y
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CONFIG_FSL_LBC=y
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CONFIG_FSL_PCI=y
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CONFIG_FSL_PQ_MDIO=y
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CONFIG_FSL_SOC=y
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CONFIG_FSL_SOC_BOOKE=y
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CONFIG_FSL_ULI1575=y
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CONFIG_GENERIC_ATOMIC64=y
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CONFIG_GENERIC_BUG=y
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CONFIG_GENERIC_CLOCKEVENTS=y
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CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
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CONFIG_GENERIC_CMOS_UPDATE=y
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CONFIG_GENERIC_IO=y
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CONFIG_GENERIC_IRQ_SHOW=y
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CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
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CONFIG_GENERIC_ISA_DMA=y
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CONFIG_GENERIC_NVRAM=y
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CONFIG_GENERIC_PCI_IOMAP=y
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CONFIG_GENERIC_SMP_IDLE_THREAD=y
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CONFIG_GENERIC_STRNCPY_FROM_USER=y
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CONFIG_GENERIC_STRNLEN_USER=y
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# CONFIG_GENERIC_TBSYNC is not set
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CONFIG_GENERIC_TIME_VSYSCALL_OLD=y
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CONFIG_GEN_RTC=y
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# CONFIG_GEN_RTC_X is not set
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# CONFIG_GE_FPGA is not set
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# CONFIG_GE_IMP3A is not set
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CONFIG_GIANFAR=y
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CONFIG_GPIOLIB=y
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CONFIG_GPIO_DEVRES=y
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CONFIG_GPIO_MPC8XXX=y
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CONFIG_GPIO_SYSFS=y
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# CONFIG_HAMRADIO is not set
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CONFIG_HAS_DMA=y
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CONFIG_HAS_IOMEM=y
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CONFIG_HAS_IOPORT=y
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CONFIG_HAS_RAPIDIO=y
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# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
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CONFIG_HAVE_ARCH_JUMP_LABEL=y
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CONFIG_HAVE_ARCH_KGDB=y
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CONFIG_HAVE_ARCH_TRACEHOOK=y
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# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
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CONFIG_HAVE_DEBUG_KMEMLEAK=y
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CONFIG_HAVE_DMA_API_DEBUG=y
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CONFIG_HAVE_DMA_ATTRS=y
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CONFIG_HAVE_DYNAMIC_FTRACE=y
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CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
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CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
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CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
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CONFIG_HAVE_FUNCTION_TRACER=y
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# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
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CONFIG_HAVE_GENERIC_HARDIRQS=y
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CONFIG_HAVE_IDE=y
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CONFIG_HAVE_IOREMAP_PROT=y
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CONFIG_HAVE_LATENCYTOP_SUPPORT=y
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CONFIG_HAVE_MEMBLOCK=y
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CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
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CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
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CONFIG_HAVE_NET_DSA=y
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CONFIG_HAVE_OPROFILE=y
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CONFIG_HAVE_PERF_EVENTS=y
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CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
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# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
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CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
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CONFIG_HZ=250
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# CONFIG_HZ_100 is not set
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CONFIG_HZ_250=y
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CONFIG_HZ_PERIODIC=y
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CONFIG_INET_DIAG=y
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CONFIG_INET_TCP_DIAG=y
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CONFIG_INITRAMFS_SOURCE=""
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CONFIG_IOMMU_HELPER=y
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# CONFIG_IPIC is not set
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CONFIG_IRQCHIP=y
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CONFIG_IRQ_DOMAIN=y
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CONFIG_IRQ_FORCED_THREADING=y
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CONFIG_IRQ_WORK=y
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CONFIG_ISA_DMA_API=y
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CONFIG_KERNEL_START=0xc0000000
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# CONFIG_KSI8560 is not set
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CONFIG_LEGACY_PTYS=y
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CONFIG_LEGACY_PTY_COUNT=256
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CONFIG_LOWMEM_CAM_NUM=3
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CONFIG_LOWMEM_SIZE=0x30000000
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CONFIG_LXT_PHY=y
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CONFIG_M25PXX_USE_FAST_READ=y
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# CONFIG_MATH_EMULATION is not set
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CONFIG_MDIO_BOARDINFO=y
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CONFIG_MIGRATION=y
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# CONFIG_MII is not set
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# CONFIG_MMIO_NVRAM is not set
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CONFIG_MODULES_USE_ELF_RELA=y
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# CONFIG_MPC8536_DS is not set
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# CONFIG_MPC8540_ADS is not set
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# CONFIG_MPC8560_ADS is not set
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CONFIG_MPC85xx_CDS=y
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# CONFIG_MPC85xx_DS is not set
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CONFIG_MPC85xx_MDS=y
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CONFIG_MPC85xx_RDB=y
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CONFIG_MPIC=y
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# CONFIG_MPIC_MSGR is not set
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# CONFIG_MPIC_U3_HT_IRQS is not set
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# CONFIG_MPIC_WEIRD is not set
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# CONFIG_MTD_CFI is not set
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CONFIG_MTD_M25P80=y
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CONFIG_MTD_OF_PARTS=y
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# CONFIG_NEED_DMA_MAP_STATE is not set
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# CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK is not set
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CONFIG_NEED_PER_CPU_KM=y
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CONFIG_NEED_SG_DMA_LENGTH=y
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# CONFIG_NONSTATIC_KERNEL is not set
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CONFIG_NR_IRQS=512
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CONFIG_OF=y
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CONFIG_OF_ADDRESS=y
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CONFIG_OF_DEVICE=y
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CONFIG_OF_EARLY_FLATTREE=y
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CONFIG_OF_FLATTREE=y
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CONFIG_OF_GPIO=y
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CONFIG_OF_IRQ=y
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CONFIG_OF_MDIO=y
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CONFIG_OF_MTD=y
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CONFIG_OF_NET=y
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CONFIG_OF_PCI=y
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CONFIG_OF_PCI_IRQ=y
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CONFIG_OLD_SIGACTION=y
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CONFIG_OLD_SIGSUSPEND=y
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CONFIG_P1010_RDB=y
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# CONFIG_P1022_DS is not set
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# CONFIG_P1022_RDK is not set
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# CONFIG_P1023_RDS is not set
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# CONFIG_P2041_RDB is not set
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# CONFIG_P3041_DS is not set
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# CONFIG_P4080_DS is not set
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# CONFIG_P5020_DS is not set
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# CONFIG_P5040_DS is not set
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CONFIG_PAGEFLAGS_EXTENDED=y
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CONFIG_PAGE_OFFSET=0xc0000000
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CONFIG_PCI=y
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CONFIG_PCIEAER=y
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CONFIG_PCIEASPM=y
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# CONFIG_PCIEASPM_DEBUG is not set
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CONFIG_PCIEASPM_DEFAULT=y
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# CONFIG_PCIEASPM_PERFORMANCE is not set
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# CONFIG_PCIEASPM_POWERSAVE is not set
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CONFIG_PCIEPORTBUS=y
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CONFIG_PCI_DOMAINS=y
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CONFIG_PHYLIB=y
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CONFIG_PHYSICAL_ALIGN=0x04000000
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CONFIG_PHYSICAL_START=0x00000000
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# CONFIG_PHYS_64BIT is not set
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# CONFIG_PPA8548 is not set
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CONFIG_PPC=y
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CONFIG_PPC32=y
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# CONFIG_PPC64 is not set
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CONFIG_PPC_85xx=y
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# CONFIG_PPC_8xx is not set
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# CONFIG_PPC_970_NAP is not set
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CONFIG_PPC_ADV_DEBUG_DACS=2
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CONFIG_PPC_ADV_DEBUG_DVCS=0
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CONFIG_PPC_ADV_DEBUG_IACS=2
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CONFIG_PPC_ADV_DEBUG_REGS=y
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CONFIG_PPC_BOOK3E_MMU=y
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# CONFIG_PPC_BOOK3S_32 is not set
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# CONFIG_PPC_CELL is not set
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# CONFIG_PPC_CELL_NATIVE is not set
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# CONFIG_PPC_CLOCK is not set
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# CONFIG_PPC_DCR_MMIO is not set
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# CONFIG_PPC_DCR_NATIVE is not set
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CONFIG_PPC_DOORBELL=y
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# CONFIG_PPC_E500MC is not set
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# CONFIG_PPC_EARLY_DEBUG is not set
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# CONFIG_PPC_EPAPR_HV_PIC is not set
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CONFIG_PPC_FSL_BOOK3E=y
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CONFIG_PPC_I8259=y
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# CONFIG_PPC_ICP_HV is not set
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# CONFIG_PPC_ICP_NATIVE is not set
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# CONFIG_PPC_ICS_RTAS is not set
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CONFIG_PPC_INDIRECT_PCI=y
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CONFIG_PPC_LIB_RHEAP=y
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CONFIG_PPC_MMU_NOHASH=y
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# CONFIG_PPC_MM_SLICES is not set
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# CONFIG_PPC_MPC106 is not set
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CONFIG_PPC_OF=y
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# CONFIG_PPC_P7_NAP is not set
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CONFIG_PPC_PCI_CHOICE=y
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# CONFIG_PPC_QEMU_E500 is not set
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# CONFIG_PPC_RTAS is not set
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CONFIG_PPC_SMP_MUXED_IPI=y
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CONFIG_PPC_UDBG_16550=y
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CONFIG_PPC_WERROR=y
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# CONFIG_PPC_WSP is not set
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# CONFIG_PPC_XICS is not set
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# CONFIG_PQ2ADS is not set
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# CONFIG_PREEMPT_RCU is not set
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CONFIG_PROC_DEVICETREE=y
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CONFIG_PROC_PAGE_MONITOR=y
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# CONFIG_PTP_1588_CLOCK_GIANFAR is not set
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CONFIG_QE_GPIO=y
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CONFIG_QUICC_ENGINE=y
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# CONFIG_RCU_STALL_COMMON is not set
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CONFIG_RWSEM_XCHGADD_ALGORITHM=y
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# CONFIG_SBC8548 is not set
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CONFIG_SCHED_HRTICK=y
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# CONFIG_SCSI_DMA is not set
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CONFIG_SERIAL_8250_EXTENDED=y
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CONFIG_SERIAL_8250_FSL=y
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CONFIG_SERIAL_8250_SHARE_IRQ=y
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CONFIG_SERIAL_OF_PLATFORM=y
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# CONFIG_SERIAL_QE is not set
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CONFIG_SIMPLE_GPIO=y
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# CONFIG_SLAB is not set
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CONFIG_SLUB=y
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CONFIG_SOCK_DIAG=y
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# CONFIG_SOCRATES is not set
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CONFIG_SPARSE_IRQ=y
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CONFIG_SPE=y
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CONFIG_SPI=y
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CONFIG_SPI_FSL_ESPI=y
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CONFIG_SPI_FSL_LIB=y
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CONFIG_SPI_MASTER=y
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# CONFIG_STRIP_ASM_SYMS is not set
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# CONFIG_STX_GP3 is not set
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CONFIG_SWCONFIG=y
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CONFIG_SWIOTLB=y
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CONFIG_SYSCTL_EXCEPTION_TRACE=y
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CONFIG_TASK_SIZE=0xc0000000
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CONFIG_TICK_CPU_ACCOUNTING=y
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CONFIG_TL_WDR4900_V1=y
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# CONFIG_TQM8540 is not set
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# CONFIG_TQM8541 is not set
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# CONFIG_TQM8548 is not set
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# CONFIG_TQM8555 is not set
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# CONFIG_TQM8560 is not set
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CONFIG_UCC=y
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CONFIG_UCC_FAST=y
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CONFIG_UCC_GETH=y
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# CONFIG_UGETH_TX_ON_DEMAND is not set
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CONFIG_UIDGID_CONVERTED=y
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CONFIG_USB_ARCH_HAS_XHCI=y
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CONFIG_USB_SUPPORT=y
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CONFIG_VM_EVENT_COUNTERS=y
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CONFIG_WORD_SIZE=32
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# CONFIG_XES_MPC85xx is not set
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CONFIG_XZ_DEC_BCJ=y
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CONFIG_XZ_DEC_POWERPC=y
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@ -1,10 +0,0 @@
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--- a/arch/powerpc/platforms/85xx/common.c
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+++ b/arch/powerpc/platforms/85xx/common.c
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@@ -27,6 +27,7 @@ static struct of_device_id __initdata mp
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{ .compatible = "fsl,mpc8548-guts", },
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/* Probably unnecessary? */
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{ .compatible = "gpio-leds", },
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+ { .compatible = "gpio-keys", },
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/* For all PCI controllers */
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{ .compatible = "fsl,mpc8540-pci", },
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{ .compatible = "fsl,mpc8548-pcie", },
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@ -1,32 +0,0 @@
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--- a/arch/powerpc/boot/dts/mpc8568mds.dts
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+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
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@@ -317,6 +317,9 @@
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gpios = <&bcsr5 3 0>;
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};
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};
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+ chosen {
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+ linux,stdout-path = "/soc8568@e0000000/serial@4500";
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+ };
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};
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/include/ "fsl/mpc8568si-post.dtsi"
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--- a/arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi
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+++ b/arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi
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@@ -134,17 +134,8 @@
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};
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- duart-sleep-nexus {
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- #address-cells = <1>;
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- #size-cells = <1>;
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- compatible = "simple-bus";
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- sleep = <&pmc 0x00000002>;
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- ranges;
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-
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/include/ "pq3-duart-0.dtsi"
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- };
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-
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L2: l2-cache-controller@20000 {
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compatible = "fsl,mpc8568-l2-cache-controller";
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reg = <0x20000 0x1000>;
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@ -1,40 +0,0 @@
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--- a/arch/powerpc/boot/dts/mpc8548cds_32b.dts
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+++ b/arch/powerpc/boot/dts/mpc8548cds_32b.dts
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@@ -75,6 +75,9 @@
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ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>;
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};
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};
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+ chosen {
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+ linux,stdout-path = "/soc8548@e0000000/serial@4600";
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+ };
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};
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/*
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--- a/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi
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+++ b/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi
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@@ -131,7 +131,24 @@
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/include/ "pq3-i2c-0.dtsi"
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/include/ "pq3-i2c-1.dtsi"
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-/include/ "pq3-duart-0.dtsi"
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+
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+ serial0: serial@4600 {
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+ cell-index = <1>;
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+ device_type = "serial";
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+ compatible = "fsl,ns16550", "ns16550";
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+ reg = <0x4600 0x100>;
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+ clock-frequency = <0>;
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+ interrupts = <42 2 0 0>;
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+ };
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+
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+ serial1: serial@4500 {
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+ cell-index = <0>;
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+ device_type = "serial";
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+ compatible = "fsl,ns16550", "ns16550";
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+ reg = <0x4500 0x100>;
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+ clock-frequency = <0>;
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+ interrupts = <42 2 0 0>;
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+ };
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L2: l2-cache-controller@20000 {
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compatible = "fsl,mpc8548-l2-cache-controller";
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@ -1,23 +0,0 @@
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--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
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+++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
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@@ -247,15 +247,16 @@ static int mpc85xx_cds_8259_attach(void)
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return -ENODEV;
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}
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+ i8259_init(cascade_node, 0);
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+ of_node_put(cascade_node);
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+
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cascade_irq = irq_of_parse_and_map(cascade_node, 0);
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if (cascade_irq == NO_IRQ) {
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- printk(KERN_ERR "Failed to map cascade interrupt\n");
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+ of_node_put(cascade_node);
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+ printk(KERN_DEBUG "No interrupt for i8259 PIC\n");
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return -ENXIO;
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}
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- i8259_init(cascade_node, 0);
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- of_node_put(cascade_node);
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-
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/*
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* Hook the interrupt to make sure desc->action is never NULL.
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* This is required to ensure that the interrupt does not get
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|
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@ -1,13 +0,0 @@
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--- a/arch/powerpc/boot/dts/mpc8548cds.dtsi
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+++ b/arch/powerpc/boot/dts/mpc8548cds.dtsi
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@@ -293,8 +293,10 @@
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#address-cells = <0>;
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#interrupt-cells = <2>;
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compatible = "chrp,iic";
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+/*
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interrupts = <0 1 0 0>;
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interrupt-parent = <&mpic>;
|
||||
+*/
|
||||
};
|
||||
|
||||
rtc@70 {
|
||||
|
|
@ -1,616 +0,0 @@
|
|||
From 406d86e5990ac171f18ef6e2973672d8fbfe1556 Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <juhosg@openwrt.org>
|
||||
Date: Wed, 20 Feb 2013 08:40:33 +0100
|
||||
Subject: [PATCH] powerpc: 85xx: add support for the TP-Link TL-WDR4900 v1
|
||||
board
|
||||
|
||||
This patch adds support for the TP-Link TL-WDR4900 v1
|
||||
concurrent dual-band wireless router. The devices uses
|
||||
the Freescale P1014 SoC.
|
||||
|
||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||
---
|
||||
arch/powerpc/boot/Makefile | 3 +
|
||||
arch/powerpc/boot/cuboot-tl-wdr4900-v1.c | 164 ++++++++++++++++++++++++++
|
||||
arch/powerpc/boot/dts/tl-wdr4900-v1.dts | 166 +++++++++++++++++++++++++++
|
||||
arch/powerpc/boot/wrapper | 4 +
|
||||
arch/powerpc/platforms/85xx/Kconfig | 11 ++
|
||||
arch/powerpc/platforms/85xx/Makefile | 1 +
|
||||
arch/powerpc/platforms/85xx/tl_wdr4900_v1.c | 145 +++++++++++++++++++++++
|
||||
7 files changed, 494 insertions(+)
|
||||
create mode 100644 arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
|
||||
create mode 100644 arch/powerpc/boot/dts/tl-wdr4900-v1.dts
|
||||
create mode 100644 arch/powerpc/platforms/85xx/tl_wdr4900_v1.c
|
||||
|
||||
--- a/arch/powerpc/boot/Makefile
|
||||
+++ b/arch/powerpc/boot/Makefile
|
||||
@@ -98,6 +98,8 @@ src-plat-$(CONFIG_EMBEDDED6xx) += cuboot
|
||||
src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
|
||||
src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
|
||||
src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c
|
||||
+src-plat-$(CONFIG_TL_WDR4900_V1) += cuboot-tl-wdr4900-v1.c
|
||||
+
|
||||
|
||||
src-wlib := $(sort $(src-wlib-y))
|
||||
src-plat := $(sort $(src-plat-y))
|
||||
@@ -278,6 +280,7 @@ image-$(CONFIG_TQM8555) += cuImage.tqm
|
||||
image-$(CONFIG_TQM8560) += cuImage.tqm8560
|
||||
image-$(CONFIG_SBC8548) += cuImage.sbc8548
|
||||
image-$(CONFIG_KSI8560) += cuImage.ksi8560
|
||||
+image-$(CONFIG_TL_WDR4900_V1) += cuImage.tl-wdr4900-v1
|
||||
|
||||
# Board ports in arch/powerpc/platform/embedded6xx/Kconfig
|
||||
image-$(CONFIG_STORCENTER) += cuImage.storcenter
|
||||
--- /dev/null
|
||||
+++ b/arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
|
||||
@@ -0,0 +1,164 @@
|
||||
+/*
|
||||
+ * U-Boot compatibility wrapper for the TP-Link TL-WDR4900 v1 board
|
||||
+ *
|
||||
+ * Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
|
||||
+ *
|
||||
+ * Based on:
|
||||
+ * cuboot-85xx.c
|
||||
+ * Author: Scott Wood <scottwood@freescale.com>
|
||||
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
|
||||
+ *
|
||||
+ * simpleboot.c
|
||||
+ * Authors: Scott Wood <scottwood@freescale.com>
|
||||
+ * Grant Likely <grant.likely@secretlab.ca>
|
||||
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
|
||||
+ * Copyright (c) 2008 Secret Lab Technologies Ltd.
|
||||
+ *
|
||||
+ * This program is free software; you can redistribute it and/or modify it
|
||||
+ * under the terms of the GNU General Public License version 2 as published
|
||||
+ * by the Free Software Foundation.
|
||||
+ */
|
||||
+
|
||||
+#include "ops.h"
|
||||
+#include "types.h"
|
||||
+#include "io.h"
|
||||
+#include "stdio.h"
|
||||
+#include <libfdt.h>
|
||||
+
|
||||
+BSS_STACK(4*1024);
|
||||
+
|
||||
+static unsigned long bus_freq;
|
||||
+static unsigned long int_freq;
|
||||
+static u64 mem_size;
|
||||
+static unsigned char enetaddr[6];
|
||||
+
|
||||
+static void process_boot_dtb(void *boot_dtb)
|
||||
+{
|
||||
+ const u32 *na, *ns, *reg, *val32;
|
||||
+ const char *path;
|
||||
+ u64 memsize64;
|
||||
+ int node, size, i;
|
||||
+
|
||||
+ /* Make sure FDT blob is sane */
|
||||
+ if (fdt_check_header(boot_dtb) != 0)
|
||||
+ fatal("Invalid device tree blob\n");
|
||||
+
|
||||
+ /* Find the #address-cells and #size-cells properties */
|
||||
+ node = fdt_path_offset(boot_dtb, "/");
|
||||
+ if (node < 0)
|
||||
+ fatal("Cannot find root node\n");
|
||||
+ na = fdt_getprop(boot_dtb, node, "#address-cells", &size);
|
||||
+ if (!na || (size != 4))
|
||||
+ fatal("Cannot find #address-cells property");
|
||||
+
|
||||
+ ns = fdt_getprop(boot_dtb, node, "#size-cells", &size);
|
||||
+ if (!ns || (size != 4))
|
||||
+ fatal("Cannot find #size-cells property");
|
||||
+
|
||||
+ /* Find the memory range */
|
||||
+ node = fdt_node_offset_by_prop_value(boot_dtb, -1, "device_type",
|
||||
+ "memory", sizeof("memory"));
|
||||
+ if (node < 0)
|
||||
+ fatal("Cannot find memory node\n");
|
||||
+ reg = fdt_getprop(boot_dtb, node, "reg", &size);
|
||||
+ if (size < (*na+*ns) * sizeof(u32))
|
||||
+ fatal("cannot get memory range\n");
|
||||
+
|
||||
+ /* Only interested in memory based at 0 */
|
||||
+ for (i = 0; i < *na; i++)
|
||||
+ if (*reg++ != 0)
|
||||
+ fatal("Memory range is not based at address 0\n");
|
||||
+
|
||||
+ /* get the memsize and trucate it to under 4G on 32 bit machines */
|
||||
+ memsize64 = 0;
|
||||
+ for (i = 0; i < *ns; i++)
|
||||
+ memsize64 = (memsize64 << 32) | *reg++;
|
||||
+ if (sizeof(void *) == 4 && memsize64 >= 0x100000000ULL)
|
||||
+ memsize64 = 0xffffffff;
|
||||
+
|
||||
+ mem_size = memsize64;
|
||||
+
|
||||
+ /* get clock frequencies */
|
||||
+ node = fdt_node_offset_by_prop_value(boot_dtb, -1, "device_type",
|
||||
+ "cpu", sizeof("cpu"));
|
||||
+ if (!node)
|
||||
+ fatal("Cannot find cpu node\n");
|
||||
+
|
||||
+ val32 = fdt_getprop(boot_dtb, node, "clock-frequency", &size);
|
||||
+ if (!val32 || (size != 4))
|
||||
+ fatal("Cannot get clock frequency");
|
||||
+
|
||||
+ int_freq = *val32;
|
||||
+
|
||||
+ val32 = fdt_getprop(boot_dtb, node, "bus-frequency", &size);
|
||||
+ if (!val32 || (size != 4))
|
||||
+ fatal("Cannot get bus frequency");
|
||||
+
|
||||
+ bus_freq = *val32;
|
||||
+
|
||||
+ path = fdt_get_alias(boot_dtb, "ethernet0");
|
||||
+ if (path) {
|
||||
+ const void *p;
|
||||
+
|
||||
+ node = fdt_path_offset(boot_dtb, path);
|
||||
+ if (node < 0)
|
||||
+ fatal("Cannot find ethernet0 node");
|
||||
+
|
||||
+ p = fdt_getprop(boot_dtb, node, "mac-address", &size);
|
||||
+ if (!p || (size < 6)) {
|
||||
+ printf("no mac-address property, finding local\n\r");
|
||||
+ p = fdt_getprop(boot_dtb, node, "local-mac-address", &size);
|
||||
+ }
|
||||
+
|
||||
+ if (!p || (size < 6))
|
||||
+ fatal("cannot get MAC addres");
|
||||
+
|
||||
+ memcpy(enetaddr, p, sizeof(enetaddr));
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+static void platform_fixups(void)
|
||||
+{
|
||||
+ void *soc;
|
||||
+
|
||||
+ dt_fixup_memory(0, mem_size);
|
||||
+
|
||||
+ dt_fixup_mac_address_by_alias("ethernet0", enetaddr);
|
||||
+ dt_fixup_cpu_clocks(int_freq, bus_freq / 8, bus_freq);
|
||||
+
|
||||
+ /* Unfortunately, the specific model number is encoded in the
|
||||
+ * soc node name in existing dts files -- once that is fixed,
|
||||
+ * this can do a simple path lookup.
|
||||
+ */
|
||||
+ soc = find_node_by_devtype(NULL, "soc");
|
||||
+ if (soc) {
|
||||
+ void *serial = NULL;
|
||||
+
|
||||
+ setprop(soc, "bus-frequency", &bus_freq, sizeof(bus_freq));
|
||||
+
|
||||
+ while ((serial = find_node_by_devtype(serial, "serial"))) {
|
||||
+ if (get_parent(serial) != soc)
|
||||
+ continue;
|
||||
+
|
||||
+ setprop(serial, "clock-frequency", &bus_freq,
|
||||
+ sizeof(bus_freq));
|
||||
+ }
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
|
||||
+ unsigned long r6, unsigned long r7)
|
||||
+{
|
||||
+ mem_size = 64 * 1024 * 1024;
|
||||
+
|
||||
+ simple_alloc_init(_end, mem_size - (u32)_end - 1024*1024, 32, 64);
|
||||
+
|
||||
+ fdt_init(_dtb_start);
|
||||
+ serial_console_init();
|
||||
+
|
||||
+ printf("\n\r-- TL-WDR4900 v1 boot wrapper --\n\r");
|
||||
+
|
||||
+ process_boot_dtb((void *) r3);
|
||||
+
|
||||
+ platform_ops.fixups = platform_fixups;
|
||||
+}
|
||||
--- /dev/null
|
||||
+++ b/arch/powerpc/boot/dts/tl-wdr4900-v1.dts
|
||||
@@ -0,0 +1,212 @@
|
||||
+/*
|
||||
+ * TP-Link TL-WDR4900 v1 Device Tree Source
|
||||
+ *
|
||||
+ * Copyright 2013 Gabor Juhos <juhosg@openwrt.org>
|
||||
+ *
|
||||
+ * This program is free software; you can redistribute it and/or modify it
|
||||
+ * under the terms of the GNU General Public License as published by the
|
||||
+ * Free Software Foundation; either version 2 of the License, or (at your
|
||||
+ * option) any later version.
|
||||
+ */
|
||||
+
|
||||
+/include/ "fsl/p1010si-pre.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "TP-Link TL-WDR4900 v1";
|
||||
+ compatible = "tp-link,TL-WDR4900v1";
|
||||
+
|
||||
+ chosen {
|
||||
+ bootargs = "console=ttyS0,115200";
|
||||
+/*
|
||||
+ linux,stdout-path = "/soc@ffe00000/serial@4500";
|
||||
+*/
|
||||
+ };
|
||||
+
|
||||
+ aliases {
|
||||
+ spi0 = &spi0;
|
||||
+ };
|
||||
+
|
||||
+ memory {
|
||||
+ device_type = "memory";
|
||||
+ };
|
||||
+
|
||||
+ soc: soc@ffe00000 {
|
||||
+ ranges = <0x0 0x0 0xffe00000 0x100000>;
|
||||
+
|
||||
+ spi0: spi@7000 {
|
||||
+ flash@0 {
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <1>;
|
||||
+ compatible = "spansion,s25fl129p1";
|
||||
+ reg = <0>;
|
||||
+ spi-max-frequency = <25000000>;
|
||||
+
|
||||
+ u-boot@0 {
|
||||
+ reg = <0x0 0x0050000>;
|
||||
+ label = "u-boot";
|
||||
+ read-only;
|
||||
+ };
|
||||
+
|
||||
+ dtb@50000 {
|
||||
+ reg = <0x00050000 0x00010000>;
|
||||
+ label = "dtb";
|
||||
+ read-only;
|
||||
+ };
|
||||
+
|
||||
+ kernel@60000 {
|
||||
+ reg = <0x00060000 0x002a0000>;
|
||||
+ label = "kernel";
|
||||
+ };
|
||||
+
|
||||
+ rootfs@300000 {
|
||||
+ reg = <0x00300000 0x00ce0000>;
|
||||
+ label = "rootfs";
|
||||
+ };
|
||||
+
|
||||
+ config@fe0000 {
|
||||
+ reg = <0x00fe0000 0x00010000>;
|
||||
+ label = "config";
|
||||
+ read-only;
|
||||
+ };
|
||||
+
|
||||
+ caldata@ff0000 {
|
||||
+ reg = <0x00ff0000 0x00010000>;
|
||||
+ label = "caldata";
|
||||
+ read-only;
|
||||
+ };
|
||||
+
|
||||
+ firmware@60000 {
|
||||
+ reg = <0x00060000 0x00f80000>;
|
||||
+ label = "firmware";
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ gpio0: gpio-controller@f000 {
|
||||
+ };
|
||||
+
|
||||
+ usb@22000 {
|
||||
+ phy_type = "utmi";
|
||||
+ dr_mode = "host";
|
||||
+ };
|
||||
+
|
||||
+ mdio@24000 {
|
||||
+ phy0: ethernet-phy@0 {
|
||||
+ reg = <0x0>;
|
||||
+ qca,ar8327-initvals = <
|
||||
+ 0x00004 0x07600000 /* PAD0_MODE */
|
||||
+ 0x00008 0x00000000 /* PAD5_MODE */
|
||||
+ 0x0000c 0x01000000 /* PAD6_MODE */
|
||||
+ 0x00010 0x40000000 /* POWER_ON_STRIP */
|
||||
+ 0x00050 0xcf35cf35 /* LED_CTRL0 */
|
||||
+ 0x00054 0xcf35cf35 /* LED_CTRL1 */
|
||||
+ 0x00058 0xcf35cf35 /* LED_CTRL2 */
|
||||
+ 0x0005c 0x03ffff00 /* LED_CTRL3 */
|
||||
+ 0x0007c 0x0000007e /* PORT0_STATUS */
|
||||
+ >;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ mdio@25000 {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ mdio@26000 {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ enet0: ethernet@b0000 {
|
||||
+ phy-handle = <&phy0>;
|
||||
+ phy-connection-type = "rgmii-id";
|
||||
+ };
|
||||
+
|
||||
+ enet1: ethernet@b1000 {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ enet2: ethernet@b2000 {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ sdhc@2e000 {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ serial1: serial@4600 {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ can0: can@1c000 {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ can1: can@1d000 {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pci0: pcie@ffe09000 {
|
||||
+ reg = <0 0xffe09000 0 0x1000>;
|
||||
+ ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
|
||||
+ 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
|
||||
+ pcie@0 {
|
||||
+ ranges = <0x2000000 0x0 0xa0000000
|
||||
+ 0x2000000 0x0 0xa0000000
|
||||
+ 0x0 0x20000000
|
||||
+
|
||||
+ 0x1000000 0x0 0x0
|
||||
+ 0x1000000 0x0 0x0
|
||||
+ 0x0 0x100000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pci1: pcie@ffe0a000 {
|
||||
+ reg = <0 0xffe0a000 0 0x1000>;
|
||||
+ ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
|
||||
+ 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
|
||||
+ pcie@0 {
|
||||
+ ranges = <0x2000000 0x0 0x80000000
|
||||
+ 0x2000000 0x0 0x80000000
|
||||
+ 0x0 0x20000000
|
||||
+
|
||||
+ 0x1000000 0x0 0x0
|
||||
+ 0x1000000 0x0 0x0
|
||||
+ 0x0 0x100000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ifc: ifc@ffe1e000 {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+
|
||||
+ system {
|
||||
+ gpios = <&gpio0 2 1>; /* active low */
|
||||
+ label = "tp-link:blue:system";
|
||||
+ };
|
||||
+
|
||||
+ usb1 {
|
||||
+ gpios = <&gpio0 3 1>; /* active low */
|
||||
+ label = "tp-link:green:usb1";
|
||||
+ };
|
||||
+
|
||||
+ usb2 {
|
||||
+ gpios = <&gpio0 4 1>; /* active low */
|
||||
+ label = "tp-link:green:usb2";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ buttons {
|
||||
+ compatible = "gpio-keys";
|
||||
+
|
||||
+ reset {
|
||||
+ label = "Reset button";
|
||||
+ gpios = <&gpio0 5 1>; /* active low */
|
||||
+ linux,code = <0x198>; /* KEY_RESTART */
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+/include/ "fsl/p1010si-post.dtsi"
|
||||
--- a/arch/powerpc/boot/wrapper
|
||||
+++ b/arch/powerpc/boot/wrapper
|
||||
@@ -197,6 +197,10 @@ cuboot*)
|
||||
*-mpc85*|*-tqm85*|*-sbc85*)
|
||||
platformo=$object/cuboot-85xx.o
|
||||
;;
|
||||
+ *-tl-wdr4900-v1)
|
||||
+ platformo=$object/cuboot-tl-wdr4900-v1.o
|
||||
+ link_address='0x1000000'
|
||||
+ ;;
|
||||
*-amigaone)
|
||||
link_address='0x800000'
|
||||
;;
|
||||
--- a/arch/powerpc/platforms/85xx/Kconfig
|
||||
+++ b/arch/powerpc/platforms/85xx/Kconfig
|
||||
@@ -147,6 +147,17 @@ config STX_GP3
|
||||
select CPM2
|
||||
select DEFAULT_UIMAGE
|
||||
|
||||
+config TL_WDR4900_V1
|
||||
+ bool "TP-Link TL-WDR4900 v1"
|
||||
+ select DEFAULT_UIMAGE
|
||||
+ select ARCH_REQUIRE_GPIOLIB
|
||||
+ select GPIO_MPC8XXX
|
||||
+ help
|
||||
+ This option enables support for the TP-Link TL-WDR4900 v1 board.
|
||||
+
|
||||
+ This board is a Concurrent Dual-Band wireless router with a
|
||||
+ Freescale P1014 SoC.
|
||||
+
|
||||
config TQM8540
|
||||
bool "TQ Components TQM8540"
|
||||
help
|
||||
--- a/arch/powerpc/platforms/85xx/Makefile
|
||||
+++ b/arch/powerpc/platforms/85xx/Makefile
|
||||
@@ -26,6 +26,7 @@ obj-$(CONFIG_T4240_QDS) += t4240_qds.o
|
||||
obj-$(CONFIG_B4_QDS) += b4_qds.o corenet_ds.o
|
||||
obj-$(CONFIG_STX_GP3) += stx_gp3.o
|
||||
obj-$(CONFIG_TQM85xx) += tqm85xx.o
|
||||
+obj-$(CONFIG_TL_WDR4900_V1) += tl_wdr4900_v1.o
|
||||
obj-$(CONFIG_SBC8548) += sbc8548.o
|
||||
obj-$(CONFIG_PPA8548) += ppa8548.o
|
||||
obj-$(CONFIG_SOCRATES) += socrates.o socrates_fpga_pic.o
|
||||
--- /dev/null
|
||||
+++ b/arch/powerpc/platforms/85xx/tl_wdr4900_v1.c
|
||||
@@ -0,0 +1,145 @@
|
||||
+/*
|
||||
+ * TL-WDR4900 v1 board setup
|
||||
+ *
|
||||
+ * Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
|
||||
+ *
|
||||
+ * Based on:
|
||||
+ * p1010rdb.c:
|
||||
+ * P1010RDB Board Setup
|
||||
+ * Copyright 2011 Freescale Semiconductor Inc.
|
||||
+ *
|
||||
+ * This program is free software; you can redistribute it and/or modify it
|
||||
+ * under the terms of the GNU General Public License as published by the
|
||||
+ * Free Software Foundation; either version 2 of the License, or (at your
|
||||
+ * option) any later version.
|
||||
+ */
|
||||
+
|
||||
+#include <linux/stddef.h>
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/pci.h>
|
||||
+#include <linux/delay.h>
|
||||
+#include <linux/interrupt.h>
|
||||
+#include <linux/of_platform.h>
|
||||
+#include <linux/ath9k_platform.h>
|
||||
+#include <linux/leds.h>
|
||||
+
|
||||
+#include <asm/time.h>
|
||||
+#include <asm/machdep.h>
|
||||
+#include <asm/pci-bridge.h>
|
||||
+#include <mm/mmu_decl.h>
|
||||
+#include <asm/prom.h>
|
||||
+#include <asm/udbg.h>
|
||||
+#include <asm/mpic.h>
|
||||
+
|
||||
+#include <sysdev/fsl_soc.h>
|
||||
+#include <sysdev/fsl_pci.h>
|
||||
+
|
||||
+#include "mpc85xx.h"
|
||||
+
|
||||
+void __init tl_wdr4900_v1_pic_init(void)
|
||||
+{
|
||||
+ struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
|
||||
+ MPIC_SINGLE_DEST_CPU,
|
||||
+ 0, 256, " OpenPIC ");
|
||||
+
|
||||
+ BUG_ON(mpic == NULL);
|
||||
+
|
||||
+ mpic_init(mpic);
|
||||
+}
|
||||
+
|
||||
+#ifdef CONFIG_PCI
|
||||
+static struct gpio_led tl_wdr4900_v1_wmac_leds_gpio[] = {
|
||||
+ {
|
||||
+ .name = "tp-link:blue:wps",
|
||||
+ .gpio = 1,
|
||||
+ .active_low = 1,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static struct ath9k_platform_data tl_wdr4900_v1_wmac0_data = {
|
||||
+ .led_pin = 0,
|
||||
+ .eeprom_name = "pci_wmac0.eeprom",
|
||||
+ .leds = tl_wdr4900_v1_wmac_leds_gpio,
|
||||
+ .num_leds = ARRAY_SIZE(tl_wdr4900_v1_wmac_leds_gpio),
|
||||
+};
|
||||
+
|
||||
+static struct ath9k_platform_data tl_wdr4900_v1_wmac1_data = {
|
||||
+ .led_pin = 0,
|
||||
+ .eeprom_name = "pci_wmac1.eeprom",
|
||||
+};
|
||||
+
|
||||
+static void tl_wdr4900_v1_pci_wmac_fixup(struct pci_dev *dev)
|
||||
+{
|
||||
+ if (!machine_is(tl_wdr4900_v1))
|
||||
+ return;
|
||||
+
|
||||
+ if (dev->bus->number == 1 &&
|
||||
+ PCI_SLOT(dev->devfn) == 0) {
|
||||
+ dev->dev.platform_data = &tl_wdr4900_v1_wmac0_data;
|
||||
+ return;
|
||||
+ }
|
||||
+
|
||||
+ if (dev->bus->number == 3 &&
|
||||
+ PCI_SLOT(dev->devfn) == 0 &&
|
||||
+ dev->device == 0xabcd) {
|
||||
+ dev->dev.platform_data = &tl_wdr4900_v1_wmac1_data;
|
||||
+
|
||||
+ /*
|
||||
+ * The PCI header of the AR9381 chip is not programmed
|
||||
+ * correctly by the bootloader and the device uses wrong
|
||||
+ * data due to that. Replace the broken values with the
|
||||
+ * correct ones.
|
||||
+ */
|
||||
+ dev->device = 0x30;
|
||||
+ dev->class = 0x028000;
|
||||
+
|
||||
+ pr_info("pci %s: AR9381 fixup applied\n", pci_name(dev));
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID,
|
||||
+ tl_wdr4900_v1_pci_wmac_fixup);
|
||||
+#endif /* CONFIG_PCI */
|
||||
+
|
||||
+/*
|
||||
+ * Setup the architecture
|
||||
+ */
|
||||
+static void __init tl_wdr4900_v1_setup_arch(void)
|
||||
+{
|
||||
+ if (ppc_md.progress)
|
||||
+ ppc_md.progress("tl_wdr4900_v1_setup_arch()", 0);
|
||||
+
|
||||
+ fsl_pci_assign_primary();
|
||||
+
|
||||
+ printk(KERN_INFO "TL-WDR4900 v1 board from TP-Link\n");
|
||||
+}
|
||||
+
|
||||
+machine_arch_initcall(tl_wdr4900_v1, mpc85xx_common_publish_devices);
|
||||
+machine_arch_initcall(tl_wdr4900_v1, swiotlb_setup_bus_notifier);
|
||||
+
|
||||
+/*
|
||||
+ * Called very early, device-tree isn't unflattened
|
||||
+ */
|
||||
+static int __init tl_wdr4900_v1_probe(void)
|
||||
+{
|
||||
+ unsigned long root = of_get_flat_dt_root();
|
||||
+
|
||||
+ if (of_flat_dt_is_compatible(root, "tp-link,TL-WDR4900v1"))
|
||||
+ return 1;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+define_machine(tl_wdr4900_v1) {
|
||||
+ .name = "Freescale P1014",
|
||||
+ .probe = tl_wdr4900_v1_probe,
|
||||
+ .setup_arch = tl_wdr4900_v1_setup_arch,
|
||||
+ .init_IRQ = tl_wdr4900_v1_pic_init,
|
||||
+#ifdef CONFIG_PCI
|
||||
+ .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
|
||||
+#endif
|
||||
+ .get_irq = mpic_get_irq,
|
||||
+ .restart = fsl_rstcr_restart,
|
||||
+ .calibrate_decr = generic_calibrate_decr,
|
||||
+ .progress = udbg_progress,
|
||||
+};
|
||||
|
|
@ -1,87 +0,0 @@
|
|||
From 41ec72d74b9453cd0d4b60d188ae894b8bdc4ca6 Mon Sep 17 00:00:00 2001
|
||||
From: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
Date: Thu, 20 Nov 2014 18:33:47 +0100
|
||||
Subject: [PATCH] create dts target p1010rdb-pa
|
||||
With kernel 3.14 dts target p1010rdb was renamed to p1010rdb-pa.
|
||||
Create a copy of p1010rdb.dts to maintain compatibility.
|
||||
|
||||
---
|
||||
arch/powerpc/boot/dts/p1010rdb-pa.dts | 66 +++++++++++++++++++++++++++++++++++
|
||||
1 file changed, 66 insertions(+)
|
||||
create mode 100644 arch/powerpc/boot/dts/p1010rdb-pa.dts
|
||||
|
||||
diff --git a/arch/powerpc/boot/dts/p1010rdb-pa.dts b/arch/powerpc/boot/dts/p1010rdb-pa.dts
|
||||
new file mode 100644
|
||||
index 0000000..b868d22
|
||||
--- /dev/null
|
||||
+++ b/arch/powerpc/boot/dts/p1010rdb-pa.dts
|
||||
@@ -0,0 +1,66 @@
|
||||
+/*
|
||||
+ * P1010 RDB Device Tree Source
|
||||
+ *
|
||||
+ * Copyright 2011 Freescale Semiconductor Inc.
|
||||
+ *
|
||||
+ * This program is free software; you can redistribute it and/or modify it
|
||||
+ * under the terms of the GNU General Public License as published by the
|
||||
+ * Free Software Foundation; either version 2 of the License, or (at your
|
||||
+ * option) any later version.
|
||||
+ */
|
||||
+
|
||||
+/include/ "fsl/p1010si-pre.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "fsl,P1010RDB";
|
||||
+ compatible = "fsl,P1010RDB";
|
||||
+
|
||||
+ memory {
|
||||
+ device_type = "memory";
|
||||
+ };
|
||||
+
|
||||
+ board_ifc: ifc: ifc@ffe1e000 {
|
||||
+ /* NOR, NAND Flashes and CPLD on board */
|
||||
+ ranges = <0x0 0x0 0x0 0xee000000 0x02000000
|
||||
+ 0x1 0x0 0x0 0xff800000 0x00010000
|
||||
+ 0x3 0x0 0x0 0xffb00000 0x00000020>;
|
||||
+ reg = <0x0 0xffe1e000 0 0x2000>;
|
||||
+ };
|
||||
+
|
||||
+ board_soc: soc: soc@ffe00000 {
|
||||
+ ranges = <0x0 0x0 0xffe00000 0x100000>;
|
||||
+ };
|
||||
+
|
||||
+ pci0: pcie@ffe09000 {
|
||||
+ reg = <0 0xffe09000 0 0x1000>;
|
||||
+ ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
|
||||
+ 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
|
||||
+ pcie@0 {
|
||||
+ ranges = <0x2000000 0x0 0xa0000000
|
||||
+ 0x2000000 0x0 0xa0000000
|
||||
+ 0x0 0x20000000
|
||||
+
|
||||
+ 0x1000000 0x0 0x0
|
||||
+ 0x1000000 0x0 0x0
|
||||
+ 0x0 0x100000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pci1: pcie@ffe0a000 {
|
||||
+ reg = <0 0xffe0a000 0 0x1000>;
|
||||
+ ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
|
||||
+ 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
|
||||
+ pcie@0 {
|
||||
+ ranges = <0x2000000 0x0 0x80000000
|
||||
+ 0x2000000 0x0 0x80000000
|
||||
+ 0x0 0x20000000
|
||||
+
|
||||
+ 0x1000000 0x0 0x0
|
||||
+ 0x1000000 0x0 0x0
|
||||
+ 0x0 0x100000>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+/include/ "p1010rdb.dtsi"
|
||||
+/include/ "fsl/p1010si-post.dtsi"
|
||||
--
|
||||
2.1.3
|
||||
|
||||
|
|
@ -1,109 +0,0 @@
|
|||
--- a/drivers/net/ethernet/freescale/gianfar.c
|
||||
+++ b/drivers/net/ethernet/freescale/gianfar.c
|
||||
@@ -2835,7 +2835,7 @@ static int gfar_poll(struct napi_struct
|
||||
struct gfar_priv_rx_q *rx_queue = NULL;
|
||||
int work_done = 0, work_done_per_q = 0;
|
||||
int i, budget_per_q = 0;
|
||||
- int has_tx_work;
|
||||
+ int has_tx_work = 0;
|
||||
unsigned long rstat_rxf;
|
||||
int num_act_queues;
|
||||
|
||||
@@ -2850,62 +2850,48 @@ static int gfar_poll(struct napi_struct
|
||||
if (num_act_queues)
|
||||
budget_per_q = budget/num_act_queues;
|
||||
|
||||
- while (1) {
|
||||
- has_tx_work = 0;
|
||||
- for_each_set_bit(i, &gfargrp->tx_bit_map, priv->num_tx_queues) {
|
||||
- tx_queue = priv->tx_queue[i];
|
||||
- /* run Tx cleanup to completion */
|
||||
- if (tx_queue->tx_skbuff[tx_queue->skb_dirtytx]) {
|
||||
- gfar_clean_tx_ring(tx_queue);
|
||||
- has_tx_work = 1;
|
||||
- }
|
||||
- }
|
||||
-
|
||||
- for_each_set_bit(i, &gfargrp->rx_bit_map, priv->num_rx_queues) {
|
||||
- /* skip queue if not active */
|
||||
- if (!(rstat_rxf & (RSTAT_CLEAR_RXF0 >> i)))
|
||||
- continue;
|
||||
-
|
||||
- rx_queue = priv->rx_queue[i];
|
||||
- work_done_per_q =
|
||||
- gfar_clean_rx_ring(rx_queue, budget_per_q);
|
||||
- work_done += work_done_per_q;
|
||||
-
|
||||
- /* finished processing this queue */
|
||||
- if (work_done_per_q < budget_per_q) {
|
||||
- /* clear active queue hw indication */
|
||||
- gfar_write(®s->rstat,
|
||||
- RSTAT_CLEAR_RXF0 >> i);
|
||||
- rstat_rxf &= ~(RSTAT_CLEAR_RXF0 >> i);
|
||||
- num_act_queues--;
|
||||
-
|
||||
- if (!num_act_queues)
|
||||
- break;
|
||||
- /* recompute budget per Rx queue */
|
||||
- budget_per_q =
|
||||
- (budget - work_done) / num_act_queues;
|
||||
- }
|
||||
+ for_each_set_bit(i, &gfargrp->tx_bit_map, priv->num_tx_queues) {
|
||||
+ tx_queue = priv->tx_queue[i];
|
||||
+ /* run Tx cleanup to completion */
|
||||
+ if (tx_queue->tx_skbuff[tx_queue->skb_dirtytx]) {
|
||||
+ gfar_clean_tx_ring(tx_queue);
|
||||
+ has_tx_work = 1;
|
||||
}
|
||||
+ }
|
||||
|
||||
- if (work_done >= budget)
|
||||
- break;
|
||||
+ for_each_set_bit(i, &gfargrp->rx_bit_map, priv->num_rx_queues) {
|
||||
+ /* skip queue if not active */
|
||||
+ if (!(rstat_rxf & (RSTAT_CLEAR_RXF0 >> i)))
|
||||
+ continue;
|
||||
+
|
||||
+ rx_queue = priv->rx_queue[i];
|
||||
+ work_done_per_q = gfar_clean_rx_ring(rx_queue, budget_per_q);
|
||||
+ work_done += work_done_per_q;
|
||||
+
|
||||
+ /* finished processing this queue */
|
||||
+ if (work_done_per_q < budget_per_q) {
|
||||
+ /* clear active queue hw indication */
|
||||
+ gfar_write(®s->rstat, RSTAT_CLEAR_RXF0 >> i);
|
||||
+ num_act_queues--;
|
||||
|
||||
- if (!num_act_queues && !has_tx_work) {
|
||||
+ if (!num_act_queues)
|
||||
+ break;
|
||||
+ }
|
||||
+ }
|
||||
|
||||
- napi_complete(napi);
|
||||
+ if (!num_act_queues && !has_tx_work) {
|
||||
+ napi_complete(napi);
|
||||
|
||||
- /* Clear the halt bit in RSTAT */
|
||||
- gfar_write(®s->rstat, gfargrp->rstat);
|
||||
+ /* Clear the halt bit in RSTAT */
|
||||
+ gfar_write(®s->rstat, gfargrp->rstat);
|
||||
|
||||
- gfar_write(®s->imask, IMASK_DEFAULT);
|
||||
+ gfar_write(®s->imask, IMASK_DEFAULT);
|
||||
|
||||
- /* If we are coalescing interrupts, update the timer
|
||||
- * Otherwise, clear it
|
||||
- */
|
||||
- gfar_configure_coalescing(priv, gfargrp->rx_bit_map,
|
||||
- gfargrp->tx_bit_map);
|
||||
- break;
|
||||
- }
|
||||
+ /* If we are coalescing interrupts, update the timer
|
||||
+ * Otherwise, clear it
|
||||
+ */
|
||||
+ gfar_configure_coalescing(priv, gfargrp->rx_bit_map,
|
||||
+ gfargrp->tx_bit_map);
|
||||
}
|
||||
|
||||
return work_done;
|
||||
|
|
@ -1,143 +0,0 @@
|
|||
From: Gabor Juhos <juhosg@openwrt.org>
|
||||
Subject: spi-fsl-espi: avoid frequent high order allocations
|
||||
|
||||
The driver allocates 64KiB of memory fro a local buffer before
|
||||
each transfer and releases that afterwards. When the memory is
|
||||
fragmented this allocation often fails and causes a warning like
|
||||
this:
|
||||
|
||||
kworker/u2:2: page allocation failure: order:4, mode:0x10c0d0
|
||||
CPU: 0 PID: 7011 Comm: kworker/u2:2 Not tainted 3.10.24 #1
|
||||
Workqueue: ffe07000.spi mpc8xxx_spi_work
|
||||
Call Trace:
|
||||
[c1c6dcf0] [c0006914] show_stack+0x50/0x170 (unreliable)
|
||||
[c1c6dd30] [c0259858] dump_stack+0x24/0x34
|
||||
[c1c6dd40] [c00672e8] warn_alloc_failed+0x120/0x13c
|
||||
[c1c6dd90] [c0069920] __alloc_pages_nodemask+0x574/0x5c8
|
||||
[c1c6de20] [c0069990] __get_free_pages+0x1c/0x4c
|
||||
[c1c6de30] [c0185174] fsl_espi_do_one_msg+0x128/0x2a0
|
||||
[c1c6de90] [c0184290] mpc8xxx_spi_work+0x50/0x7c
|
||||
[c1c6dea0] [c0037af8] process_one_work+0x208/0x30c
|
||||
[c1c6dec0] [c00387a0] worker_thread+0x20c/0x308
|
||||
[c1c6def0] [c003de60] kthread+0xa4/0xa8
|
||||
[c1c6df40] [c000c4bc] ret_from_kernel_thread+0x5c/0x64
|
||||
|
||||
m25p80 spi0.0: error -12 reading SR
|
||||
end_request: I/O error, dev mtdblock3, sector 680
|
||||
SQUASHFS error: squashfs_read_data failed to read block 0x54a4a
|
||||
SQUASHFS error: Unable to read data cache entry [54a4a]
|
||||
|
||||
Preallocate the buffer from the probe routine to avoid
|
||||
this.
|
||||
|
||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||
---
|
||||
--- a/drivers/spi/spi-fsl-espi.c
|
||||
+++ b/drivers/spi/spi-fsl-espi.c
|
||||
@@ -338,17 +338,13 @@ static void fsl_espi_do_trans(struct spi
|
||||
static void fsl_espi_cmd_trans(struct spi_message *m,
|
||||
struct fsl_espi_transfer *trans, u8 *rx_buff)
|
||||
{
|
||||
+ struct spi_device *spi = m->spi;
|
||||
+ struct mpc8xxx_spi *mspi = spi_master_get_devdata(spi->master);
|
||||
struct spi_transfer *t;
|
||||
- u8 *local_buf;
|
||||
+ u8 *local_buf = mspi->local_buf;
|
||||
int i = 0;
|
||||
struct fsl_espi_transfer *espi_trans = trans;
|
||||
|
||||
- local_buf = kzalloc(SPCOM_TRANLEN_MAX, GFP_KERNEL);
|
||||
- if (!local_buf) {
|
||||
- espi_trans->status = -ENOMEM;
|
||||
- return;
|
||||
- }
|
||||
-
|
||||
list_for_each_entry(t, &m->transfers, transfer_list) {
|
||||
if (t->tx_buf) {
|
||||
memcpy(local_buf + i, t->tx_buf, t->len);
|
||||
@@ -361,28 +357,23 @@ static void fsl_espi_cmd_trans(struct sp
|
||||
fsl_espi_do_trans(m, espi_trans);
|
||||
|
||||
espi_trans->actual_length = espi_trans->len;
|
||||
- kfree(local_buf);
|
||||
}
|
||||
|
||||
static void fsl_espi_rw_trans(struct spi_message *m,
|
||||
struct fsl_espi_transfer *trans, u8 *rx_buff)
|
||||
{
|
||||
+ struct spi_device *spi = m->spi;
|
||||
+ struct mpc8xxx_spi *mspi = spi_master_get_devdata(spi->master);
|
||||
struct fsl_espi_transfer *espi_trans = trans;
|
||||
unsigned int n_tx = espi_trans->n_tx;
|
||||
unsigned int n_rx = espi_trans->n_rx;
|
||||
struct spi_transfer *t;
|
||||
- u8 *local_buf;
|
||||
+ u8 *local_buf = mspi->local_buf;
|
||||
u8 *rx_buf = rx_buff;
|
||||
unsigned int trans_len;
|
||||
unsigned int addr;
|
||||
int i, pos, loop;
|
||||
|
||||
- local_buf = kzalloc(SPCOM_TRANLEN_MAX, GFP_KERNEL);
|
||||
- if (!local_buf) {
|
||||
- espi_trans->status = -ENOMEM;
|
||||
- return;
|
||||
- }
|
||||
-
|
||||
for (pos = 0, loop = 0; pos < n_rx; pos += trans_len, loop++) {
|
||||
trans_len = n_rx - pos;
|
||||
if (trans_len > SPCOM_TRANLEN_MAX - n_tx)
|
||||
@@ -416,8 +407,6 @@ static void fsl_espi_rw_trans(struct spi
|
||||
else
|
||||
espi_trans->actual_length += espi_trans->len;
|
||||
}
|
||||
-
|
||||
- kfree(local_buf);
|
||||
}
|
||||
|
||||
static void fsl_espi_do_one_msg(struct spi_message *m)
|
||||
@@ -585,6 +574,7 @@ static irqreturn_t fsl_espi_irq(s32 irq,
|
||||
static void fsl_espi_remove(struct mpc8xxx_spi *mspi)
|
||||
{
|
||||
iounmap(mspi->reg_base);
|
||||
+ kfree(mspi->local_buf);
|
||||
}
|
||||
|
||||
static struct spi_master * fsl_espi_probe(struct device *dev,
|
||||
@@ -615,10 +605,16 @@ static struct spi_master * fsl_espi_prob
|
||||
mpc8xxx_spi->spi_do_one_msg = fsl_espi_do_one_msg;
|
||||
mpc8xxx_spi->spi_remove = fsl_espi_remove;
|
||||
|
||||
+ mpc8xxx_spi->local_buf = kzalloc(SPCOM_TRANLEN_MAX, GFP_KERNEL);
|
||||
+ if (!mpc8xxx_spi->local_buf) {
|
||||
+ ret = -ENOMEM;
|
||||
+ goto err_probe;
|
||||
+ }
|
||||
+
|
||||
mpc8xxx_spi->reg_base = ioremap(mem->start, resource_size(mem));
|
||||
if (!mpc8xxx_spi->reg_base) {
|
||||
ret = -ENOMEM;
|
||||
- goto err_probe;
|
||||
+ goto free_buf;
|
||||
}
|
||||
|
||||
reg_base = mpc8xxx_spi->reg_base;
|
||||
@@ -661,6 +657,8 @@ unreg_master:
|
||||
free_irq(mpc8xxx_spi->irq, mpc8xxx_spi);
|
||||
free_irq:
|
||||
iounmap(mpc8xxx_spi->reg_base);
|
||||
+free_buf:
|
||||
+ kfree(mpc8xxx_spi->local_buf);
|
||||
err_probe:
|
||||
spi_master_put(master);
|
||||
err:
|
||||
--- a/drivers/spi/spi-fsl-lib.h
|
||||
+++ b/drivers/spi/spi-fsl-lib.h
|
||||
@@ -30,6 +30,7 @@ struct mpc8xxx_spi {
|
||||
void *rx;
|
||||
#ifdef CONFIG_SPI_FSL_ESPI
|
||||
int len;
|
||||
+ u8 *local_buf;
|
||||
#endif
|
||||
|
||||
int subblock;
|
||||
|
|
@ -1,77 +0,0 @@
|
|||
--- a/drivers/net/ethernet/freescale/gianfar.c
|
||||
+++ b/drivers/net/ethernet/freescale/gianfar.c
|
||||
@@ -2064,7 +2064,7 @@ static int gfar_start_xmit(struct sk_buf
|
||||
int i, rq = 0, do_tstamp = 0;
|
||||
u32 bufaddr;
|
||||
unsigned long flags;
|
||||
- unsigned int nr_frags, nr_txbds, length, fcb_length = GMAC_FCB_LEN;
|
||||
+ unsigned int nr_frags, nr_txbds, bytes_sent, fcb_length = GMAC_FCB_LEN;
|
||||
|
||||
/* TOE=1 frames larger than 2500 bytes may see excess delays
|
||||
* before start of transmission.
|
||||
@@ -2130,7 +2130,10 @@ static int gfar_start_xmit(struct sk_buf
|
||||
}
|
||||
|
||||
/* Update transmit stats */
|
||||
- tx_queue->stats.tx_bytes += skb->len;
|
||||
+ bytes_sent = skb->len;
|
||||
+ tx_queue->stats.tx_bytes += bytes_sent;
|
||||
+ /* keep Tx bytes on wire for BQL accounting */
|
||||
+ GFAR_CB(skb)->bytes_sent = bytes_sent;
|
||||
tx_queue->stats.tx_packets++;
|
||||
|
||||
txbdp = txbdp_start = tx_queue->cur_tx;
|
||||
@@ -2150,12 +2153,13 @@ static int gfar_start_xmit(struct sk_buf
|
||||
} else {
|
||||
/* Place the fragment addresses and lengths into the TxBDs */
|
||||
for (i = 0; i < nr_frags; i++) {
|
||||
+ unsigned int frag_len;
|
||||
/* Point at the next BD, wrapping as needed */
|
||||
txbdp = next_txbd(txbdp, base, tx_queue->tx_ring_size);
|
||||
|
||||
- length = skb_shinfo(skb)->frags[i].size;
|
||||
+ frag_len = skb_shinfo(skb)->frags[i].size;
|
||||
|
||||
- lstatus = txbdp->lstatus | length |
|
||||
+ lstatus = txbdp->lstatus | frag_len |
|
||||
BD_LFLAG(TXBD_READY);
|
||||
|
||||
/* Handle the last BD specially */
|
||||
@@ -2165,7 +2169,7 @@ static int gfar_start_xmit(struct sk_buf
|
||||
bufaddr = skb_frag_dma_map(priv->dev,
|
||||
&skb_shinfo(skb)->frags[i],
|
||||
0,
|
||||
- length,
|
||||
+ frag_len,
|
||||
DMA_TO_DEVICE);
|
||||
|
||||
/* set the TxBD length and buffer pointer */
|
||||
@@ -2231,7 +2235,7 @@ static int gfar_start_xmit(struct sk_buf
|
||||
lstatus |= BD_LFLAG(TXBD_CRC | TXBD_READY) | skb_headlen(skb);
|
||||
}
|
||||
|
||||
- netdev_tx_sent_queue(txq, skb->len);
|
||||
+ netdev_tx_sent_queue(txq, bytes_sent);
|
||||
|
||||
/* We can work in parallel with gfar_clean_tx_ring(), except
|
||||
* when modifying num_txbdfree. Note that we didn't grab the lock
|
||||
@@ -2551,7 +2555,7 @@ static void gfar_clean_tx_ring(struct gf
|
||||
bdp = next_txbd(bdp, base, tx_ring_size);
|
||||
}
|
||||
|
||||
- bytes_sent += skb->len;
|
||||
+ bytes_sent += GFAR_CB(skb)->bytes_sent;
|
||||
|
||||
dev_kfree_skb_any(skb);
|
||||
|
||||
--- a/drivers/net/ethernet/freescale/gianfar.h
|
||||
+++ b/drivers/net/ethernet/freescale/gianfar.h
|
||||
@@ -571,7 +571,7 @@ struct rxfcb {
|
||||
};
|
||||
|
||||
struct gianfar_skb_cb {
|
||||
- int alignamount;
|
||||
+ unsigned int bytes_sent; /* bytes-on-wire (i.e. no FCB) */
|
||||
};
|
||||
|
||||
#define GFAR_CB(skb) ((struct gianfar_skb_cb *)((skb)->cb))
|
||||
Loading…
Reference in New Issue