mirror of https://github.com/hak5/openwrt-owl.git
kernel: rtl8366-smi: add Realtek switch management via mii-bus
Current version of rtl8366-smi module only supports Realtek switch managment via two gpio lines. This adds Realtek switch management via mii_bus. Tested on a Tp-link Archer C2 v1 (Mediatek SoC mt7620a based) dts-file configuration should look like this: rtl8367rb { compatible = "realtek,rtl8367b"; realtek,extif1 = <1 0 1 1 1 1 1 1 2>; mii-bus = <&mdio0>; }; ðernet { status = "okay"; mtd-mac-address = <&rom 0xf100>; pinctrl-names = "default"; pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>; port@5 { status = "okay"; mediatek,fixed-link = <1000 1 1 1>; phy-mode = "rgmii"; }; mdio0: mdio-bus { status = "okay"; }; }; Signed-off-by: Serge Vasilugin <vasilugin@yandex.ru> Signed-off-by: Franz Flasch <franz.flasch@gmx.at>master
parent
f9e7f19334
commit
d4ac26ec49
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@ -199,7 +199,7 @@ static int rtl8366_smi_read_byte1(struct rtl8366_smi *smi, u8 *data)
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return 0;
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}
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int rtl8366_smi_read_reg(struct rtl8366_smi *smi, u32 addr, u32 *data)
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static int __rtl8366_smi_read_reg(struct rtl8366_smi *smi, u32 addr, u32 *data)
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{
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unsigned long flags;
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u8 lo = 0;
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@ -240,6 +240,101 @@ int rtl8366_smi_read_reg(struct rtl8366_smi *smi, u32 addr, u32 *data)
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return ret;
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}
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/* Read/write via mdiobus */
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#define MDC_MDIO_CTRL0_REG 31
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#define MDC_MDIO_START_REG 29
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#define MDC_MDIO_CTRL1_REG 21
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#define MDC_MDIO_ADDRESS_REG 23
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#define MDC_MDIO_DATA_WRITE_REG 24
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#define MDC_MDIO_DATA_READ_REG 25
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#define MDC_MDIO_START_OP 0xFFFF
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#define MDC_MDIO_ADDR_OP 0x000E
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#define MDC_MDIO_READ_OP 0x0001
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#define MDC_MDIO_WRITE_OP 0x0003
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#define MDC_REALTEK_PHY_ADDR 0x0
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int __rtl8366_mdio_read_reg(struct rtl8366_smi *smi, u32 addr, u32 *data)
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{
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u32 phy_id = MDC_REALTEK_PHY_ADDR;
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struct mii_bus *mbus = smi->ext_mbus;
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BUG_ON(in_interrupt());
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mutex_lock(&mbus->mdio_lock);
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/* Write Start command to register 29 */
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mbus->write(mbus, phy_id, MDC_MDIO_START_REG, MDC_MDIO_START_OP);
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/* Write address control code to register 31 */
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mbus->write(mbus, phy_id, MDC_MDIO_CTRL0_REG, MDC_MDIO_ADDR_OP);
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/* Write Start command to register 29 */
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mbus->write(mbus, phy_id, MDC_MDIO_START_REG, MDC_MDIO_START_OP);
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/* Write address to register 23 */
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mbus->write(mbus, phy_id, MDC_MDIO_ADDRESS_REG, addr);
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/* Write Start command to register 29 */
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mbus->write(mbus, phy_id, MDC_MDIO_START_REG, MDC_MDIO_START_OP);
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/* Write read control code to register 21 */
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mbus->write(mbus, phy_id, MDC_MDIO_CTRL1_REG, MDC_MDIO_READ_OP);
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/* Write Start command to register 29 */
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mbus->write(smi->ext_mbus, phy_id, MDC_MDIO_START_REG, MDC_MDIO_START_OP);
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/* Read data from register 25 */
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*data = mbus->read(mbus, phy_id, MDC_MDIO_DATA_READ_REG);
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mutex_unlock(&mbus->mdio_lock);
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return 0;
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}
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static int __rtl8366_mdio_write_reg(struct rtl8366_smi *smi, u32 addr, u32 data)
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{
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u32 phy_id = MDC_REALTEK_PHY_ADDR;
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struct mii_bus *mbus = smi->ext_mbus;
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BUG_ON(in_interrupt());
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mutex_lock(&mbus->mdio_lock);
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/* Write Start command to register 29 */
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mbus->write(mbus, phy_id, MDC_MDIO_START_REG, MDC_MDIO_START_OP);
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/* Write address control code to register 31 */
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mbus->write(mbus, phy_id, MDC_MDIO_CTRL0_REG, MDC_MDIO_ADDR_OP);
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/* Write Start command to register 29 */
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mbus->write(mbus, phy_id, MDC_MDIO_START_REG, MDC_MDIO_START_OP);
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/* Write address to register 23 */
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mbus->write(mbus, phy_id, MDC_MDIO_ADDRESS_REG, addr);
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/* Write Start command to register 29 */
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mbus->write(mbus, phy_id, MDC_MDIO_START_REG, MDC_MDIO_START_OP);
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/* Write data to register 24 */
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mbus->write(mbus, phy_id, MDC_MDIO_DATA_WRITE_REG, data);
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/* Write Start command to register 29 */
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mbus->write(mbus, phy_id, MDC_MDIO_START_REG, MDC_MDIO_START_OP);
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/* Write data control code to register 21 */
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mbus->write(mbus, phy_id, MDC_MDIO_CTRL1_REG, MDC_MDIO_WRITE_OP);
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mutex_unlock(&mbus->mdio_lock);
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return 0;
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}
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int rtl8366_smi_read_reg(struct rtl8366_smi *smi, u32 addr, u32 *data)
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{
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if (smi->ext_mbus)
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return __rtl8366_mdio_read_reg(smi, addr, data);
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else
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return __rtl8366_smi_read_reg(smi, addr, data);
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}
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EXPORT_SYMBOL_GPL(rtl8366_smi_read_reg);
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static int __rtl8366_smi_write_reg(struct rtl8366_smi *smi,
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@ -291,6 +386,9 @@ static int __rtl8366_smi_write_reg(struct rtl8366_smi *smi,
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int rtl8366_smi_write_reg(struct rtl8366_smi *smi, u32 addr, u32 data)
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{
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if (smi->ext_mbus)
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return __rtl8366_mdio_write_reg(smi, addr, data);
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else
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return __rtl8366_smi_write_reg(smi, addr, data, true);
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}
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EXPORT_SYMBOL_GPL(rtl8366_smi_write_reg);
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@ -1282,6 +1380,7 @@ static int __rtl8366_smi_init(struct rtl8366_smi *smi, const char *name)
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{
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int err;
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if (!smi->ext_mbus) {
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err = gpio_request(smi->gpio_sda, name);
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if (err) {
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printk(KERN_ERR "rtl8366_smi: gpio_request failed for %u, err=%d\n",
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@ -1295,6 +1394,7 @@ static int __rtl8366_smi_init(struct rtl8366_smi *smi, const char *name)
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smi->gpio_sck, err);
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goto err_free_sda;
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}
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}
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spin_lock_init(&smi->lock);
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@ -1317,8 +1417,10 @@ static void __rtl8366_smi_cleanup(struct rtl8366_smi *smi)
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if (smi->hw_reset)
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smi->hw_reset(smi, true);
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if (!smi->ext_mbus) {
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gpio_free(smi->gpio_sck);
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gpio_free(smi->gpio_sda);
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}
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}
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enum rtl8366_type rtl8366_smi_detect(struct rtl8366_platform_data *pdata)
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@ -1371,8 +1473,11 @@ int rtl8366_smi_init(struct rtl8366_smi *smi)
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if (err)
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goto err_out;
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if (!smi->ext_mbus)
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dev_info(smi->parent, "using GPIO pins %u (SDA) and %u (SCK)\n",
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smi->gpio_sda, smi->gpio_sck);
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else
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dev_info(smi->parent, "using MDIO bus '%s'\n", smi->ext_mbus->name);
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err = smi->ops->detect(smi);
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if (err) {
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@ -1437,7 +1542,25 @@ int rtl8366_smi_probe_of(struct platform_device *pdev, struct rtl8366_smi *smi)
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{
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int sck = of_get_named_gpio(pdev->dev.of_node, "gpio-sck", 0);
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int sda = of_get_named_gpio(pdev->dev.of_node, "gpio-sda", 0);
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struct device_node *np = pdev->dev.of_node;
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struct device_node *mdio_node;
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mdio_node = of_parse_phandle(np, "mii-bus", 0);
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if (!mdio_node) {
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dev_err(&pdev->dev, "cannot find mdio node phandle");
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goto try_gpio;
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}
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smi->ext_mbus = of_mdio_find_bus(mdio_node);
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if (!smi->ext_mbus) {
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dev_err(&pdev->dev,
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"cannot find mdio bus from bus handle");
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goto try_gpio;
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}
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return 0;
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try_gpio:
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if (!gpio_is_valid(sck) || !gpio_is_valid(sda)) {
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dev_err(&pdev->dev, "gpios missing in devictree\n");
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return -EINVAL;
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@ -63,6 +63,7 @@ struct rtl8366_smi {
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u16 dbg_reg;
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u8 dbg_vlan_4k_page;
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#endif
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struct mii_bus *ext_mbus;
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};
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struct rtl8366_vlan_mc {
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