ramips: rt3883: add inital support for the DIR-645 board

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>

SVN-Revision: 33843

target/linux/ramips/files/arch/mips/include/asm/mach-ralink/machine.h

@@ -68,5 +68,6 @@ enum ramips_mach_type {
 	RAMIPS_MACH_DIR_615_H1,
 
 	/* RT3662 based machines */
+	RAMIPS_MACH_DIR_645,		/* D-Link DIR-645 */
 	RAMIPS_MACH_RT_N56U,		/* Asus RT-N56U */
 };

target/linux/ramips/files/arch/mips/ralink/rt3883/Kconfig

@@ -8,6 +8,11 @@ config RT3883_MACH_RT_N56U
 	select RALINK_DEV_GPIO_BUTTONS
 	select RALINK_DEV_GPIO_LEDS
 
+config RT3883_MACH_DIR_645
+	bool "D-Link DIR-645 support"
+	select RALINK_DEV_GPIO_BUTTONS
+	select RALINK_DEV_GPIO_LEDS
+
 endmenu
 
 endif

target/linux/ramips/files/arch/mips/ralink/rt3883/Makefile

@@ -11,4 +11,5 @@ obj-y	:= irq.o setup.o devices.o rt3883.o clock.o
 
 obj-$(CONFIG_EARLY_PRINTK)		+= early_printk.o
 
+obj-$(CONFIG_RT3883_MACH_DIR_645)	+= mach-dir-645.o
 obj-$(CONFIG_RT3883_MACH_RT_N56U)	+= mach-rt-n56u.o

target/linux/ramips/files/arch/mips/ralink/rt3883/mach-dir-645.c

@@ -0,0 +1,147 @@
+/*
+ *  D-Link DIR-645 board support
+ *
+ *  Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/rtl8367.h>
+#include <linux/ethtool.h>
+#include <linux/rt2x00_platform.h>
+#include <linux/spi/spi.h>
+
+#include <asm/mach-ralink/machine.h>
+#include <asm/mach-ralink/dev-gpio-buttons.h>
+#include <asm/mach-ralink/dev-gpio-leds.h>
+#include <asm/mach-ralink/rt3883.h>
+#include <asm/mach-ralink/rt3883_regs.h>
+#include <asm/mach-ralink/ramips_eth_platform.h>
+
+#include "devices.h"
+
+#define DIR_645_GPIO_LED_INET		0
+#define DIR_645_GPIO_LED_WPS		26
+
+#define DIR_645_GPIO_BUTTON_RESET	9
+#define DIR_645_GPIO_BUTTON_WPS		14
+
+#define DIR_645_GPIO_USB_POWER		30
+
+#define DIR_645_GPIO_RTL8367_SCK	2
+#define DIR_645_GPIO_RTL8367_SDA	1
+
+#define DIR_645_KEYS_POLL_INTERVAL	20
+#define DIR_645_KEYS_DEBOUNCE_INTERVAL	(3 * DIR_645_KEYS_POLL_INTERVAL)
+
+static struct gpio_led dir_645_leds_gpio[] __initdata = {
+	{
+		.name		= "d-link:green:inet",
+		.gpio		= DIR_645_GPIO_LED_INET,
+		.active_low	= 1,
+	},
+	{
+		.name		= "d-link:green:wps",
+		.gpio		= DIR_645_GPIO_LED_WPS,
+		.active_low	= 1,
+	},
+};
+
+static struct gpio_keys_button dir_645_gpio_buttons[] __initdata = {
+	{
+		.desc		= "reset",
+		.type		= EV_KEY,
+		.code		= KEY_RESTART,
+		.debounce_interval = DIR_645_KEYS_DEBOUNCE_INTERVAL,
+		.gpio		= DIR_645_GPIO_BUTTON_RESET,
+		.active_low	= 1,
+	},
+	{
+		.desc		= "wps",
+		.type		= EV_KEY,
+		.code		= KEY_WPS_BUTTON,
+		.debounce_interval = DIR_645_KEYS_DEBOUNCE_INTERVAL,
+		.gpio		= DIR_645_GPIO_BUTTON_WPS,
+		.active_low	= 1,
+	}
+};
+
+static struct rtl8367_extif_config dir_645_rtl8367_extif1_cfg = {
+	.txdelay = 1,
+	.rxdelay = 0,
+	.mode = RTL8367_EXTIF_MODE_RGMII,
+	.ability = {
+		.force_mode = 1,
+		.txpause = 1,
+		.rxpause = 1,
+		.link = 1,
+		.duplex = 1,
+		.speed = RTL8367_PORT_SPEED_1000,
+	}
+};
+
+static struct rtl8367_platform_data dir_645_rtl8367_data = {
+	.gpio_sda	= DIR_645_GPIO_RTL8367_SDA,
+	.gpio_sck	= DIR_645_GPIO_RTL8367_SCK,
+	.extif1_cfg	= &dir_645_rtl8367_extif1_cfg,
+};
+
+static struct platform_device dir_645_rtl8367_device = {
+	.name		= RTL8367B_DRIVER_NAME,
+	.id		= -1,
+	.dev = {
+		.platform_data	= &dir_645_rtl8367_data,
+	}
+};
+
+static struct spi_board_info dir_645_spi_info[] = {
+	{
+		.bus_num	= 0,
+		.chip_select	= 0,
+		.max_speed_hz	= 25000000,
+		.modalias	= "m25p80",
+	}
+};
+
+static void __init dir_645_gpio_init(void)
+{
+	rt3883_gpio_init(RT3883_GPIO_MODE_I2C |
+			 RT3883_GPIO_MODE_UART0(RT3883_GPIO_MODE_GPIO) |
+			 RT3883_GPIO_MODE_JTAG |
+			 RT3883_GPIO_MODE_PCI(RT3883_GPIO_MODE_PCI_FNC));
+}
+
+static void __init dir_645_init(void)
+{
+	dir_645_gpio_init();
+
+	rt3883_register_spi(dir_645_spi_info,
+			    ARRAY_SIZE(dir_645_spi_info));
+
+	ramips_register_gpio_leds(-1, ARRAY_SIZE(dir_645_leds_gpio),
+				  dir_645_leds_gpio);
+
+	ramips_register_gpio_buttons(-1, DIR_645_KEYS_POLL_INTERVAL,
+				     ARRAY_SIZE(dir_645_gpio_buttons),
+				     dir_645_gpio_buttons);
+
+	platform_device_register(&dir_645_rtl8367_device);
+
+	rt3883_wlan_data.disable_5ghz = 1;
+	rt3883_register_wlan();
+
+	rt3883_eth_data.speed = SPEED_1000;
+	rt3883_eth_data.duplex = DUPLEX_FULL;
+	rt3883_eth_data.tx_fc = 1;
+	rt3883_eth_data.rx_fc = 1;
+	rt3883_register_ethernet();
+
+	rt3883_register_wdt(false);
+	rt3883_register_usbhost();
+}
+
+MIPS_MACHINE(RAMIPS_MACH_DIR_645, "DIR-645", "D-Link DIR-645", dir_645_init);

target/linux/ramips/rt3883/config-3.3

@@ -61,6 +61,7 @@ CONFIG_IMAGE_CMDLINE_HACK=y
 CONFIG_INITRAMFS_SOURCE=""
 CONFIG_IRQ_CPU=y
 CONFIG_IRQ_FORCED_THREADING=y
+CONFIG_M25PXX_USE_FAST_READ=y
 CONFIG_MDIO_BOARDINFO=y
 # CONFIG_MII is not set
 CONFIG_MIPS=y
@@ -70,6 +71,7 @@ CONFIG_MIPS_MT_DISABLED=y
 CONFIG_MIPS_RALINK=y
 # CONFIG_MTD_CFI_INTELEXT is not set
 CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_M25P80=y
 CONFIG_MTD_PHYSMAP=y
 CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_NEED_PER_CPU_KM=y
@@ -90,8 +92,10 @@ CONFIG_RALINK_DEV_GPIO_LEDS=y
 # CONFIG_RALINK_RT305X is not set
 CONFIG_RALINK_RT3883=y
 CONFIG_RAMIPS_WDT=y
+CONFIG_RT3883_MACH_DIR_645=y
 CONFIG_RT3883_MACH_RT_N56U=y
 CONFIG_RTL8366_SMI=y
+CONFIG_RTL8367B_PHY=y
 CONFIG_RTL8367_PHY=y
 # CONFIG_SCSI_DMA is not set
 CONFIG_SERIAL_8250_NR_UARTS=4
@@ -99,6 +103,9 @@ CONFIG_SERIAL_8250_RT288X=y
 # CONFIG_SLAB is not set
 CONFIG_SLUB=y
 CONFIG_SOC_RT3883=y
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+CONFIG_SPI_RAMIPS=y
 CONFIG_SWCONFIG=y
 CONFIG_SYS_HAS_CPU_MIPS32_R1=y
 CONFIG_SYS_HAS_CPU_MIPS32_R2=y