mirror of https://github.com/hak5/openwrt-owl.git
Claudio Mignanti
parent
69b7963402
commit
cd540fed5b
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@ -29,6 +29,7 @@ CONFIG_ARM=y
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CONFIG_ARM_L1_CACHE_SHIFT=5
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CONFIG_ARM_THUMB=y
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# CONFIG_AT91SAM9X_WATCHDOG is not set
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# CONFIG_AT91_ADC is not set
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CONFIG_AT91_EARLY_DBGU=y
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# CONFIG_AT91_EARLY_USART0 is not set
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# CONFIG_AT91_EARLY_USART1 is not set
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@ -0,0 +1,355 @@
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/*
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* Driver for ADC on Atmel AT91 SoC Family
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*
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* Copyright (C) 2010 Claudio Mignanti - c.mignanti@gmail.com
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* Based on http://www.at91.com/forum/viewtopic.php/p,9409/#p9409
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*
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* Copyright (C) 2010 Stefano Barbato - stefano@codesink.org
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*
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* 2010/05/18 Antonio Galea
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* Sysfs device model, different drivers integration
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*
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* WISHLIST:
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* - concurrent access control
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* - add support for dynamic reconfiguration
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* - hardware triggers
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation.
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*
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* ---------------------------------------------------------------------------
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*/
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#include <linux/cdev.h>
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#include <linux/clk.h>
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#include <linux/fs.h>
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#include <linux/gpio.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/kernel.h>
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#include <linux/smp_lock.h>
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#include <asm/io.h>
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#include "at91_adc.h"
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#define DRV_CLASS "at91_adc"
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#define ADC_REQUEST 1 //un-used atm
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#define ADC_READ 2
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#define ADC_FREE 3
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/* Device functions */
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#define at91_adc_read(reg) ioread32(at91_adc_base + (reg))
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#define at91_adc_write(reg, val) iowrite32((val), at91_adc_base + (reg))
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#define AT91_DEFAULT_CONFIG AT91_ADC_SHTIM | \
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AT91_ADC_STARTUP | \
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AT91_ADC_PRESCAL | \
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AT91_ADC_SLEEP
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static void at91_adc_device_release(struct device *dev) {}
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struct platform_device at91_adc_device = {
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.name = "at91_adc",
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.id = -1,
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.dev.release = at91_adc_device_release,
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};
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struct clk *at91_adc_clk;
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void __iomem *at91_adc_base;
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void __iomem *at91_pioc_base;
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static struct cdev *at91_adc_cdev = NULL;
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static dev_t at91_adc_devno = 0;
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static struct class *at91_adc_class = NULL;
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static int at91_adc_read_chan(int chan){
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int val, sr;
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if(chan<0 || chan>3){
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return -EINVAL;
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}
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/* disable pull-up resistor */
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iowrite32(1 << chan, at91_pioc_base + 0x60);
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at91_adc_write(AT91_ADC_CHER,AT91_ADC_CH(chan)); // Enable Channel
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at91_adc_write(AT91_ADC_CR,AT91_ADC_START); //Start the ADC
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for(sr=0; !(sr & AT91_ADC_EOC(chan)); sr=at91_adc_read(AT91_ADC_SR))
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cpu_relax();
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val=at91_adc_read(AT91_ADC_CHR(chan)) & AT91_ADC_DATA; //Read up to 10 bits
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return val;
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}
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/* PC0 -> AD0
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PC1 -> AD1
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PC2 -> AD2
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PC3 -> AD3 */
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static int mux_chan (int chan, int operation) {
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int pin_chan;
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if(chan<0 || chan>3){
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return -EINVAL;
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}
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switch (chan) {
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case 0:
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pin_chan=AT91_PIN_PC0;
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break;
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case 1:
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pin_chan=AT91_PIN_PC1;
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break;
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case 2:
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pin_chan=AT91_PIN_PC2;
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break;
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case 3:
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pin_chan=AT91_PIN_PC3;
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break;
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default:
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return -EINVAL;
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}
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if (operation == 1) //request_chan
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at91_set_A_periph(pin_chan, 0); //Mux PIN to GPIO
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else //free_chan
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at91_set_B_periph(pin_chan, 0); //Mux PIN to GPIO
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return 0;
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}
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static int at91_adc_config(int requested_config){
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int actual_config;
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at91_adc_write(AT91_ADC_CR,AT91_ADC_SWRST); //Reset the ADC
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at91_adc_write(AT91_ADC_MR,requested_config); //Mode setup
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actual_config = at91_adc_read(AT91_ADC_MR); //Read it back
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return (requested_config==actual_config? 0: -EINVAL);
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}
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/* Sysfs interface */
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static ssize_t at91_adc_chanX_show(
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struct device *dev, struct device_attribute *attr, char *buf ){
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ssize_t status = 0;
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int chan = -1;
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int value;
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if(strlen(attr->attr.name)==5 && strncmp(attr->attr.name,"chan",4)==0){
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chan = attr->attr.name[4]-'0';
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}
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if(chan<0 || chan>3){
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return -EIO;
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}
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value = at91_adc_read_chan(chan);
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status = sprintf(buf, "%d\n", value);
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return status;
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}
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static DEVICE_ATTR(chan0, 0444, at91_adc_chanX_show, NULL);
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static DEVICE_ATTR(chan1, 0444, at91_adc_chanX_show, NULL);
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static DEVICE_ATTR(chan2, 0444, at91_adc_chanX_show, NULL);
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static DEVICE_ATTR(chan3, 0444, at91_adc_chanX_show, NULL);
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static const struct attribute *at91_adc_dev_attrs[] = {
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&dev_attr_chan0.attr,
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&dev_attr_chan1.attr,
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&dev_attr_chan2.attr,
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&dev_attr_chan3.attr,
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NULL,
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};
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static const struct attribute_group at91_adc_dev_attr_group = {
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.attrs = (struct attribute **) at91_adc_dev_attrs,
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};
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/* IOCTL interface */
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#ifdef HAVE_UNLOCKED_IOCTL
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static long at91_adc_unlocked_ioctl(
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struct file *file, unsigned int cmd, unsigned long arg){
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#else
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static int at91_adc_ioctl(
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struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg){
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#endif
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long retval = 0;
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#ifdef HAVE_UNLOCKED_IOCTL
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lock_kernel();
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#endif
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switch (cmd) {
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case ADC_REQUEST:
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retval = mux_chan ((int)arg, 1);
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break;
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case ADC_READ:
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retval = at91_adc_read_chan((int)arg);
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break;
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case ADC_FREE:
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retval = mux_chan ((int)arg, 0);
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break;
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default:
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retval = -EINVAL;
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}
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#ifdef HAVE_UNLOCKED_IOCTL
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unlock_kernel();
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#endif
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return retval;
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}
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struct file_operations at91_adc_fops = {
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.owner = THIS_MODULE,
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#ifdef HAVE_UNLOCKED_IOCTL
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.unlocked_ioctl = at91_adc_unlocked_ioctl,
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#else
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.ioctl = at91_adc_ioctl,
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#endif
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};
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static void at91_adc_cdev_teardown(void){
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if(at91_adc_class){
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device_destroy(at91_adc_class, at91_adc_devno);
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class_destroy(at91_adc_class);
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}
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if(at91_adc_devno){
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unregister_chrdev_region(at91_adc_devno,1);
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if(at91_adc_cdev){ cdev_del(at91_adc_cdev); }
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}
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at91_adc_devno = 0;
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at91_adc_cdev = NULL;
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at91_adc_class = NULL;
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return;
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}
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static int at91_adc_cdev_setup(void){
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int status;
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/* alloc a new device number (major: dynamic, minor: 0) */
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status = alloc_chrdev_region(&at91_adc_devno,0,1,at91_adc_device.name);
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if(status){
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goto err;
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}
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/* create a new char device */
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at91_adc_cdev = cdev_alloc();
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if(at91_adc_cdev == NULL){ status=-ENOMEM; goto err; }
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at91_adc_cdev->owner = THIS_MODULE;
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at91_adc_cdev->ops = &at91_adc_fops;
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status = cdev_add(at91_adc_cdev,at91_adc_devno,1);
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if(status){
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goto err;
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}
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/* register the class */
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at91_adc_class = class_create(THIS_MODULE, DRV_CLASS);
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if(IS_ERR(at91_adc_class)){ status=-EFAULT; goto err; }
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device_create(at91_adc_class, NULL, at91_adc_devno, NULL, at91_adc_device.name);
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printk(KERN_INFO "Major: %u; minor: %u\n", \
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MAJOR(at91_adc_devno), MINOR(at91_adc_devno) \
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);
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return 0;
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err:
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at91_adc_cdev_teardown();
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return status;
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}
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/* Module init/exit */
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static int __init at91_adc_init(void){
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int status;
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at91_adc_clk = clk_get(NULL,"adc_clk");
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clk_enable(at91_adc_clk);
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at91_adc_base = ioremap(AT91SAM9260_BASE_ADC,SZ_256);
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if(!at91_adc_base){
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status=-ENODEV;
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goto fail_no_iomem_adc;
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}
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at91_pioc_base = ioremap(AT91_BASE_SYS + AT91_PIOC,SZ_512);
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if(!at91_pioc_base){
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status=-ENODEV;
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goto fail_no_iomem_pioc;
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}
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status = platform_device_register(&at91_adc_device);
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if(status){
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goto fail_no_dev;
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}
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status = at91_adc_config(AT91_DEFAULT_CONFIG);
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if(status){
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goto fail_no_config;
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}
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status = sysfs_create_group(
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&(at91_adc_device.dev.kobj), &at91_adc_dev_attr_group
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);
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if(status){
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goto fail_no_sysfs;
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}
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status = at91_adc_cdev_setup();
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if(status){
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goto fail_no_cdev;
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}
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printk(KERN_INFO "Registered device at91_adc.\n");
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return 0;
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fail_no_cdev:
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fail_no_sysfs:
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// nothing to undo
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fail_no_config:
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platform_device_unregister(&at91_adc_device);
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fail_no_dev:
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iounmap(at91_adc_base);
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fail_no_iomem_pioc:
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iounmap(at91_pioc_base);
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fail_no_iomem_adc:
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clk_disable(at91_adc_clk);
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clk_put(at91_adc_clk);
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return status;
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}
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static void __exit at91_adc_exit(void){
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at91_adc_cdev_teardown();
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platform_device_unregister(&at91_adc_device);
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iounmap(at91_adc_base);
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iounmap(at91_pioc_base);
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clk_disable(at91_adc_clk);
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clk_put(at91_adc_clk);
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printk(KERN_INFO "Unregistered device at91_adc.\n");
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}
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module_init(at91_adc_init);
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module_exit(at91_adc_exit);
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MODULE_AUTHOR("Paul Kavan");
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MODULE_AUTHOR("Claudio Mignanti");
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MODULE_AUTHOR("Antonio Galea");
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MODULE_AUTHOR("Stefano Barbato");
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MODULE_DESCRIPTION("ADC Driver for the AT91SAM9G20");
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MODULE_LICENSE("GPL");
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@ -0,0 +1,62 @@
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/*
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* include/asm-arm/arch-at91/at91_adc.h
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*
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* Copyright (C) SAN People
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*
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* Analog-to-Digital Converter (ADC) registers.
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* Based on AT91SAM9260 datasheet revision D.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef AT91_ADC_H
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#define AT91_ADC_H
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#define AT91_ADC_CR 0x00 /* Control Register */
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#define AT91_ADC_SWRST (1 << 0) /* Software Reset */
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#define AT91_ADC_START (1 << 1) /* Start Conversion */
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#define AT91_ADC_MR 0x04 /* Mode Register */
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#define AT91_ADC_TRGEN (1 << 0) /* Trigger Enable */
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#define AT91_ADC_TRGSEL (7 << 1) /* Trigger Selection */
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#define AT91_ADC_TRGSEL_TC0 (0 << 1)
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#define AT91_ADC_TRGSEL_TC1 (1 << 1)
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#define AT91_ADC_TRGSEL_TC2 (2 << 1)
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#define AT91_ADC_TRGSEL_EXTERNAL (6 << 1)
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#define AT91_ADC_LOWRES (1 << 4) /* Low Resolution */
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#define AT91_ADC_SLEEP (1 << 5) /* Sleep Mode */
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#define AT91_ADC_PRESCAL (0x3f << 8) /* Prescalar Rate Selection */
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#define AT91_ADC_PRESCAL_(x) ((x) << 8)
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#define AT91_ADC_STARTUP (0x1f << 16) /* Startup Up Time */
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#define AT91_ADC_STARTUP_(x) ((x) << 16)
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#define AT91_ADC_SHTIM (0xf << 24) /* Sample & Hold Time */
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#define AT91_ADC_SHTIM_(x) ((x) << 24)
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#define AT91_ADC_CHER 0x10 /* Channel Enable Register */
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#define AT91_ADC_CHDR 0x14 /* Channel Disable Register */
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#define AT91_ADC_CHSR 0x18 /* Channel Status Register */
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#define AT91_ADC_CH(n) (1 << (n)) /* Channel Number */
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#define AT91_ADC_SR 0x1C /* Status Register */
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#define AT91_ADC_EOC(n) (1 << (n)) /* End of Conversion on Channel N */
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#define AT91_ADC_OVRE(n) (1 << ((n) + 8))/* Overrun Error on Channel N */
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#define AT91_ADC_DRDY (1 << 16) /* Data Ready */
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#define AT91_ADC_GOVRE (1 << 17) /* General Overrun Error */
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#define AT91_ADC_ENDRX (1 << 18) /* End of RX Buffer */
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#define AT91_ADC_RXFUFF (1 << 19) /* RX Buffer Full */
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#define AT91_ADC_LCDR 0x20 /* Last Converted Data Register */
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#define AT91_ADC_LDATA (0x3ff)
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#define AT91_ADC_IER 0x24 /* Interrupt Enable Register */
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#define AT91_ADC_IDR 0x28 /* Interrupt Disable Register */
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#define AT91_ADC_IMR 0x2C /* Interrupt Mask Register */
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#define AT91_ADC_CHR(n) (0x30 + ((n) * 4)) /* Channel Data Register N */
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#define AT91_ADC_DATA (0x3ff)
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#endif
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@ -35,3 +35,18 @@ define KernelPackage/pwm-atmel/description
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endef
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$(eval $(call KernelPackage,pwm-atmel))
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define KernelPackage/at91-adc
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SUBMENU:=$(OTHER_MENU)
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TITLE:=ADC on atmel SoC
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DEPENDS:=@TARGET_at91
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KCONFIG:=CONFIG_AT91_ADC
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FILES:=$(LINUX_DIR)/drivers/misc/at91-adc.ko
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AUTOLOAD:=$(call AutoLoad,40,at91-adc)
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endef
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define KernelPackage/at91-adc/description
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Kernel module to use the ADC channels of SoC
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endef
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$(eval $(call KernelPackage,at91-adc))
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@ -0,0 +1,27 @@
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Index: linux-2.6.35.9/drivers/misc/Kconfig
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===================================================================
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--- linux-2.6.35.9.orig/drivers/misc/Kconfig 2010-12-20 19:06:11.185139238 +0100
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+++ linux-2.6.35.9/drivers/misc/Kconfig 2010-12-20 19:07:31.000000000 +0100
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@@ -95,6 +95,10 @@
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TC can be used for other purposes, such as PWM generation and
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interval timing.
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+config AT91_ADC
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+ bool "AT91 ADC converter"
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+ depends on ARCH_AT91 && SYSFS
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+
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config IBM_ASM
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tristate "Device driver for IBM RSA service processor"
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depends on X86 && PCI && INPUT && EXPERIMENTAL
|
||||
Index: linux-2.6.35.9/drivers/misc/Makefile
|
||||
===================================================================
|
||||
--- linux-2.6.35.9.orig/drivers/misc/Makefile 2010-12-20 19:04:59.494200153 +0100
|
||||
+++ linux-2.6.35.9/drivers/misc/Makefile 2010-12-20 19:06:04.000000000 +0100
|
||||
@@ -9,6 +9,7 @@
|
||||
obj-$(CONFIG_ATMEL_PWM) += atmel_pwm.o
|
||||
obj-$(CONFIG_ATMEL_SSC) += atmel-ssc.o
|
||||
obj-$(CONFIG_ATMEL_TCLIB) += atmel_tclib.o
|
||||
+obj-$(CONFIG_AT91_ADC) += at91-adc.o
|
||||
obj-$(CONFIG_ICS932S401) += ics932s401.o
|
||||
obj-$(CONFIG_LKDTM) += lkdtm.o
|
||||
obj-$(CONFIG_TIFM_CORE) += tifm_core.o
|
||||
Loading…
Reference in New Issue