ralink: add support for mt7628

Signed-off-by: John Crispin <blogic@openwrt.org>

SVN-Revision: 43197
owl
John Crispin 2014-11-06 09:31:31 +00:00
parent f8404aaf9e
commit cadf517107
11 changed files with 518 additions and 4 deletions

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@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk
ARCH:=mipsel
BOARD:=ramips
BOARDNAME:=Ralink RT288x/RT3xxx
SUBTARGETS:=rt305x mt7620a mt7620n mt7621 rt3883 rt288x
SUBTARGETS:=rt305x mt7620a mt7620n mt7621 mt7628 rt3883 rt288x
FEATURES:=squashfs gpio
MAINTAINER:=John Crispin <blogic@openwrt.org>

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@ -115,6 +115,7 @@ ramips_setup_interfaces()
dir-320-b1 | \
dir-615-h1 | \
hlk-rm04 | \
mt7628 | \
mzk-w300nh2 | \
mzk-750dhp | \
whr-300hp2 | \

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@ -6,12 +6,12 @@
. /lib/ramips.sh
ramips_set_preinit_iface() {
RT3X5X=`cat /proc/cpuinfo | egrep "(RT3.5|RT5350)"`
RT3X5X=`cat /proc/cpuinfo | egrep "(RT3.5|RT5350|MT7628)"`
if [ -n "${RT3X5X}" ]; then
swconfig dev rt305x set reset 1
fi
if echo $RT3X5X | grep -q RT5350; then
if echo $RT3X5X | egrep -q "(RT5350|MT7628)"; then
# This is a dirty hack to get by while the switch
# problem is investigated. When VLAN is disabled, ICMP
# pings work as expected, but TCP connections time

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@ -355,6 +355,9 @@ ramips_board_detect() {
*"Lenovo Y1S")
name="y1s"
;;
*"Mediatek MT7628AN evaluation board")
name="mt7628"
;;
*)
name="generic"
;;

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@ -0,0 +1,59 @@
/dts-v1/;
/include/ "mt7628an.dtsi"
/ {
compatible = "mediatek,mt7628an-eval-board", "mediatek,mt7628an-soc";
model = "Mediatek MT7628AN evaluation board";
memory@0 {
reg = <0x0 0x2000000>;
};
chosen {
bootargs = "console=ttyS0,57600 init=/init";
};
palmbus@10000000 {
spi@b00 {
status = "okay";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "en25q64";
reg = <0 0>;
linux,modalias = "m25p80", "en25q64";
spi-max-frequency = <10000000>;
m25p,chunked-io = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
label = "firmware";
reg = <0x50000 0x7b0000>;
};
};
};
};
pcie@10140000 {
status = "okay";
};
};

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@ -0,0 +1,222 @@
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "ralink,mtk7628an-soc";
cpus {
cpu@0 {
compatible = "mips,mips24KEc";
};
};
cpuintc: cpuintc@0 {
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
compatible = "mti,cpu-interrupt-controller";
};
palmbus@10000000 {
compatible = "palmbus";
reg = <0x10000000 0x200000>;
ranges = <0x0 0x10000000 0x1FFFFF>;
#address-cells = <1>;
#size-cells = <1>;
sysc@0 {
compatible = "ralink,mt7620a-sysc";
reg = <0x0 0x100>;
};
watchdog@120 {
compatible = "ralink,mt7628an-wdt", "mtk,mt7621-wdt";
reg = <0x120 0x10>;
resets = <&rstctrl 8>;
reset-names = "wdt";
interrupt-parent = <&intc>;
interrupts = <24>;
};
intc: intc@200 {
compatible = "ralink,mt7628an-intc", "ralink,rt2880-intc";
reg = <0x200 0x100>;
resets = <&rstctrl 9>;
reset-names = "intc";
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&cpuintc>;
interrupts = <2>;
ralink,intc-registers = <0x9c 0xa0
0x6c 0xa4
0x80 0x78>;
};
memc@300 {
compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
reg = <0x300 0x100>;
resets = <&rstctrl 20>;
reset-names = "mc";
interrupt-parent = <&intc>;
interrupts = <3>;
};
gpio@600 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "mtk,mt7628-gpio", "mtk,mt7621-gpio";
reg = <0x600 0x100>;
gpio0: bank@0 {
reg = <0>;
compatible = "mtk,mt7621-gpio-bank";
gpio-controller;
#gpio-cells = <2>;
};
gpio1: bank@1 {
reg = <1>;
compatible = "mtk,mt7621-gpio-bank";
gpio-controller;
#gpio-cells = <2>;
};
gpio2: bank@2 {
reg = <2>;
compatible = "mtk,mt7621-gpio-bank";
gpio-controller;
#gpio-cells = <2>;
};
};
spi@b00 {
compatible = "ralink,mt7621-spi";
reg = <0xb00 0x100>;
resets = <&rstctrl 18>;
reset-names = "spi";
#address-cells = <1>;
#size-cells = <1>;
pinctrl-names = "default";
pinctrl-0 = <&spi_pins>;
status = "disabled";
};
uartlite@c00 {
compatible = "ns16550a";
reg = <0xc00 0x100>;
reg-shift = <2>;
reg-io-width = <4>;
no-loopback-test;
resets = <&rstctrl 12>;
reset-names = "uartl";
interrupt-parent = <&intc>;
interrupts = <20>;
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
};
};
pinctrl {
compatible = "ralink,rt2880-pinmux";
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
state_default: pinctrl0 {
};
spi_pins: spi {
spi {
ralink,group = "spi";
ralink,function = "spi";
};
};
uart0_pins: uartlite {
uart {
ralink,group = "uart0";
ralink,function = "uart";
};
};
};
rstctrl: rstctrl {
compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
#reset-cells = <1>;
};
usbphy {
compatible = "ralink,mt7628an-usbphy", "ralink,mt7620a-usbphy";
resets = <&rstctrl 22>;
reset-names = "host";
};
ehci@101c0000 {
compatible = "ralink,rt3xxx-ehci";
reg = <0x101c0000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <18>;
};
ohci@101c1000 {
compatible = "ralink,rt3xxx-ohci";
reg = <0x101c1000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <18>;
};
ethernet@10100000 {
compatible = "ralink,rt5350-eth";
reg = <0x10100000 10000>;
interrupt-parent = <&cpuintc>;
interrupts = <5>;
};
esw@10110000 {
compatible = "ralink,rt3050-esw";
reg = <0x10110000 8000>;
interrupt-parent = <&intc>;
interrupts = <17>;
};
pcie@10140000 {
compatible = "mediatek,mt7620-pci";
reg = <0x10140000 0x100
0x10142000 0x100>;
ranges = <0x2000000 0 0x8000000 0x2000000 0 0x1000000 /* pci memory */
0x1000000 0 0x00000000 0x10160000 0 0x10000>; /* io space */
resets = <&rstctrl 26>;
reset-names = "pcie0";
interrupt-parent = <&cpuintc>;
interrupts = <4>;
status = "disabled";
pcie-bridge {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
};
};
};

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@ -848,6 +848,18 @@ define Image/Build/Profile/Default
endef
endif
#
# MT7628 Profiles
#
Image/Build/Profile/MT7628=$(call BuildFirmware/Default4M/$(1),$(1),mt7628,MT7628)
ifeq ($(SUBTARGET),mt7628)
define Image/Build/Profile/Default
$(call Image/Build/Profile/MT7628,$(1))
endef
endif
#
# Generic Targets

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@ -0,0 +1,184 @@
CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
CONFIG_ARCH_DISCARD_MEMBLOCK=y
CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
CONFIG_ARCH_HAS_RESET_CONTROLLER=y
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
CONFIG_ARCH_REQUIRE_GPIOLIB=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_AT803X_PHY=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CEVT_R4K=y
CONFIG_CLKDEV_LOOKUP=y
CONFIG_CLKEVT_RT3352=y
CONFIG_CLKSRC_MMIO=y
CONFIG_CLKSRC_OF=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMDLINE="rootfstype=squashfs,jffs2"
CONFIG_CMDLINE_BOOL=y
# CONFIG_CMDLINE_OVERRIDE is not set
CONFIG_CPU_GENERIC_DUMP_TLB=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS32_R1 is not set
CONFIG_CPU_MIPS32_R2=y
CONFIG_CPU_MIPSR2=y
CONFIG_CPU_R4K_CACHE_TLB=y
CONFIG_CPU_R4K_FPU=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
CONFIG_CSRC_R4K=y
CONFIG_DEBUG_PINCTRL=y
CONFIG_DMA_NONCOHERENT=y
# CONFIG_DTB_MT7620A_EVAL is not set
# CONFIG_DTB_MT7628AN_EVAL is not set
CONFIG_DTB_RT_NONE=y
CONFIG_DTC=y
CONFIG_EARLY_PRINTK=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_IO=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_NET_UTILS=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_DEVRES=y
CONFIG_GPIO_MT7621=y
# CONFIG_GPIO_RALINK is not set
CONFIG_GPIO_SYSFS=y
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
CONFIG_HAVE_CC_STACKPROTECTOR=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_CONTEXT_TRACKING=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_HAVE_DEBUG_KMEMLEAK=y
CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
CONFIG_HAVE_DMA_API_DEBUG=y
CONFIG_HAVE_DMA_ATTRS=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_KVM=y
CONFIG_HAVE_MACH_CLKDEV=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
CONFIG_HAVE_NET_DSA=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=m
CONFIG_HZ_PERIODIC=y
CONFIG_ICPLUS_PHY=y
CONFIG_IMAGE_CMDLINE_HACK=y
CONFIG_INET_LRO=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQCHIP=y
CONFIG_IRQ_CPU=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_INTC=y
CONFIG_IRQ_WORK=y
CONFIG_MDIO_BOARDINFO=y
CONFIG_MIPS=y
# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MACHINE is not set
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_O32_FP64_SUPPORT is not set
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MT7621_WDT=y
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_M25P80=y
CONFIG_MTD_NAND_MT7620=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_SPLIT_FIRMWARE=y
CONFIG_MTD_UIMAGE_SPLIT=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NET_RALINK=y
CONFIG_NET_RALINK_ESW_RT3052=y
# CONFIG_NET_RALINK_MT7620 is not set
CONFIG_NET_RALINK_RT305X=y
CONFIG_NLS=m
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_MDIO=y
CONFIG_OF_MTD=y
CONFIG_OF_NET=y
CONFIG_OF_PCI=y
CONFIG_OF_PCI_IRQ=y
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PHYLIB=y
# CONFIG_PINCONF is not set
CONFIG_PINCTRL=y
CONFIG_PINCTRL_RT2880=y
# CONFIG_PINCTRL_SINGLE is not set
# CONFIG_PREEMPT_RCU is not set
CONFIG_RALINK=y
CONFIG_RALINK_USBPHY=y
# CONFIG_RALINK_WDT is not set
CONFIG_RA_NAT_NONE=y
# CONFIG_RCU_STALL_COMMON is not set
CONFIG_RESET_CONTROLLER=y
# CONFIG_SCSI_DMA is not set
CONFIG_SERIAL_8250_NR_UARTS=4
CONFIG_SERIAL_8250_RT288X=y
CONFIG_SERIAL_OF_PLATFORM=y
# CONFIG_SLAB is not set
CONFIG_SLUB=y
CONFIG_SOC_MT7620=y
# CONFIG_SOC_MT7621 is not set
# CONFIG_SOC_RT288X is not set
# CONFIG_SOC_RT305X is not set
# CONFIG_SOC_RT3883 is not set
CONFIG_SPI=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_RT2880=y
CONFIG_SWCONFIG=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_USB=m
CONFIG_USB_COMMON=m
# CONFIG_USB_EHCI_HCD is not set
CONFIG_USB_PHY=y
CONFIG_USB_SUPPORT=y
# CONFIG_USB_UHCI_HCD is not set
CONFIG_USE_OF=y
CONFIG_WATCHDOG_CORE=y
CONFIG_ZONE_DMA_FLAG=0

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@ -0,0 +1,18 @@
#
# Copyright (C) 2011 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
define Profile/Default
NAME:=Default Profile
PACKAGES:=\
kmod-usb-core kmod-usb2 kmod-usb-ohci \
kmod-ledtrig-usbdev
endef
define Profile/Default/Description
Default package set compatible with most boards.
endef
$(eval $(call Profile,Default))

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@ -0,0 +1,15 @@
#
# Copyright (C) 2009 OpenWrt.org
#
SUBTARGET:=mt7628
BOARDNAME:=MT7628 based boards
ARCH_PACKAGES:=ramips_24kec
FEATURES+=usb
CPU_TYPE:=24kec
CPU_SUBTYPE:=dsp
define Target/Description
Build firmware images for Ralink MT7628 based boards.
endef