mirror of https://github.com/hak5/openwrt-owl.git
ar71xx: add support for the OpenMesh OM2P-HS board
Signed-off-by: Marek Lindner <lindner_marek@yahoo.de> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 33800owl
parent
8fc2b30281
commit
c5a32cfc92
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@ -88,6 +88,7 @@ get_status_led() {
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status_led="nbg460n:green:power"
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;;
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om2p | \
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om2p-hs | \
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om2p-lc)
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status_led="om2p:blue:power"
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;;
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@ -78,6 +78,7 @@ nbg460n_550n_550nh)
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;;
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om2p | \
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om2p-hs | \
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om2p-lc)
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ucidef_set_led_netdev "port1" "port1" "om2p:blue:wan" "eth0"
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ucidef_set_led_netdev "port2" "port2" "om2p:blue:lan" "eth1"
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@ -237,6 +237,9 @@ ar71xx_board_detect() {
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*OM2P)
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name="om2p"
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;;
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*"OM2P HS")
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name="om2p-hs"
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;;
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*"OM2P LC")
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name="om2p-lc"
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;;
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@ -174,3 +174,71 @@ static void __init om2p_lc_setup(void)
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}
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MIPS_MACHINE(ATH79_MACH_OM2P_LC, "OM2P-LC", "OpenMesh OM2P LC", om2p_lc_setup);
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static void __init om2p_hs_gmac_setup(void)
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{
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void __iomem *base;
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u32 t;
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base = ioremap(AR934X_GMAC_BASE, AR934X_GMAC_SIZE);
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t = __raw_readl(base + AR934X_GMAC_REG_ETH_CFG);
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t &= ~(AR934X_ETH_CFG_RGMII_GMAC0 | AR934X_ETH_CFG_MII_GMAC0 |
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AR934X_ETH_CFG_GMII_GMAC0 | AR934X_ETH_CFG_SW_ONLY_MODE |
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AR934X_ETH_CFG_SW_PHY_SWAP);
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t |= AR934X_ETH_CFG_SW_PHY_SWAP;
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__raw_writel(t, base + AR934X_GMAC_REG_ETH_CFG);
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t = __raw_readl(base + AR934X_GMAC_REG_ETH_CFG);
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iounmap(base);
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}
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static void __init om2p_hs_setup(void)
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{
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u8 *mac1 = (u8 *)KSEG1ADDR(0x1ffc0000);
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u8 *mac2 = (u8 *)KSEG1ADDR(0x1ffc0000 + ETH_ALEN);
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u8 *art = (u8 *)KSEG1ADDR(0x1ffc1000);
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/* make lan / wan leds software controllable */
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ath79_gpio_output_select(OM2P_GPIO_LED_LAN, AR934X_GPIO_OUT_GPIO);
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ath79_gpio_output_select(OM2P_GPIO_LED_WAN, AR934X_GPIO_OUT_GPIO);
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/* enable reset button */
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ath79_gpio_output_select(OM2P_GPIO_BTN_RESET, AR934X_GPIO_OUT_GPIO);
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ath79_gpio_function_enable(AR933X_GPIO_FUNC_JTAG_DISABLE);
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om2p_leds_gpio[4].gpio = OM2P_GPIO_LED_WAN;
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om2p_leds_gpio[5].gpio = OM2P_GPIO_LED_LAN;
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ath79_register_m25p80(&om2p_lc_flash_data);
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ath79_register_leds_gpio(-1, ARRAY_SIZE(om2p_leds_gpio),
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om2p_leds_gpio);
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ath79_register_gpio_keys_polled(-1, OM2P_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(om2p_gpio_keys),
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om2p_gpio_keys);
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ath79_register_wmac(art, NULL);
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om2p_hs_gmac_setup();
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ath79_register_mdio(1, 0x0);
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ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0);
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ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0);
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/* GMAC0 is connected to the PHY0 of the internal switch */
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ath79_switch_data.phy4_mii_en = 1;
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ath79_switch_data.phy_poll_mask = BIT(0);
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
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ath79_eth0_data.phy_mask = BIT(0);
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ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
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ath79_register_eth(0);
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/* GMAC1 is connected to the internal switch */
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ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
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ath79_register_eth(1);
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}
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MIPS_MACHINE(ATH79_MACH_OM2P_HS, "OM2P-HS", "OpenMesh OM2P HS", om2p_hs_setup);
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@ -6,12 +6,12 @@
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#
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define Profile/OM2P
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NAME:=OpenMesh OM2P/OM2P-LC
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NAME:=OpenMesh OM2P/OM2P-HS/OM2P-LC
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PACKAGES:=kmod-ath9k om-watchdog
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endef
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define Profile/OM2P/Description
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Package set optimized for the OpenMesh OM2P/OM2P-LC.
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Package set optimized for the OpenMesh OM2P/OM2P-HS/OM2P-LC.
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endef
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$(eval $(call Profile,OM2P))
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@ -0,0 +1,10 @@
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--- a/arch/mips/ath79/machtypes.h 2012-10-12 21:42:29.000000000 +0800
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+++ b/arch/mips/ath79/machtypes.h 2012-10-12 21:43:28.000000000 +0800
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@@ -45,6 +45,7 @@
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ATH79_MACH_MZK_W04NU, /* Planex MZK-W04NU */
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ATH79_MACH_MZK_W300NH, /* Planex MZK-W300NH */
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ATH79_MACH_NBG460N, /* Zyxel NBG460N/550N/550NH */
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+ ATH79_MACH_OM2P_HS, /* OpenMesh OM2P-HS */
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ATH79_MACH_OM2P_LC, /* OpenMesh OM2P-LC */
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ATH79_MACH_OM2P, /* OpenMesh OM2P */
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ATH79_MACH_PB42, /* Atheros PB42 */
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