mirror of https://github.com/hak5/openwrt-owl.git
kernel/3.10: rework MIPS FPU emulation disable patch
Get rid of some ifdefs, and make sure that the microMIPS specific code is disabled as well. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 37506owl
Gabor Juhos
parent
0cc1e2acb4
commit
bc91bec9f6
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@ -20,7 +20,7 @@ Signed-off-by: Florian Fainelli <florian@openwrt.org>
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+ FPU emulator enabled. Turning off this option results in a kernel which
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+ FPU emulator enabled. Turning off this option results in a kernel which
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+ does not catch floating operations exceptions. Make sure that your toolchain
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+ does not catch floating operations exceptions. Make sure that your toolchain
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+ is configured to enable software floating point emulation in that case.
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+ is configured to enable software floating point emulation in that case.
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+
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+
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+ If unsure say Y here.
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+ If unsure say Y here.
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+
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+
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config MIPS_MSC
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config MIPS_MSC
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@ -28,12 +28,13 @@ Signed-off-by: Florian Fainelli <florian@openwrt.org>
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--- a/arch/mips/math-emu/Makefile
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--- a/arch/mips/math-emu/Makefile
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+++ b/arch/mips/math-emu/Makefile
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+++ b/arch/mips/math-emu/Makefile
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@@ -2,10 +2,11 @@
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@@ -2,10 +2,12 @@
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# Makefile for the Linux/MIPS kernel FPU emulation.
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# Makefile for the Linux/MIPS kernel FPU emulation.
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#
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#
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-obj-y := cp1emu.o ieee754m.o ieee754d.o ieee754dp.o ieee754sp.o ieee754.o \
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-obj-y := cp1emu.o ieee754m.o ieee754d.o ieee754dp.o ieee754sp.o ieee754.o \
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+obj-y := kernel_linkage.o dsemul.o cp1emu.o
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+obj-y := kernel_linkage.o
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+
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+obj-$(CONFIG_MIPS_FPU_EMU) += ieee754m.o ieee754d.o ieee754dp.o ieee754sp.o ieee754.o \
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+obj-$(CONFIG_MIPS_FPU_EMU) += ieee754m.o ieee754d.o ieee754dp.o ieee754sp.o ieee754.o \
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ieee754xcpt.o dp_frexp.o dp_modf.o dp_div.o dp_mul.o dp_sub.o \
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ieee754xcpt.o dp_frexp.o dp_modf.o dp_div.o dp_mul.o dp_sub.o \
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dp_add.o dp_fsp.o dp_cmp.o dp_logb.o dp_scalb.o dp_simple.o \
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dp_add.o dp_fsp.o dp_cmp.o dp_logb.o dp_scalb.o dp_simple.o \
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@ -41,121 +42,7 @@ Signed-off-by: Florian Fainelli <florian@openwrt.org>
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sp_div.o sp_mul.o sp_sub.o sp_add.o sp_fdp.o sp_cmp.o sp_logb.o \
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sp_div.o sp_mul.o sp_sub.o sp_add.o sp_fdp.o sp_cmp.o sp_logb.o \
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sp_scalb.o sp_simple.o sp_tint.o sp_fint.o sp_tlong.o sp_flong.o \
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sp_scalb.o sp_simple.o sp_tint.o sp_fint.o sp_tlong.o sp_flong.o \
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- dp_sqrt.o sp_sqrt.o kernel_linkage.o dsemul.o
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- dp_sqrt.o sp_sqrt.o kernel_linkage.o dsemul.o
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+ dp_sqrt.o sp_sqrt.o
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+ dp_sqrt.o sp_sqrt.o dsemul.o cp1emu.o
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--- a/arch/mips/math-emu/cp1emu.c
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+++ b/arch/mips/math-emu/cp1emu.c
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@@ -59,7 +59,11 @@
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#define __mips 4
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/* Function which emulates a floating point instruction. */
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+#ifdef CONFIG_DEBUG_FS
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+DEFINE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats);
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+#endif
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+#ifdef CONFIG_MIPS_FPU_EMU
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static int fpu_emu(struct pt_regs *, struct mips_fpu_struct *,
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mips_instruction);
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@@ -70,10 +74,6 @@ static int fpux_emu(struct pt_regs *,
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/* Further private data for which no space exists in mips_fpu_struct */
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-#ifdef CONFIG_DEBUG_FS
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-DEFINE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats);
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-#endif
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-
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/* Control registers */
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#define FPCREG_RID 0 /* $0 = revision id */
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@@ -82,11 +82,15 @@ DEFINE_PER_CPU(struct mips_fpu_emulator_
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/* Determine rounding mode from the RM bits of the FCSR */
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#define modeindex(v) ((v) & FPU_CSR_RM)
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+#endif /* CONFIG_MIPS_FPU_EMU */
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+
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/* microMIPS bitfields */
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#define MM_POOL32A_MINOR_MASK 0x3f
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#define MM_POOL32A_MINOR_SHIFT 0x6
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#define MM_MIPS32_COND_FC 0x30
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+#ifdef CONFIG_MIPS_FPU_EMU
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+
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/* Convert Mips rounding mode (0..3) to IEEE library modes. */
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static const unsigned char ieee_rm[4] = {
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[FPU_CSR_RN] = IEEE754_RN,
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@@ -116,9 +120,13 @@ static const unsigned int fpucondbit[8]
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};
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#endif
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+#endif /* CONFIG_MIPS_FPU_EMU */
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+
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/* (microMIPS) Convert 16-bit register encoding to 32-bit register encoding. */
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static const unsigned int reg16to32map[8] = {16, 17, 2, 3, 4, 5, 6, 7};
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+#ifdef CONFIG_MIPS_FPU_EMU
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+
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/* (microMIPS) Convert certain microMIPS instructions to MIPS32 format. */
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static const int sd_format[] = {16, 17, 0, 0, 0, 0, 0, 0};
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static const int sdps_format[] = {16, 17, 22, 0, 0, 0, 0, 0};
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@@ -463,6 +471,8 @@ static int microMIPS32_to_MIPS32(union m
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return 0;
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}
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+#endif /* CONFIG_MIPS_FPU_EMU */
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+
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int mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
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unsigned long *contpc)
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{
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@@ -667,6 +677,8 @@ int mm_isBranchInstr(struct pt_regs *reg
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return 0;
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}
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+#ifdef CONFIG_MIPS_FPU_EMU
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+
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/*
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* Redundant with logic already in kernel/branch.c,
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* embedded in compute_return_epc. At some point,
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@@ -2102,7 +2114,6 @@ int fpu_emulator_cop1Handler(struct pt_r
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return sig;
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}
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-
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#ifdef CONFIG_DEBUG_FS
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static int fpuemu_stat_get(void *data, u64 *val)
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@@ -2151,4 +2162,11 @@ static int __init debugfs_fpuemu(void)
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return 0;
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}
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__initcall(debugfs_fpuemu);
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-#endif
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+#endif /* CONFIG_DEBUGFS */
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+#else
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+int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
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+ int has_fpu, void *__user *fault_addr)
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+{
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+ return 0;
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+}
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+#endif /* CONFIG_MIPS_FPU_EMU */
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--- a/arch/mips/math-emu/dsemul.c
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+++ b/arch/mips/math-emu/dsemul.c
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@@ -119,6 +119,7 @@ int mips_dsemul(struct pt_regs *regs, mi
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return SIGILL; /* force out of emulation loop */
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}
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+#ifdef CONFIG_MIPS_FPU_EMU
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int do_dsemulret(struct pt_regs *xcp)
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{
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struct emuframe __user *fr;
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@@ -182,3 +183,9 @@ int do_dsemulret(struct pt_regs *xcp)
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return 1;
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}
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+#else
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+int do_dsemulret(struct pt_regs *xcp)
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+{
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+ return 0;
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+}
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+#endif /* CONFIG_MIPS_FPU_EMU */
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--- a/arch/mips/math-emu/kernel_linkage.c
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--- a/arch/mips/math-emu/kernel_linkage.c
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+++ b/arch/mips/math-emu/kernel_linkage.c
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+++ b/arch/mips/math-emu/kernel_linkage.c
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@@ -29,6 +29,7 @@
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@@ -29,6 +29,7 @@
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@ -166,12 +53,11 @@ Signed-off-by: Florian Fainelli <florian@openwrt.org>
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void fpu_emulator_init_fpu(void)
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void fpu_emulator_init_fpu(void)
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{
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{
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static int first = 1;
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static int first = 1;
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@@ -112,4 +113,36 @@ int fpu_emulator_restore_context32(struc
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@@ -113,3 +114,36 @@ int fpu_emulator_restore_context32(struc
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return err;
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return err;
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}
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}
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-#endif
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#endif
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+#endif /* CONFIG_64BIT */
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+
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+#else
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+#else
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+
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+
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+void fpu_emulator_init_fpu(void)
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+void fpu_emulator_init_fpu(void)
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@ -191,6 +77,7 @@ Signed-off-by: Florian Fainelli <florian@openwrt.org>
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+ return 0;
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+ return 0;
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+}
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+}
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+
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+
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+#ifdef CONFIG_64BIT
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+int fpu_emulator_save_context32(struct sigcontext32 __user *sc)
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+int fpu_emulator_save_context32(struct sigcontext32 __user *sc)
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+{
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+{
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+ return 0;
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+ return 0;
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@ -200,7 +87,74 @@ Signed-off-by: Florian Fainelli <florian@openwrt.org>
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+{
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+{
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+ return 0;
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+ return 0;
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+}
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+}
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+#endif /* CONFIG_64BIT */
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+
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+
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+#ifdef CONFIG_64BIT
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+#endif /* CONFIG_64BIT */
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+#endif /* CONFIG_MIPS_FPU_EMU */
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+#endif /* CONFIG_MIPS_FPU_EMU */
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--- a/arch/mips/include/asm/fpu_emulator.h
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+++ b/arch/mips/include/asm/fpu_emulator.h
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@@ -27,6 +27,8 @@
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#include <asm/inst.h>
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#include <asm/local.h>
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+#ifdef CONFIG_MIPS_FPU_EMU
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+
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#ifdef CONFIG_DEBUG_FS
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struct mips_fpu_emulator_stats {
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@@ -60,6 +62,38 @@ extern int fpu_emulator_cop1Handler(stru
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int process_fpemu_return(int sig, void __user *fault_addr);
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int mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
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unsigned long *contpc);
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+#else
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+static inline int mips_dsemul(struct pt_regs *regs, mips_instruction ir,
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+ unsigned long cpc)
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+{
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+ return 0;
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+}
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+
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+static inline int do_dsemulret(struct pt_regs *xcp)
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+{
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+ return 0;
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+}
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+
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+static inline int fpu_emulator_cop1Handler(struct pt_regs *xcp,
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+ struct mips_fpu_struct *ctx,
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+ int has_fpu,
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+ void *__user *fault_addr)
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+{
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+ return 0;
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+}
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+
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+static inline int process_fpemu_return(int sig, void __user *fault_addr)
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+{
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+ return -EINVAL;
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+}
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+
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+static inline int mm_isBranchInstr(struct pt_regs *regs,
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+ struct mm_decoded_insn dec_insn,
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+ unsigned long *contpc)
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+{
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+ return 0;
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+}
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+#endif /* CONFIG_MIPS_FPU_EMU */
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/*
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* Instruction inserted following the badinst to further tag the sequence
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--- a/arch/mips/kernel/traps.c
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+++ b/arch/mips/kernel/traps.c
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@@ -684,6 +684,7 @@ asmlinkage void do_ov(struct pt_regs *re
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force_sig_info(SIGFPE, &info, current);
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}
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+#ifdef CONFIG_MIPS_FPU_EMU
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int process_fpemu_return(int sig, void __user *fault_addr)
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{
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if (sig == SIGSEGV || sig == SIGBUS) {
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@@ -707,6 +708,7 @@ int process_fpemu_return(int sig, void _
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return 0;
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}
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}
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+#endif /* CONFIG_MIPS_FPU_EMU */
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/*
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* XXX Delayed fp exceptions when doing a lazy ctx switch XXX
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