ar71xx: use backported PCI_MEM_SIZE patches

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>

SVN-Revision: 35470
owl
Gabor Juhos 2013-02-02 18:17:58 +00:00
parent b9b341f05a
commit b1168e70d3
4 changed files with 72 additions and 45 deletions

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@ -0,0 +1,39 @@
From 4c960910e2fb3a301ee4a504fa6b2c5204efeab0 Mon Sep 17 00:00:00 2001
From: Gabor Juhos <juhosg@openwrt.org>
Date: Tue, 29 Jan 2013 08:27:03 +0000
Subject: [PATCH] MIPS: AR724x: Fix AR724X_PCI_MEM_SIZE
commit 4c960910e2fb3a301ee4a504fa6b2c5204efeab0 upstream.
The base address of the PCI memory is
0x10000000 and the base address of the
PCI configuration space is 0x14000000
on the AR724x SoCs.
The AR724X_PCI_MEM_SIZE is defined as
0x08000000 which is wrong because that
overlaps with the configuration space.
The patch fixes the value of the
AR724X_PCI_MEM_SIZE constant, in order
to avoid this resource conflicts.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4872/
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---
arch/mips/pci/pci-ar724x.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/mips/pci/pci-ar724x.c
+++ b/arch/mips/pci/pci-ar724x.c
@@ -21,7 +21,7 @@
#define AR724X_PCI_CTRL_SIZE 0x100
#define AR724X_PCI_MEM_BASE 0x10000000
-#define AR724X_PCI_MEM_SIZE 0x08000000
+#define AR724X_PCI_MEM_SIZE 0x04000000
#define AR724X_PCI_REG_RESET 0x18
#define AR724X_PCI_REG_INT_STATUS 0x4c

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@ -0,0 +1,33 @@
From fe950df70013a9f3368918aab697eec15f80ac67 Mon Sep 17 00:00:00 2001
From: Gabor Juhos <juhosg@openwrt.org>
Date: Tue, 29 Jan 2013 08:27:04 +0000
Subject: [PATCH] MIPS: AR71xx: Fix AR71XX_PCI_MEM_SIZE
commit fe950df70013a9f3368918aab697eec15f80ac67 upstream.
The base address of the PCI memory is 0x10000000 and the base address of the
PCI configuration space is 0x17000000 on the AR71xx SoCs.
The AR71XX_PCI_MEM_SIZE is defined as 0x08000000 which is wrong because that
overlaps with the configuration space. This patch fixes the value of the
AR71XX_PCI_MEM_SIZE constant, in order to avoid this resource conflicts.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4873/
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---
arch/mips/pci/pci-ar71xx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/mips/pci/pci-ar71xx.c
+++ b/arch/mips/pci/pci-ar71xx.c
@@ -24,7 +24,7 @@
#include <asm/mach-ath79/pci.h>
#define AR71XX_PCI_MEM_BASE 0x10000000
-#define AR71XX_PCI_MEM_SIZE 0x08000000
+#define AR71XX_PCI_MEM_SIZE 0x07000000
#define AR71XX_PCI_WIN0_OFFS 0x10000000
#define AR71XX_PCI_WIN1_OFFS 0x11000000

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@ -1,24 +0,0 @@
From 4b0f8aaea1f9e2f931c4de785d9ce46ff7164627 Mon Sep 17 00:00:00 2001
From: Gabor Juhos <juhosg@openwrt.org>
Date: Sun, 17 Jun 2012 12:55:24 +0200
Subject: [PATCH 02/34] MIPS: pci-ar724x: use correct value for AR724X_PCI_MEM_SIZE
The current definiton is wrong, it is conflicting
with AR724X_PCI_CFG_BASE.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
arch/mips/pci/pci-ar724x.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
--- a/arch/mips/pci/pci-ar724x.c
+++ b/arch/mips/pci/pci-ar724x.c
@@ -21,7 +21,7 @@
#define AR724X_PCI_CTRL_SIZE 0x100
#define AR724X_PCI_MEM_BASE 0x10000000
-#define AR724X_PCI_MEM_SIZE 0x08000000
+#define AR724X_PCI_MEM_SIZE 0x04000000
#define AR724X_PCI_REG_RESET 0x18
#define AR724X_PCI_REG_INT_STATUS 0x4c

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@ -1,21 +0,0 @@
From 01dbfe17b8ff628b6e2b3c75e1fc8c11d4cca644 Mon Sep 17 00:00:00 2001
From: Gabor Juhos <juhosg@openwrt.org>
Date: Thu, 28 Jun 2012 19:19:58 +0200
Subject: [PATCH 03/34] MIPS: pci-ar71xx: fix AR71XX_PCI_MEM_SIZE
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
arch/mips/pci/pci-ar71xx.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
--- a/arch/mips/pci/pci-ar71xx.c
+++ b/arch/mips/pci/pci-ar71xx.c
@@ -24,7 +24,7 @@
#include <asm/mach-ath79/pci.h>
#define AR71XX_PCI_MEM_BASE 0x10000000
-#define AR71XX_PCI_MEM_SIZE 0x08000000
+#define AR71XX_PCI_MEM_SIZE 0x07000000
#define AR71XX_PCI_WIN0_OFFS 0x10000000
#define AR71XX_PCI_WIN1_OFFS 0x11000000