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brcm63xx: Use model name for ADB P.DG A4001N1 

This patch also makes use of the new leds script.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Signed-off-by: Jonas Gorski <jogo@openwrt.org>

SVN-Revision: 41585
owl
Jonas Gorski 2014-07-12 12:31:30 +00:00
parent ba3988fb16
commit aee666d8f9
11 changed files with 42 additions and 39 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
target/linux/brcm63xx/base-files/etc/uci-defaults/01_leds
View File

@ -1,14 +1,16 @@
#!/bin/sh #!/bin/sh
# #
# Copyright (C) 2013 OpenWrt.org # Copyright (C) 2013-2014 OpenWrt.org
# #
. /lib/functions/uci-defaults.sh . /lib/functions/uci-defaults.sh
. /lib/brcm63xx.sh . /lib/brcm63xx.sh
case "$board_name" in case "$board_name" in
963281T_TEF)
ucidef_set_led_netdev "lan" "LAN" "A4001N1:green:eth" "eth0"
ucidef_set_led_usbdev "usb" "USB" "A4001N1:green:3g" "1-1"
;;
'F@ST2704V2') 'F@ST2704V2')
ucidef_set_led_usbdev "usb" "USB" "F@ST2704V2:green:usb" "1-1" ucidef_set_led_usbdev "usb" "USB" "F@ST2704V2:green:usb" "1-1"
;; ;;

2
target/linux/brcm63xx/base-files/lib/brcm63xx.sh
View File

@ -54,7 +54,7 @@ brcm63xx_detect() {
;; ;;
963281T_TEF) 963281T_TEF)
brcm63xx_has_reset_button="true" brcm63xx_has_reset_button="true"
status_led="963281T_TEF:green:power" status_led="A4001N1:green:power"
ifname=eth0 ifname=eth0
;; ;;
96348GW) 96348GW)

3
target/linux/brcm63xx/image/Makefile
View File

@ -173,7 +173,6 @@ define Image/Build
$(call Image/Build/CFE,$(1),963281TAN,6328,963281TAN-4M-flash-generic,,--pad 2) $(call Image/Build/CFE,$(1),963281TAN,6328,963281TAN-4M-flash-generic,,--pad 2)
$(call Image/Build/CFE,$(1),963281TAN,6328,963281TAN-8M-flash-generic,,--pad 4) $(call Image/Build/CFE,$(1),963281TAN,6328,963281TAN-8M-flash-generic,,--pad 4)
$(call Image/Build/CFE,$(1),963281TAN,6328,963281TAN-16M-flash-generic,,--pad 8) $(call Image/Build/CFE,$(1),963281TAN,6328,963281TAN-16M-flash-generic,,--pad 8)
$(call Image/Build/CFE,$(1),963281T_TEF,6328,963281T_TEF-generic,,--pad 8)
$(call Image/Build/CFE,$(1),96345GW2,6345,96345GW2-generic) $(call Image/Build/CFE,$(1),96345GW2,6345,96345GW2-generic)
$(call Image/Build/CFE,$(1),96345GW2,6345,96348GW2-bc221,,--layoutver 5) $(call Image/Build/CFE,$(1),96345GW2,6345,96348GW2-bc221,,--layoutver 5)
$(call Image/Build/CFE,$(1),96345GW2,6345,92345GW2-rev,OpenWRT-$(REVISION)) $(call Image/Build/CFE,$(1),96345GW2,6345,92345GW2-rev,OpenWRT-$(REVISION))
@ -190,6 +189,8 @@ define Image/Build
$(call Image/Build/CFE,$(1),96368MVNgr,6368,96368MVNgr-generic) $(call Image/Build/CFE,$(1),96368MVNgr,6368,96368MVNgr-generic)
$(call Image/Build/CFE,$(1),96368MVWG,6368,96368MVWG-generic) $(call Image/Build/CFE,$(1),96368MVWG,6368,96368MVWG-generic)
# ADB P.DG A4001N1
$(call Image/Build/CFE,$(1),963281T_TEF,6328,A4001N1,,--pad 8)
# Asmax AR 1004g # Asmax AR 1004g
$(call Image/Build/CFEFIXUP,$(1),96348GW-10,AR1004G,6348,AR1004G) $(call Image/Build/CFEFIXUP,$(1),96348GW-10,AR1004G,6348,AR1004G)
# BT Voyager V210_BTR # BT Voyager V210_BTR

28
target/linux/brcm63xx/patches-3.10/530-board_963281T_TEF.patch → target/linux/brcm63xx/patches-3.10/530-board_A4001N1.patch
View File

@ -4,7 +4,7 @@
}, },
}; };
+static struct board_info __initdata board_963281T_TEF = { +static struct board_info __initdata board_A4001N1 = {
+ .name = "963281T_TEF", + .name = "963281T_TEF",
+ .expected_cpu_id = 0x6328, + .expected_cpu_id = 0x6328,
+ +
@ -42,63 +42,63 @@
+ +
+ .leds = { + .leds = {
+ { + {
+ .name = "963281T_TEF:green:power", + .name = "A4001N1:green:power",
+ .gpio = 4, + .gpio = 4,
+ .active_low = 1, + .active_low = 1,
+ .default_trigger = "default-on", + .default_trigger = "default-on",
+ }, + },
+ { + {
+ .name = "963281T_TEF:red:power", + .name = "A4001N1:red:power",
+ .gpio = 8, + .gpio = 8,
+ .active_low = 1, + .active_low = 1,
+ }, + },
+ { + {
+ .name = "963281T_TEF:green:inet", + .name = "A4001N1:green:inet",
+ .gpio = 11, + .gpio = 11,
+ .active_low = 1, + .active_low = 1,
+ }, + },
+ { + {
+ .name = "963281T_TEF:red:inet", + .name = "A4001N1:red:inet",
+ .gpio = 2, + .gpio = 2,
+ .active_low = 1, + .active_low = 1,
+ }, + },
+ { + {
+ .name = "963281T_TEF:green:ppp", + .name = "A4001N1:green:ppp",
+ .gpio = 3, + .gpio = 3,
+ .active_low = 1, + .active_low = 1,
+ }, + },
+ { + {
+ .name = "963281T_TEF:red:ppp", + .name = "A4001N1:red:ppp",
+ .gpio = 5, + .gpio = 5,
+ .active_low = 1, + .active_low = 1,
+ }, + },
+ { + {
+ .name = "963281T_TEF:green:3g", + .name = "A4001N1:green:3g",
+ .gpio = 6, + .gpio = 6,
+ .active_low = 1, + .active_low = 1,
+ }, + },
+ { + {
+ .name = "963281T_TEF:red:3g", + .name = "A4001N1:red:3g",
+ .gpio = 7, + .gpio = 7,
+ .active_low = 1, + .active_low = 1,
+ }, + },
+ { + {
+ .name = "963281T_TEF:green:wlan", + .name = "A4001N1:green:wlan",
+ .gpio = 9, + .gpio = 9,
+ .active_low = 1, + .active_low = 1,
+ }, + },
+ { + {
+ .name = "963281T_TEF:red:wlan", + .name = "A4001N1:red:wlan",
+ .gpio = 10, + .gpio = 10,
+ .active_low = 1, + .active_low = 1,
+ }, + },
+ { + {
+ .name = "963281T_TEF:green:eth", + .name = "A4001N1:green:eth",
+ .gpio = 31, + .gpio = 31,
+ .active_low = 1, + .active_low = 1,
+ }, + },
+ { + {
+ .name = "963281T_TEF:red:eth", + .name = "A4001N1:red:eth",
+ .gpio = 20, + .gpio = 20,
+ .active_low = 1, + .active_low = 1,
+ }, + },
@ -131,7 +131,7 @@
#ifdef CONFIG_BCM63XX_CPU_6328 #ifdef CONFIG_BCM63XX_CPU_6328
&board_96328avng, &board_96328avng,
&board_963281TAN, &board_963281TAN,
+ &board_963281T_TEF, + &board_A4001N1,
&board_dsl_274xb_f1, &board_dsl_274xb_f1,
#endif #endif
#ifdef CONFIG_BCM63XX_CPU_6338 #ifdef CONFIG_BCM63XX_CPU_6338

2
target/linux/brcm63xx/patches-3.10/531-board_96328A-1441N1.patch
View File

@ -86,5 +86,5 @@
&board_96328avng, &board_96328avng,
+ &board_96328A_1441N1, + &board_96328A_1441N1,
&board_963281TAN, &board_963281TAN,
&board_963281T_TEF, &board_A4001N1,
&board_dsl_274xb_f1, &board_dsl_274xb_f1,

2
target/linux/brcm63xx/patches-3.10/532-board_96328a-1241N.patch
View File

@ -81,4 +81,4 @@
+ &board_96328A_1241N, + &board_96328A_1241N,
&board_96328A_1441N1, &board_96328A_1441N1,
&board_963281TAN, &board_963281TAN,
&board_963281T_TEF, &board_A4001N1,

2
target/linux/brcm63xx/patches-3.10/536-board_fast2704.patch
View File

@ -137,7 +137,7 @@ Signed-off-by: Marcin Jurkowski <marcin1j@gmail.com>
.expected_cpu_id = 0x6348, .expected_cpu_id = 0x6348,
@@ -3814,6 +3930,7 @@ static const struct board_info __initcon @@ -3814,6 +3930,7 @@ static const struct board_info __initcon
&board_963281TAN, &board_963281TAN,
&board_963281T_TEF, &board_A4001N1,
&board_dsl_274xb_f1, &board_dsl_274xb_f1,
+ &board_FAST2704V2, + &board_FAST2704V2,
#endif #endif

28
target/linux/brcm63xx/patches-3.14/530-board_963281T_TEF.patch → target/linux/brcm63xx/patches-3.14/530-board_A4001N1.patch
View File

@ -4,7 +4,7 @@
}, },
}; };
+static struct board_info __initdata board_963281T_TEF = { +static struct board_info __initdata board_A4001N1 = {
+ .name = "963281T_TEF", + .name = "963281T_TEF",
+ .expected_cpu_id = 0x6328, + .expected_cpu_id = 0x6328,
+ +
@ -42,63 +42,63 @@
+ +
+ .leds = { + .leds = {
+ { + {
+ .name = "963281T_TEF:green:power", + .name = "A4001N1:green:power",
+ .gpio = 4, + .gpio = 4,
+ .active_low = 1, + .active_low = 1,
+ .default_trigger = "default-on", + .default_trigger = "default-on",
+ }, + },
+ { + {
+ .name = "963281T_TEF:red:power", + .name = "A4001N1:red:power",
+ .gpio = 8, + .gpio = 8,
+ .active_low = 1, + .active_low = 1,
+ }, + },
+ { + {
+ .name = "963281T_TEF:green:inet", + .name = "A4001N1:green:inet",
+ .gpio = 11, + .gpio = 11,
+ .active_low = 1, + .active_low = 1,
+ }, + },
+ { + {
+ .name = "963281T_TEF:red:inet", + .name = "A4001N1:red:inet",
+ .gpio = 2, + .gpio = 2,
+ .active_low = 1, + .active_low = 1,
+ }, + },
+ { + {
+ .name = "963281T_TEF:green:ppp", + .name = "A4001N1:green:ppp",
+ .gpio = 3, + .gpio = 3,
+ .active_low = 1, + .active_low = 1,
+ }, + },
+ { + {
+ .name = "963281T_TEF:red:ppp", + .name = "A4001N1:red:ppp",
+ .gpio = 5, + .gpio = 5,
+ .active_low = 1, + .active_low = 1,
+ }, + },
+ { + {
+ .name = "963281T_TEF:green:3g", + .name = "A4001N1:green:3g",
+ .gpio = 6, + .gpio = 6,
+ .active_low = 1, + .active_low = 1,
+ }, + },
+ { + {
+ .name = "963281T_TEF:red:3g", + .name = "A4001N1:red:3g",
+ .gpio = 7, + .gpio = 7,
+ .active_low = 1, + .active_low = 1,
+ }, + },
+ { + {
+ .name = "963281T_TEF:green:wlan", + .name = "A4001N1:green:wlan",
+ .gpio = 9, + .gpio = 9,
+ .active_low = 1, + .active_low = 1,
+ }, + },
+ { + {
+ .name = "963281T_TEF:red:wlan", + .name = "A4001N1:red:wlan",
+ .gpio = 10, + .gpio = 10,
+ .active_low = 1, + .active_low = 1,
+ }, + },
+ { + {
+ .name = "963281T_TEF:green:eth", + .name = "A4001N1:green:eth",
+ .gpio = 31, + .gpio = 31,
+ .active_low = 1, + .active_low = 1,
+ }, + },
+ { + {
+ .name = "963281T_TEF:red:eth", + .name = "A4001N1:red:eth",
+ .gpio = 20, + .gpio = 20,
+ .active_low = 1, + .active_low = 1,
+ }, + },
@ -131,7 +131,7 @@
#ifdef CONFIG_BCM63XX_CPU_6328 #ifdef CONFIG_BCM63XX_CPU_6328
&board_96328avng, &board_96328avng,
&board_963281TAN, &board_963281TAN,
+ &board_963281T_TEF, + &board_A4001N1,
&board_dsl_274xb_f1, &board_dsl_274xb_f1,
#endif #endif
#ifdef CONFIG_BCM63XX_CPU_6338 #ifdef CONFIG_BCM63XX_CPU_6338

2
target/linux/brcm63xx/patches-3.14/531-board_96328A-1441N1.patch
View File

@ -86,5 +86,5 @@
&board_96328avng, &board_96328avng,
+ &board_96328A_1441N1, + &board_96328A_1441N1,
&board_963281TAN, &board_963281TAN,
&board_963281T_TEF, &board_A4001N1,
&board_dsl_274xb_f1, &board_dsl_274xb_f1,

2
target/linux/brcm63xx/patches-3.14/532-board_96328a-1241N.patch
View File

@ -81,4 +81,4 @@
+ &board_96328A_1241N, + &board_96328A_1241N,
&board_96328A_1441N1, &board_96328A_1441N1,
&board_963281TAN, &board_963281TAN,
&board_963281T_TEF, &board_A4001N1,

2
target/linux/brcm63xx/patches-3.14/536-board_fast2704.patch
View File

@ -137,7 +137,7 @@ Signed-off-by: Marcin Jurkowski <marcin1j@gmail.com>
.expected_cpu_id = 0x6348, .expected_cpu_id = 0x6348,
@@ -3824,6 +3940,7 @@ static const struct board_info __initcon @@ -3824,6 +3940,7 @@ static const struct board_info __initcon
&board_963281TAN, &board_963281TAN,
&board_963281T_TEF, &board_A4001N1,
&board_dsl_274xb_f1, &board_dsl_274xb_f1,
+ &board_FAST2704V2, + &board_FAST2704V2,
#endif #endif