mirror of https://github.com/hak5/openwrt-owl.git
ar71xx: remove obsolete flash chip locking code
Signed-off-by: Felix Fietkau <nbd@nbd.name>owl
parent
a5923cd549
commit
8f23ec609c
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@ -1,37 +0,0 @@
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--- a/arch/mips/ath79/common.c
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+++ b/arch/mips/ath79/common.c
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@@ -22,6 +22,7 @@
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#include "common.h"
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static DEFINE_SPINLOCK(ath79_device_reset_lock);
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+static DEFINE_MUTEX(ath79_flash_mutex);
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u32 ath79_cpu_freq;
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EXPORT_SYMBOL_GPL(ath79_cpu_freq);
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@@ -142,3 +143,16 @@ void ath79_device_reset_clear(u32 mask)
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spin_unlock_irqrestore(&ath79_device_reset_lock, flags);
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}
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EXPORT_SYMBOL_GPL(ath79_device_reset_clear);
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+
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+void ath79_flash_acquire(void)
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+{
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+ mutex_lock(&ath79_flash_mutex);
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+}
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+EXPORT_SYMBOL_GPL(ath79_flash_acquire);
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+
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+void ath79_flash_release(void)
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+{
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+ mutex_unlock(&ath79_flash_mutex);
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+}
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+EXPORT_SYMBOL_GPL(ath79_flash_release);
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+
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--- a/arch/mips/include/asm/mach-ath79/ath79.h
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+++ b/arch/mips/include/asm/mach-ath79/ath79.h
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@@ -145,4 +145,7 @@ static inline u32 ath79_reset_rr(unsigne
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void ath79_device_reset_set(u32 mask);
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void ath79_device_reset_clear(u32 mask);
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+void ath79_flash_acquire(void);
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+void ath79_flash_release(void);
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+
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#endif /* __ASM_MACH_ATH79_H */
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@ -1,19 +1,19 @@
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--- a/arch/mips/include/asm/mach-ath79/ath79.h
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--- a/arch/mips/include/asm/mach-ath79/ath79.h
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+++ b/arch/mips/include/asm/mach-ath79/ath79.h
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+++ b/arch/mips/include/asm/mach-ath79/ath79.h
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@@ -144,6 +144,7 @@ static inline u32 ath79_reset_rr(unsigne
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@@ -144,5 +144,6 @@ static inline u32 ath79_reset_rr(unsigne
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void ath79_device_reset_set(u32 mask);
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void ath79_device_reset_set(u32 mask);
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void ath79_device_reset_clear(u32 mask);
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void ath79_device_reset_clear(u32 mask);
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+u32 ath79_device_reset_get(u32 mask);
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+u32 ath79_device_reset_get(u32 mask);
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void ath79_flash_acquire(void);
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#endif /* __ASM_MACH_ATH79_H */
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void ath79_flash_release(void);
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--- a/arch/mips/ath79/common.c
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--- a/arch/mips/ath79/common.c
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+++ b/arch/mips/ath79/common.c
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+++ b/arch/mips/ath79/common.c
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@@ -144,6 +144,32 @@ void ath79_device_reset_clear(u32 mask)
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@@ -142,3 +142,29 @@ void ath79_device_reset_clear(u32 mask)
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spin_unlock_irqrestore(&ath79_device_reset_lock, flags);
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}
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}
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EXPORT_SYMBOL_GPL(ath79_device_reset_clear);
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EXPORT_SYMBOL_GPL(ath79_device_reset_clear);
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+
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+u32 ath79_device_reset_get(u32 mask)
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+u32 ath79_device_reset_get(u32 mask)
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+{
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+{
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+ unsigned long flags;
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+ unsigned long flags;
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@ -39,7 +39,3 @@
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+ return ret;
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+ return ret;
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+}
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+}
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+EXPORT_SYMBOL_GPL(ath79_device_reset_get);
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+EXPORT_SYMBOL_GPL(ath79_device_reset_get);
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+
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void ath79_flash_acquire(void)
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{
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mutex_lock(&ath79_flash_mutex);
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@ -147,7 +147,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
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else
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else
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--- a/arch/mips/ath79/common.c
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--- a/arch/mips/ath79/common.c
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+++ b/arch/mips/ath79/common.c
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+++ b/arch/mips/ath79/common.c
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@@ -104,6 +104,8 @@ void ath79_device_reset_set(u32 mask)
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@@ -103,6 +103,8 @@ void ath79_device_reset_set(u32 mask)
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reg = AR933X_RESET_REG_RESET_MODULE;
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reg = AR933X_RESET_REG_RESET_MODULE;
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else if (soc_is_ar934x())
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else if (soc_is_ar934x())
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reg = AR934X_RESET_REG_RESET_MODULE;
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reg = AR934X_RESET_REG_RESET_MODULE;
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@ -156,7 +156,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
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else if (soc_is_qca955x())
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else if (soc_is_qca955x())
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reg = QCA955X_RESET_REG_RESET_MODULE;
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reg = QCA955X_RESET_REG_RESET_MODULE;
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else
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else
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@@ -132,6 +134,8 @@ void ath79_device_reset_clear(u32 mask)
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@@ -131,6 +133,8 @@ void ath79_device_reset_clear(u32 mask)
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reg = AR933X_RESET_REG_RESET_MODULE;
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reg = AR933X_RESET_REG_RESET_MODULE;
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else if (soc_is_ar934x())
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else if (soc_is_ar934x())
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reg = AR934X_RESET_REG_RESET_MODULE;
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reg = AR934X_RESET_REG_RESET_MODULE;
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@ -136,7 +136,7 @@
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--- a/arch/mips/ath79/common.c
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--- a/arch/mips/ath79/common.c
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+++ b/arch/mips/ath79/common.c
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+++ b/arch/mips/ath79/common.c
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@@ -108,6 +108,8 @@ void ath79_device_reset_set(u32 mask)
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@@ -107,6 +107,8 @@ void ath79_device_reset_set(u32 mask)
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reg = QCA953X_RESET_REG_RESET_MODULE;
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reg = QCA953X_RESET_REG_RESET_MODULE;
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else if (soc_is_qca955x())
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else if (soc_is_qca955x())
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reg = QCA955X_RESET_REG_RESET_MODULE;
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reg = QCA955X_RESET_REG_RESET_MODULE;
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@ -145,7 +145,7 @@
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else
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else
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panic("Reset register not defined for this SOC");
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panic("Reset register not defined for this SOC");
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@@ -138,6 +140,8 @@ void ath79_device_reset_clear(u32 mask)
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@@ -137,6 +139,8 @@ void ath79_device_reset_clear(u32 mask)
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reg = QCA953X_RESET_REG_RESET_MODULE;
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reg = QCA953X_RESET_REG_RESET_MODULE;
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else if (soc_is_qca955x())
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else if (soc_is_qca955x())
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reg = QCA955X_RESET_REG_RESET_MODULE;
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reg = QCA955X_RESET_REG_RESET_MODULE;
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@ -154,7 +154,7 @@
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else
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else
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panic("Reset register not defined for this SOC");
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panic("Reset register not defined for this SOC");
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@@ -164,6 +168,8 @@ u32 ath79_device_reset_get(u32 mask)
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@@ -163,6 +167,8 @@ u32 ath79_device_reset_get(u32 mask)
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reg = AR933X_RESET_REG_RESET_MODULE;
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reg = AR933X_RESET_REG_RESET_MODULE;
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else if (soc_is_ar934x())
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else if (soc_is_ar934x())
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reg = AR934X_RESET_REG_RESET_MODULE;
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reg = AR934X_RESET_REG_RESET_MODULE;
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@ -1,6 +1,6 @@
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--- a/arch/mips/ath79/common.c
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--- a/arch/mips/ath79/common.c
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+++ b/arch/mips/ath79/common.c
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+++ b/arch/mips/ath79/common.c
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@@ -39,7 +39,7 @@ unsigned int ath79_soc_rev;
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@@ -38,7 +38,7 @@ unsigned int ath79_soc_rev;
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void __iomem *ath79_pll_base;
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void __iomem *ath79_pll_base;
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void __iomem *ath79_reset_base;
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void __iomem *ath79_reset_base;
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EXPORT_SYMBOL_GPL(ath79_reset_base);
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EXPORT_SYMBOL_GPL(ath79_reset_base);
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