mirror of https://github.com/hak5/openwrt-owl.git
bcm53xx: simpify USB 3.0 PHY initialization
We can use one code path for BCM4707 rev. 4 and BCM53018. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> SVN-Revision: 49090
parent
2d4ebff3ad
commit
7b61ed5254
|
@ -41,7 +41,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
|
|||
static struct platform_device *bcma_hcd_create_pdev(struct bcma_device *dev,
|
||||
const char *name, u32 addr,
|
||||
const void *data,
|
||||
@@ -338,6 +344,216 @@ err_unregister_ohci_dev:
|
||||
@@ -338,6 +344,165 @@ err_unregister_ohci_dev:
|
||||
return err;
|
||||
}
|
||||
|
||||
|
@ -98,9 +98,8 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
|
|||
+ iowrite32(0x0000009a, ccb->mii + 0x000);
|
||||
+ udelay(2);
|
||||
+
|
||||
+ switch (chipinfo->id) {
|
||||
+ case BCMA_CHIP_ID_BCM4707:
|
||||
+ if (chipinfo->rev == 4) {
|
||||
+ if (chipinfo->id == BCMA_CHIP_ID_BCM53018 ||
|
||||
+ chipinfo->id == BCMA_CHIP_ID_BCM4707 && chipinfo->rev == 4) {
|
||||
+ /* For NS-B0, USB3 PLL Block */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x587e8000, ccb->mii + 0x004);
|
||||
|
@ -121,83 +120,6 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
|
|||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x582e8000, ccb->mii + 0x004);
|
||||
+
|
||||
+ /* Deasserting USB3 system reset */
|
||||
+ bcma_awrite32(core, BCMA_RESET_CTL, 0);
|
||||
+
|
||||
+ /* Set ana_pllSeqStart */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x58069000, ccb->mii + 0x004);
|
||||
+
|
||||
+ /* RXPMD block */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x587e8020, ccb->mii + 0x004);
|
||||
+
|
||||
+ /* CDR int loop locking BW to 1 */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x58120049, ccb->mii + 0x004);
|
||||
+
|
||||
+ /* CDR int loop acquisition BW to 1 */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x580e0049, ccb->mii + 0x004);
|
||||
+
|
||||
+ /* CDR prop loop BW to 1 */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x580a005c, ccb->mii + 0x004);
|
||||
+
|
||||
+ /* Waiting MII Mgt interface idle */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ } else {
|
||||
+ /* PLL30 block */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x587e8000, ccb->mii + 0x004);
|
||||
+
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x582a6400, ccb->mii + 0x004);
|
||||
+
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x587e80e0, ccb->mii + 0x004);
|
||||
+
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x580a009c, ccb->mii + 0x004);
|
||||
+
|
||||
+ /* Enable SSC */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x587e8040, ccb->mii + 0x004);
|
||||
+
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x580a21d3, ccb->mii + 0x004);
|
||||
+
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x58061003, ccb->mii + 0x004);
|
||||
+
|
||||
+ /* Waiting MII Mgt interface idle */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+
|
||||
+ /* Deasserting USB3 system reset */
|
||||
+ bcma_awrite32(core, BCMA_RESET_CTL, 0);
|
||||
+ }
|
||||
+ break;
|
||||
+ case BCMA_CHIP_ID_BCM53018:
|
||||
+ /* USB3 PLL Block */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x587e8000, ccb->mii + 0x004);
|
||||
+
|
||||
+ /* Assert Ana_Pllseq start */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x58061000, ccb->mii + 0x004);
|
||||
+
|
||||
+ /* Assert CML Divider ratio to 26 */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x582a6400, ccb->mii + 0x004);
|
||||
+
|
||||
+ /* Asserting PLL Reset */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x582ec000, ccb->mii + 0x004);
|
||||
+
|
||||
+ /* Deaaserting PLL Reset */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x582e8000, ccb->mii + 0x004);
|
||||
+
|
||||
+ /* Waiting MII Mgt interface idle */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+
|
||||
|
@ -230,8 +152,35 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
|
|||
+
|
||||
+ /* Waiting MII Mgt interface idle */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ } else if (chipinfo->id == BCMA_CHIP_ID_BCM4707) {
|
||||
+ /* PLL30 block */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x587e8000, ccb->mii + 0x004);
|
||||
+
|
||||
+ break;
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x582a6400, ccb->mii + 0x004);
|
||||
+
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x587e80e0, ccb->mii + 0x004);
|
||||
+
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x580a009c, ccb->mii + 0x004);
|
||||
+
|
||||
+ /* Enable SSC */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x587e8040, ccb->mii + 0x004);
|
||||
+
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x580a21d3, ccb->mii + 0x004);
|
||||
+
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x58061003, ccb->mii + 0x004);
|
||||
+
|
||||
+ /* Waiting MII Mgt interface idle */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+
|
||||
+ /* Deasserting USB3 system reset */
|
||||
+ bcma_awrite32(core, BCMA_RESET_CTL, 0);
|
||||
+ }
|
||||
+out:
|
||||
+ if (dmu)
|
||||
|
@ -258,7 +207,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
|
|||
static int bcma_hcd_probe(struct bcma_device *core)
|
||||
{
|
||||
int err;
|
||||
@@ -364,6 +580,11 @@ static int bcma_hcd_probe(struct bcma_de
|
||||
@@ -364,6 +529,11 @@ static int bcma_hcd_probe(struct bcma_de
|
||||
if (err)
|
||||
return err;
|
||||
break;
|
||||
|
@ -270,7 +219,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
|
|||
default:
|
||||
return -ENODEV;
|
||||
}
|
||||
@@ -377,11 +598,14 @@ static void bcma_hcd_remove(struct bcma_
|
||||
@@ -377,11 +547,14 @@ static void bcma_hcd_remove(struct bcma_
|
||||
struct bcma_hcd_device *usb_dev = bcma_get_drvdata(dev);
|
||||
struct platform_device *ohci_dev = usb_dev->ohci_dev;
|
||||
struct platform_device *ehci_dev = usb_dev->ehci_dev;
|
||||
|
@ -285,7 +234,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
|
|||
|
||||
bcma_core_disable(dev, 0);
|
||||
}
|
||||
@@ -418,6 +642,7 @@ static int bcma_hcd_resume(struct bcma_d
|
||||
@@ -418,6 +591,7 @@ static int bcma_hcd_resume(struct bcma_d
|
||||
static const struct bcma_device_id bcma_hcd_table[] = {
|
||||
BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_USB20_HOST, BCMA_ANY_REV, BCMA_ANY_CLASS),
|
||||
BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_NS_USB20, BCMA_ANY_REV, BCMA_ANY_CLASS),
|
||||
|
|
|
@ -12,7 +12,7 @@ Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
|
|||
|
||||
--- a/drivers/usb/host/bcma-hcd.c
|
||||
+++ b/drivers/usb/host/bcma-hcd.c
|
||||
@@ -568,8 +568,7 @@ static int bcma_hcd_probe(struct bcma_de
|
||||
@@ -517,8 +517,7 @@ static int bcma_hcd_probe(struct bcma_de
|
||||
usb_dev->core = core;
|
||||
|
||||
if (core->dev.of_node)
|
||||
|
|
Loading…
Reference in New Issue