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Fix build warnings 

SVN-Revision: 19782
owl
Hauke Mehrtens 2010-02-20 19:31:34 +00:00
parent 046c32e6bf
commit 7524480b82
4 changed files with 4 additions and 20 deletions
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10
target/linux/brcm47xx/patches-2.6.30/700-ssb-gigabit-ethernet-driver.patch
View File

@ -98,7 +98,7 @@
/* Workaround for unstable PLL clock */ /* Workaround for unstable PLL clock */
- if ((GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_AX) || - if ((GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_AX) ||
- (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_BX)) { - (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_BX)) {
+ if ((tp->phy_id & PHY_ID_MASK != PHY_ID_BCM5750_2) && + if ((tp->phy_id & PHY_ID_MASK) != PHY_ID_BCM5750_2 &&
+ /* !!! FIXME !!! */ + /* !!! FIXME !!! */
+ ((GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_AX) || + ((GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_AX) ||
+ (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_BX))) { + (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_BX))) {
@ -252,14 +252,6 @@
if (tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT) { if (tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT) {
tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl & tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl &
~GRC_LCLCTRL_GPIO_OUTPUT1); ~GRC_LCLCTRL_GPIO_OUTPUT1);
@@ -12063,7 +12133,6 @@ static int __devinit tg3_get_invariants(
tp->write32 = tg3_write_flush_reg32;
}
-
if ((tp->tg3_flags & TG3_FLAG_TXD_MBOX_HWBUG) ||
(tp->tg3_flags & TG3_FLAG_MBOX_WRITE_REORDER)) {
tp->write32_tx_mbox = tg3_write32_tx_mbox;
@@ -12099,6 +12168,11 @@ static int __devinit tg3_get_invariants( @@ -12099,6 +12168,11 @@ static int __devinit tg3_get_invariants(
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701))) GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701)))
tp->tg3_flags |= TG3_FLAG_SRAM_USE_CONFIG; tp->tg3_flags |= TG3_FLAG_SRAM_USE_CONFIG;

10
target/linux/brcm47xx/patches-2.6.31/700-ssb-gigabit-ethernet-driver.patch
View File

@ -98,7 +98,7 @@
/* Workaround for unstable PLL clock */ /* Workaround for unstable PLL clock */
- if ((GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_AX) || - if ((GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_AX) ||
- (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_BX)) { - (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_BX)) {
+ if ((tp->phy_id & PHY_ID_MASK != PHY_ID_BCM5750_2) && + if ((tp->phy_id & PHY_ID_MASK) != PHY_ID_BCM5750_2 &&
+ /* !!! FIXME !!! */ + /* !!! FIXME !!! */
+ ((GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_AX) || + ((GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_AX) ||
+ (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_BX))) { + (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_BX))) {
@ -252,14 +252,6 @@
if (tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT) { if (tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT) {
tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl & tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl &
~GRC_LCLCTRL_GPIO_OUTPUT1); ~GRC_LCLCTRL_GPIO_OUTPUT1);
@@ -12100,7 +12170,6 @@ static int __devinit tg3_get_invariants(
tp->write32 = tg3_write_flush_reg32;
}
-
if ((tp->tg3_flags & TG3_FLAG_TXD_MBOX_HWBUG) ||
(tp->tg3_flags & TG3_FLAG_MBOX_WRITE_REORDER)) {
tp->write32_tx_mbox = tg3_write32_tx_mbox;
@@ -12136,6 +12205,11 @@ static int __devinit tg3_get_invariants( @@ -12136,6 +12205,11 @@ static int __devinit tg3_get_invariants(
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701))) GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701)))
tp->tg3_flags |= TG3_FLAG_SRAM_USE_CONFIG; tp->tg3_flags |= TG3_FLAG_SRAM_USE_CONFIG;

2
target/linux/brcm47xx/patches-2.6.32/260-ohci-set-dma-mask.patch
View File

@ -8,7 +8,7 @@
int err = -ENOMEM; int err = -ENOMEM;
u32 tmp, flags = 0; u32 tmp, flags = 0;
+ if (ssb_dma_set_mask(dev, DMA_32BIT_MASK)) + if (ssb_dma_set_mask(dev, DMA_BIT_MASK(32)))
+ return -EOPNOTSUPP; + return -EOPNOTSUPP;
+ +
if (dev->id.coreid == SSB_DEV_USB11_HOSTDEV) { if (dev->id.coreid == SSB_DEV_USB11_HOSTDEV) {

2
target/linux/brcm47xx/patches-2.6.32/700-ssb-gigabit-ethernet-driver.patch
View File

@ -80,7 +80,7 @@
/* Workaround for unstable PLL clock */ /* Workaround for unstable PLL clock */
- if ((GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_AX) || - if ((GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_AX) ||
- (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_BX)) { - (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_BX)) {
+ if ((tp->phy_id & PHY_ID_MASK != PHY_ID_BCM5750_2) && + if ((tp->phy_id & PHY_ID_MASK) != PHY_ID_BCM5750_2 &&
+ /* !!! FIXME !!! */ + /* !!! FIXME !!! */
+ ((GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_AX) || + ((GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_AX) ||
+ (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_BX))) { + (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_BX))) {