mirror of https://github.com/hak5/openwrt-owl.git
lantiq: improve ARV7519RW22 support
- use full board name - rename uboot-env partition - add dsl_fw partition - remove unneeded pinmux groups - move gigabit ethernet to LAN - load mac address from mtd Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> SVN-Revision: 42180owl
parent
3a9752bbd2
commit
5f71dbb005
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@ -156,7 +156,7 @@ TDW8970)
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wan_mac=$(macaddr_add "$lan_mac" 1)
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;;
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ARV7519*)
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ARV7519RW22)
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lan_mac=$(mtd_get_mac_binary boardconfig 22)
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wan_mac=$(macaddr_add "$lan_mac" 1)
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;;
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@ -1,7 +1,7 @@
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/include/ "vr9.dtsi"
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/ {
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model = "ARV7519 - Astoria Networks ARV7519RW22-A-LT";
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model = "ARV7519RW22 - Astoria Networks ARV7519RW22-A-LT";
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chosen {
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bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
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@ -27,17 +27,22 @@
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};
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partition@60000 {
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label = "uboot_cfg";
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label = "uboot-env";
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reg = <0x60000 0x20000>;
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read-only;
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};
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partition@80000 {
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label = "firmware";
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reg = <0x80000 0x1f00000>;
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reg = <0x80000 0x1e00000>;
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};
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partition@1f80000 {
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partition@1e80000 {
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label = "dsl_fw";
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reg = <0x1e80000 0x100000>;
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};
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boardconfig: partition@1f80000 {
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label = "boardconfig";
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reg = <0x1f80000 0x80000>;
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read-only;
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@ -54,19 +59,6 @@
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lantiq,groups = "mdio";
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lantiq,function = "mdio";
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};
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gphy-leds {
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lantiq,groups = "gphy0 led1", "gphy1 led1";
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lantiq,function = "gphy";
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lantiq,pull = <2>;
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lantiq,open-drain = <0>;
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lantiq,output = <1>;
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};
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phy-rst {
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lantiq,pins = "io42";
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lantiq,pull = <0>;
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lantiq,open-drain = <0>;
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lantiq,output = <1>;
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};
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pcie-rst {
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lantiq,pins = "io21";
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lantiq,pull = <0>;
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@ -92,8 +84,15 @@
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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mac-address = [ 00 11 22 33 44 55 ];
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mtd-mac-address = <&boardconfig 0x16>;
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lantiq,switch;
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ethernet@0 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <0>;
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phy-mode = "rgmii";
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phy-handle = <&phy0>;
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};
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ethernet@1 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <4>;
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@ -120,21 +119,6 @@
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};
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};
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wan: interface@1 {
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compatible = "lantiq,xrx200-pdi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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mac-address = [ 00 11 22 33 44 56 ];
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lantiq,wan;
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ethernet@0 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <0>;
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phy-mode = "rgmii";
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phy-handle = <&phy0>;
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};
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};
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mdio@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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