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Revert "ar71xx: Clear bits in ath79_setup_qca955x_eth_cfg" 

Not all mach-* files set all boards correctly in ETH_CFG. They depend on
some preset values by u-boot which were not previously modified by
ath79_setup_qca955x_eth_cfg. Avoiding to modify them in this function keeps
it backward compatible for these boards.

This reverts commit 119b8ab2c2eac237ec4e9c4d0ed53df22b5c6978.

Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>

SVN-Revision: 49072
owl
John Crispin 2016-03-23 12:52:20 +00:00
parent b269a3520d
commit 58143e9b65
1 changed files with 3 additions and 13 deletions
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16
target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
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@ -833,24 +833,14 @@ void __init ath79_setup_ar934x_eth_rx_delay(unsigned int rxd,
void __init ath79_setup_qca955x_eth_cfg(u32 mask) void __init ath79_setup_qca955x_eth_cfg(u32 mask)
{ {
void __iomem *base; void __iomem *base;
u32 t, m; u32 t;
m = QCA955X_ETH_CFG_RGMII_EN |
QCA955X_ETH_CFG_MII_GE0 |
QCA955X_ETH_CFG_GMII_GE0 |
QCA955X_ETH_CFG_MII_GE0_MASTER |
QCA955X_ETH_CFG_MII_GE0_SLAVE |
QCA955X_ETH_CFG_GE0_ERR_EN |
QCA955X_ETH_CFG_GE0_SGMII |
QCA955X_ETH_CFG_RMII_GE0 |
QCA955X_ETH_CFG_MII_CNTL_SPEED |
QCA955X_ETH_CFG_RMII_GE0_MASTER;
base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE); base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE);
t = __raw_readl(base + QCA955X_GMAC_REG_ETH_CFG); t = __raw_readl(base + QCA955X_GMAC_REG_ETH_CFG);
t &= ~m; t &= ~(QCA955X_ETH_CFG_RGMII_EN | QCA955X_ETH_CFG_GE0_SGMII);
t |= mask; t |= mask;
__raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG); __raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG);