mirror of https://github.com/hak5/openwrt-owl.git
ar71xx: add support for dir 505 a1
this patch is based on ... -> https://forum.openwrt.org/viewtopic.php?pid=179902#p179902 Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 37703owl
John Crispin
parent
6743f2625b
commit
553a469728
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@ -43,6 +43,7 @@ get_status_led() {
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db120)
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status_led="db120:green:status"
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;;
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dir-505-a1 |\
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dir-600-a1 |\
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dir-615-e4)
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status_led="d-link:green:power"
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@ -57,6 +57,10 @@ rb-750)
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ucidef_set_led_switch "port5" "port5" "rb750:green:port5" "switch0" "0x02"
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;;
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dir-505-a1)
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ucidef_set_led_netdev "lan" "LAN" "d-link:green:power" "eth1"
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;;
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dir-600-a1|\
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dir-615-e4)
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ucidef_set_led_netdev "wan" "WAN" "d-link:green:wan" "eth1"
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@ -222,6 +222,10 @@ wp543)
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ucidef_set_interface_lan "eth0"
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;;
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dir-505-a1)
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ucidef_set_interface_lan "eth1"
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;;
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alfa-ap96 |\
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alfa-nx |\
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ap83 |\
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@ -243,6 +243,9 @@ ar71xx_board_detect() {
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*"DB120 reference board")
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name="db120"
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;;
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*"DIR-505 rev. A1")
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name="dir-505-a1"
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;;
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*"DIR-600 rev. A1")
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name="dir-600-a1"
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;;
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@ -396,6 +399,9 @@ ar71xx_board_detect() {
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*TL-WR2543N*)
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name="tl-wr2543n"
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;;
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*DIR-505-A1)
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name="dir-505-a1"
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;;
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*"DIR-615 rev. C1")
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name="dir-615-c1"
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;;
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@ -105,6 +105,7 @@ platform_check_image() {
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ap81 | \
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ap83 | \
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ap132 | \
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dir-505-a1 | \
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dir-600-a1 | \
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dir-615-c1 | \
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dir-615-e4 | \
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@ -38,6 +38,7 @@ CONFIG_ATH79_MACH_AW_NR580=y
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CONFIG_ATH79_MACH_CAP4200AG=y
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CONFIG_ATH79_MACH_CARAMBOLA2=y
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CONFIG_ATH79_MACH_DB120=y
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CONFIG_ATH79_MACH_DIR_505_A1=y
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CONFIG_ATH79_MACH_DIR_600_A1=y
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CONFIG_ATH79_MACH_DIR_615_C1=y
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CONFIG_ATH79_MACH_DIR_825_B1=y
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@ -0,0 +1,126 @@
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/*
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* DLink DIR-505 A1 board support
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*
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* Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/gpio.h>
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#include <asm/mach-ath79/ath79.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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#include "dev-eth.h"
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#include "dev-gpio-buttons.h"
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#include "dev-leds-gpio.h"
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#include "dev-m25p80.h"
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#include "dev-wmac.h"
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#include "dev-usb.h"
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#include "machtypes.h"
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#define DIR_505A1_GPIO_BTN_WPS 11 /* verify */
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#define DIR_505A1_GPIO_BTN_RESET 12 /* verify */
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#define DIR_505A1_GPIO_LED_RED 26 /* unused, fyi */
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#define DIR_505A1_GPIO_LED_GREEN 27
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#define DIR_505A1_GPIO_WAN_LED_ENABLE 1
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#define DIR_505A1_KEYS_POLL_INTERVAL 20 /* msecs */
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#define DIR_505A1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_505A1_KEYS_POLL_INTERVAL)
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#define DIR_505A1_ART_ADDRESS 0x1f010000
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#define DIR_505A1_CALDATA_OFFSET 0x1000
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#define DIR_505A1_LAN_MAC_ADDRESS 0x1f020004
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#define DIR_505A1_WAN_MAC_ADDRESS 0x1f020016
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static struct gpio_led dir_505_a1_leds_gpio[] __initdata = {
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{
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.name = "d-link:green:power",
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.gpio = DIR_505A1_GPIO_LED_GREEN,
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.active_low = 1,
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}, {
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.name = "d-link:red:status",
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.gpio = DIR_505A1_GPIO_LED_RED,
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.active_low = 1,
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},
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};
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static struct gpio_keys_button dir_505_a1_gpio_keys[] __initdata = {
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{
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.desc = "Reset button",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = DIR_505A1_KEYS_DEBOUNCE_INTERVAL,
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.gpio = DIR_505A1_GPIO_BTN_RESET,
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.active_low = 1,
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}, {
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.desc = "WPS button",
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.type = EV_KEY,
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.code = KEY_WPS_BUTTON,
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.debounce_interval = DIR_505A1_KEYS_DEBOUNCE_INTERVAL,
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.gpio = DIR_505A1_GPIO_BTN_WPS,
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.active_low = 1,
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}
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};
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static void __init dir_505_a1_read_ascii_mac(u8 *dest, unsigned int src_addr)
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{
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int ret;
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u8 *src = (u8 *)KSEG1ADDR(src_addr);
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ret = sscanf(src, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
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&dest[0], &dest[1], &dest[2],
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&dest[3], &dest[4], &dest[5]);
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if (ret != ETH_ALEN)
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memset(dest, 0, ETH_ALEN);
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}
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static void __init dir_505_a1_setup(void)
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{
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u8 *art = (u8 *) KSEG1ADDR(DIR_505A1_ART_ADDRESS);
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u8 lan_mac[ETH_ALEN];
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u8 wan_mac[ETH_ALEN];
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ath79_setup_ar933x_phy4_switch(false, false);
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ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
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AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
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AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
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AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
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AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
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gpio_request_one(DIR_505A1_GPIO_WAN_LED_ENABLE,
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GPIOF_OUT_INIT_LOW, "WAN LED enable");
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ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_505_a1_leds_gpio),
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dir_505_a1_leds_gpio);
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ath79_register_gpio_keys_polled(1, DIR_505A1_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(dir_505_a1_gpio_keys),
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dir_505_a1_gpio_keys);
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ath79_register_m25p80(NULL);
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ath79_register_usb();
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dir_505_a1_read_ascii_mac(lan_mac, DIR_505A1_LAN_MAC_ADDRESS);
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dir_505_a1_read_ascii_mac(wan_mac, DIR_505A1_WAN_MAC_ADDRESS);
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ath79_init_mac(ath79_eth0_data.mac_addr, wan_mac, 0);
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ath79_init_mac(ath79_eth1_data.mac_addr, lan_mac, 0);
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ath79_register_mdio(0, 0x0);
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ath79_register_eth(1);
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ath79_register_eth(0);
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ath79_register_wmac(art + DIR_505A1_CALDATA_OFFSET, lan_mac);
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}
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MIPS_MACHINE(ATH79_MACH_DIR_505_A1, "DIR-505-A1",
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"D-Link DIR-505 rev. A1", dir_505_a1_setup);
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@ -5,6 +5,17 @@
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# See /LICENSE for more information.
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#
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define Profile/DIR505A1
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NAME:=D-Link DIR-505 rev. A1
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PACKAGES:=
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endef
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define Profile/DIR505A1/Description
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Package set optimized for the D-Link DIR-505 rev. A1.
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endef
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$(eval $(call Profile,DIR505A1))
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define Profile/DIR600A1
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NAME:=D-Link DIR-600 rev. A1
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PACKAGES:=
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@ -164,6 +164,7 @@ ap136_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,6336k(rootfs),1
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cameo7240_mtdlayout=mtdparts=spi0.0:192k(u-boot)ro,64k(nvram)ro,3712k(firmware),64k(mac)ro,64k(art)ro
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cameo913x_mtdlayout=mtdparts=spi0.0:128k(u-boot)ro,64k(config)ro,3840k(firmware),64k(art)ro
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cameo933x_mtdlayout=mtdparts=spi0.0:64k(u-boot)ro,64k(art)ro,64k(mac)ro,64k(nvram)ro,192k(language)ro,3648k(firmware)
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cameo933x_mtdlayout_8M=mtdparts=spi0.0:64k(u-boot)ro,64k(art)ro,64k(mac)ro,64k(nvram)ro,256k(language)ro,1024k(kernel),6656k(rootfs),7680k@0x80000(firmware)
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cameo934x_mtdlayout=mtdparts=spi0.0:64k(uboot)ro,64k(nvram)ro,15936k(firmware),192k(lang)ro,64k(mac)ro,64k(art)ro
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cap4200ag_mtdlayout=mtdparts=spi0.0:256k(u-boot),64k(u-boot-env),320k(custom)ro,1536k(kernel),12096k(rootfs),2048k(failsafe),64k(art),13632k@0xa0000(firmware)
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db120_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,6336k(rootfs),1408k(kernel),64k(nvram),64k(art)ro,7744k@0x50000(firmware)
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@ -384,7 +385,15 @@ define Image/Build/Cameo933x
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endef
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define Image/Build/Cameo933x/initramfs
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$(call MkuImageLzma/initramfs,$(2),$(3) $(cameo933x_mtdlayout))
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$(call MkuImageLzma/initramfs,$(2),$(3),$(cameo933x_mtdlayout))
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endef
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define Image/Build/Cameo933x_8M
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$(call Image/Build/CameoHornet,$(1),$(2),$(3),$(cameo933x_mtdlayout_8M),1048576,6422528,$(4))
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endef
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define Image/Build/Cameo933x_8M/initramfs
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$(call MkuImageLzma/initramfs,$(2),$(3) $(cameo933x_mtdlayout_8M))
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endef
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define Image/Build/Cameo934x
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@ -392,7 +401,7 @@ define Image/Build/Cameo934x
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endef
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define Image/Build/Cameo934x/initramfs
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$(call Image/Build/Cameo,$(1),$(2),$(3),$(cameo934x_mtdlayout))
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$(call Image/Build/Cameo,$(1),$(2),$(3) $(cameo934x_mtdlayout))
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endef
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define Image/Build/Ath
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@ -900,6 +909,7 @@ $(eval $(call SingleProfile,Cameo913x,$(fs_squash),TEW652BRP_RECOVERY,tew-652brp
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$(eval $(call SingleProfile,Cameo933x,$(fs_squash),TEW712BR,tew-712br,TEW-712BR,ttyATH0,115200,"HORNET-RT-TEW712BR-3",1.99,""))
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$(eval $(call SingleProfile,Cameo933x,$(fs_squash),DIR601B1,dir-601-b1,TEW-712BR,ttyATH0,115200,"HORNET-RT-DIR601B1-3",2.99.99,"" "NA"))
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$(eval $(call SingleProfile,Cameo933x_8M,$(fs_squash),DIR505A1,dir-505-a1,DIR-505-A1,ttyATH0,115200,"HORNET-RT-DIR505A1-3"))
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$(eval $(call SingleProfile,Cameo934x,$(fs_64k),DIR825C1,dir-825-c1,DIR-825-C1,ttyS0,115200,"00DB120AR9344-RT-101214-00"))
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$(eval $(call SingleProfile,Cameo934x,$(fs_64k),DIR835A1,dir-835-a1,DIR-835-A1,ttyS0,115200,"00DB120AR9344-RT-101214-00"))
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@ -0,0 +1,45 @@
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Index: linux-3.10.4/arch/mips/ath79/Kconfig
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===================================================================
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--- linux-3.10.4.orig/arch/mips/ath79/Kconfig 2013-08-04 19:08:12.739921385 +0200
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+++ linux-3.10.4/arch/mips/ath79/Kconfig 2013-08-04 19:09:15.379922883 +0200
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@@ -254,6 +254,16 @@
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select ATH79_DEV_USB
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select MYLOADER
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+config ATH79_MACH_DIR_505_A1
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+ bool "D-Link DIR-505-A1 support"
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+ select SOC_AR933X
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+ select ATH79_DEV_ETH
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+ select ATH79_DEV_GPIO_BUTTONS
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+ select ATH79_DEV_LEDS_GPIO
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+ select ATH79_DEV_M25P80
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+ select ATH79_DEV_WMAC
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+ select ATH79_NVRAM
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+
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config ATH79_MACH_DIR_600_A1
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bool "D-Link DIR-600 A1/DIR-615 E4 support"
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select SOC_AR724X
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Index: linux-3.10.4/arch/mips/ath79/Makefile
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===================================================================
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--- linux-3.10.4.orig/arch/mips/ath79/Makefile 2013-08-04 19:07:36.299920522 +0200
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+++ linux-3.10.4/arch/mips/ath79/Makefile 2013-08-04 19:09:42.363923523 +0200
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@@ -53,6 +53,7 @@
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obj-$(CONFIG_ATH79_MACH_AW_NR580) += mach-aw-nr580.o
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obj-$(CONFIG_ATH79_MACH_CAP4200AG) += mach-cap4200ag.o
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obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o
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+obj-$(CONFIG_ATH79_MACH_DIR_505_A1) += mach-dir-505-a1.o
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obj-$(CONFIG_ATH79_MACH_DIR_600_A1) += mach-dir-600-a1.o
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obj-$(CONFIG_ATH79_MACH_DIR_615_C1) += mach-dir-615-c1.o
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obj-$(CONFIG_ATH79_MACH_DIR_825_B1) += mach-dir-825-b1.o
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Index: linux-3.10.4/arch/mips/ath79/machtypes.h
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===================================================================
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--- linux-3.10.4.orig/arch/mips/ath79/machtypes.h 2013-08-04 19:08:12.739921385 +0200
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+++ linux-3.10.4/arch/mips/ath79/machtypes.h 2013-08-04 19:09:29.715923222 +0200
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@@ -37,6 +37,7 @@
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ATH79_MACH_CARAMBOLA2, /* 8devices Carambola2 */
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ATH79_MACH_DB120, /* Atheros DB120 reference board */
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ATH79_MACH_PB44, /* Atheros PB44 reference board */
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+ ATH79_MACH_DIR_505_A1, /* D-Link DIR-505 rev. A1 */
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ATH79_MACH_DIR_600_A1, /* D-Link DIR-600 rev. A1 */
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ATH79_MACH_DIR_615_C1, /* D-Link DIR-615 rev. C1 */
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ATH79_MACH_DIR_615_E4, /* D-Link DIR-615 rev. E4 */
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