mirror of https://github.com/hak5/openwrt-owl.git
mpc85xx: add kernel support for the TL-WDR4900 v1 board
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 35690owl
parent
33ba984628
commit
4305c6cda1
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@ -258,6 +258,7 @@ CONFIG_SWIOTLB=y
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CONFIG_SYSCTL_EXCEPTION_TRACE=y
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CONFIG_TASK_SIZE=0xc0000000
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CONFIG_TICK_CPU_ACCOUNTING=y
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CONFIG_TL_WDR4900_V1=y
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# CONFIG_TQM8540 is not set
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# CONFIG_TQM8541 is not set
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# CONFIG_TQM8548 is not set
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@ -0,0 +1,570 @@
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From 406d86e5990ac171f18ef6e2973672d8fbfe1556 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Wed, 20 Feb 2013 08:40:33 +0100
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Subject: [PATCH] powerpc: 85xx: add support for the TP-Link TL-WDR4900 v1
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board
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This patch adds support for the TP-Link TL-WDR4900 v1
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concurrent dual-band wireless router. The devices uses
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the Freescale P1014 SoC.
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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---
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arch/powerpc/boot/Makefile | 3 +
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arch/powerpc/boot/cuboot-tl-wdr4900-v1.c | 164 ++++++++++++++++++++++++++
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arch/powerpc/boot/dts/tl-wdr4900-v1.dts | 166 +++++++++++++++++++++++++++
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arch/powerpc/boot/wrapper | 4 +
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arch/powerpc/platforms/85xx/Kconfig | 11 ++
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arch/powerpc/platforms/85xx/Makefile | 1 +
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arch/powerpc/platforms/85xx/tl_wdr4900_v1.c | 145 +++++++++++++++++++++++
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7 files changed, 494 insertions(+)
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create mode 100644 arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
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create mode 100644 arch/powerpc/boot/dts/tl-wdr4900-v1.dts
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create mode 100644 arch/powerpc/platforms/85xx/tl_wdr4900_v1.c
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--- a/arch/powerpc/boot/Makefile
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+++ b/arch/powerpc/boot/Makefile
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@@ -98,6 +98,8 @@ src-plat-$(CONFIG_EMBEDDED6xx) += cuboot
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src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
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src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
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src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c
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+src-plat-$(CONFIG_TL_WDR4900_V1) += cuboot-tl-wdr4900-v1.c
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+
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src-wlib := $(sort $(src-wlib-y))
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src-plat := $(sort $(src-plat-y))
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@@ -278,6 +280,7 @@ image-$(CONFIG_TQM8555) += cuImage.tqm
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image-$(CONFIG_TQM8560) += cuImage.tqm8560
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image-$(CONFIG_SBC8548) += cuImage.sbc8548
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image-$(CONFIG_KSI8560) += cuImage.ksi8560
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+image-$(CONFIG_TL_WDR4900_V1) += cuImage.tl-wdr4900-v1
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# Board ports in arch/powerpc/platform/embedded6xx/Kconfig
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image-$(CONFIG_STORCENTER) += cuImage.storcenter
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--- /dev/null
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+++ b/arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
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@@ -0,0 +1,164 @@
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+/*
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+ * U-Boot compatibility wrapper for the TP-Link TL-WDR4900 v1 board
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+ *
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+ * Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
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+ *
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+ * Based on:
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+ * cuboot-85xx.c
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+ * Author: Scott Wood <scottwood@freescale.com>
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+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
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+ *
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+ * simpleboot.c
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+ * Authors: Scott Wood <scottwood@freescale.com>
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+ * Grant Likely <grant.likely@secretlab.ca>
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+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
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+ * Copyright (c) 2008 Secret Lab Technologies Ltd.
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published
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+ * by the Free Software Foundation.
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+ */
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+
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+#include "ops.h"
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+#include "types.h"
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+#include "io.h"
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+#include "stdio.h"
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+#include <libfdt.h>
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+
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+BSS_STACK(4*1024);
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+
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+static unsigned long bus_freq;
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+static unsigned long int_freq;
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+static u64 mem_size;
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+static unsigned char enetaddr[6];
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+
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+static void process_boot_dtb(void *boot_dtb)
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+{
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+ const u32 *na, *ns, *reg, *val32;
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+ const char *path;
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+ u64 memsize64;
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+ int node, size, i;
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+
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+ /* Make sure FDT blob is sane */
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+ if (fdt_check_header(boot_dtb) != 0)
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+ fatal("Invalid device tree blob\n");
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+
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+ /* Find the #address-cells and #size-cells properties */
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+ node = fdt_path_offset(boot_dtb, "/");
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+ if (node < 0)
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+ fatal("Cannot find root node\n");
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+ na = fdt_getprop(boot_dtb, node, "#address-cells", &size);
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+ if (!na || (size != 4))
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+ fatal("Cannot find #address-cells property");
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+
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+ ns = fdt_getprop(boot_dtb, node, "#size-cells", &size);
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+ if (!ns || (size != 4))
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+ fatal("Cannot find #size-cells property");
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+
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+ /* Find the memory range */
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+ node = fdt_node_offset_by_prop_value(boot_dtb, -1, "device_type",
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+ "memory", sizeof("memory"));
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+ if (node < 0)
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+ fatal("Cannot find memory node\n");
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+ reg = fdt_getprop(boot_dtb, node, "reg", &size);
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+ if (size < (*na+*ns) * sizeof(u32))
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+ fatal("cannot get memory range\n");
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+
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+ /* Only interested in memory based at 0 */
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+ for (i = 0; i < *na; i++)
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+ if (*reg++ != 0)
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+ fatal("Memory range is not based at address 0\n");
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+
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+ /* get the memsize and trucate it to under 4G on 32 bit machines */
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+ memsize64 = 0;
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+ for (i = 0; i < *ns; i++)
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+ memsize64 = (memsize64 << 32) | *reg++;
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+ if (sizeof(void *) == 4 && memsize64 >= 0x100000000ULL)
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+ memsize64 = 0xffffffff;
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+
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+ mem_size = memsize64;
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+
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+ /* get clock frequencies */
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+ node = fdt_node_offset_by_prop_value(boot_dtb, -1, "device_type",
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+ "cpu", sizeof("cpu"));
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+ if (!node)
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+ fatal("Cannot find cpu node\n");
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+
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+ val32 = fdt_getprop(boot_dtb, node, "clock-frequency", &size);
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+ if (!val32 || (size != 4))
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+ fatal("Cannot get clock frequency");
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+
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+ int_freq = *val32;
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+
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+ val32 = fdt_getprop(boot_dtb, node, "bus-frequency", &size);
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+ if (!val32 || (size != 4))
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+ fatal("Cannot get bus frequency");
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+
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+ bus_freq = *val32;
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+
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+ path = fdt_get_alias(boot_dtb, "ethernet0");
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+ if (path) {
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+ const void *p;
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+
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+ node = fdt_path_offset(boot_dtb, path);
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+ if (node < 0)
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+ fatal("Cannot find ethernet0 node");
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+
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+ p = fdt_getprop(boot_dtb, node, "mac-address", &size);
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+ if (!p || (size < 6)) {
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+ printf("no mac-address property, finding local\n\r");
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+ p = fdt_getprop(boot_dtb, node, "local-mac-address", &size);
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+ }
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+
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+ if (!p || (size < 6))
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+ fatal("cannot get MAC addres");
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+
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+ memcpy(enetaddr, p, sizeof(enetaddr));
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+ }
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+}
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+
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+static void platform_fixups(void)
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+{
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+ void *soc;
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+
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+ dt_fixup_memory(0, mem_size);
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+
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+ dt_fixup_mac_address_by_alias("ethernet0", enetaddr);
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+ dt_fixup_cpu_clocks(int_freq, bus_freq / 8, bus_freq);
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+
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+ /* Unfortunately, the specific model number is encoded in the
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+ * soc node name in existing dts files -- once that is fixed,
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+ * this can do a simple path lookup.
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+ */
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+ soc = find_node_by_devtype(NULL, "soc");
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+ if (soc) {
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+ void *serial = NULL;
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+
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+ setprop(soc, "bus-frequency", &bus_freq, sizeof(bus_freq));
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+
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+ while ((serial = find_node_by_devtype(serial, "serial"))) {
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+ if (get_parent(serial) != soc)
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+ continue;
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+
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+ setprop(serial, "clock-frequency", &bus_freq,
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+ sizeof(bus_freq));
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+ }
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+ }
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+}
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+
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+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
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+ unsigned long r6, unsigned long r7)
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+{
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+ mem_size = 64 * 1024 * 1024;
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+
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+ simple_alloc_init(_end, mem_size - (u32)_end - 1024*1024, 32, 64);
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+
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+ fdt_init(_dtb_start);
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+ serial_console_init();
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+
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+ printf("\n\r-- TL-WDR4900 v1 boot wrapper --\n\r");
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+
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+ process_boot_dtb((void *) r3);
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+
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+ platform_ops.fixups = platform_fixups;
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+}
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--- /dev/null
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+++ b/arch/powerpc/boot/dts/tl-wdr4900-v1.dts
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@@ -0,0 +1,166 @@
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+/*
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+ * TP-Link TL-WDR4900 v1 Device Tree Source
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+ *
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+ * Copyright 2013 Gabor Juhos <juhosg@openwrt.org>
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License as published by the
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+ * Free Software Foundation; either version 2 of the License, or (at your
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+ * option) any later version.
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+ */
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+
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+/include/ "fsl/p1010si-pre.dtsi"
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+
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+/ {
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+ model = "TP-Link TL-WDR4900 v1";
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+ compatible = "tp-link,TL-WDR4900v1";
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+
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+ chosen {
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+ bootargs = "console=ttyS0,115200";
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+/*
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+ linux,stdout-path = "/soc@ffe00000/serial@4500";
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+*/
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+ };
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+
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+ memory {
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+ device_type = "memory";
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+ };
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+
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+ soc: soc@ffe00000 {
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+ ranges = <0x0 0x0 0xffe00000 0x100000>;
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+
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+ spi0: spi@7000 {
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+ flash@0 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "spansion,s25fl129p1";
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+ reg = <0>;
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+ spi-max-frequency = <25000000>;
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+
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+ u-boot@0 {
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+ reg = <0x0 0x0050000>;
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+ label = "u-boot";
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+ read-only;
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+ };
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+
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+ dtb@50000 {
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+ reg = <0x00050000 0x00010000>;
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+ label = "dtb";
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+ read-only;
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+ };
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+
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+ kernel@60000 {
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+ reg = <0x00060000 0x002a0000>;
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+ label = "kernel";
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+ };
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+
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+ rootfs@300000 {
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+ reg = <0x00300000 0x00ce0000>;
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+ label = "rootfs";
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+ };
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+
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+ config@fe0000 {
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+ reg = <0x00fe0000 0x00010000>;
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+ label = "config";
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+ read-only;
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+ };
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+
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+ caldata@ff0000 {
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+ reg = <0x00ff0000 0x00010000>;
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+ label = "caldata";
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+ read-only;
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+ };
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+
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+ firmware@60000 {
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+ reg = <0x00060000 0x00f80000>;
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+ label = "firmware";
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+ };
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+ };
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+ };
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+
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+ gpio0: gpio-controller@f000 {
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+ };
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+
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+ usb@22000 {
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+ phy_type = "utmi";
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+ dr_mode = "host";
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+ };
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+
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+ mdio@24000 {
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+ phy0: ethernet-phy@0 {
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+ /* interrupts = <3 1 0 0>; */
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+ reg = <0x0>;
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+ };
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+ };
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+
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+ enet0: ethernet@b0000 {
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+ phy-handle = <&phy0>;
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+ phy-connection-type = "rgmii-id";
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+ };
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+ };
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+
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+ pci0: pcie@ffe09000 {
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+ reg = <0 0xffe09000 0 0x1000>;
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+ ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
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+ 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
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+ pcie@0 {
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+ ranges = <0x2000000 0x0 0xa0000000
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+ 0x2000000 0x0 0xa0000000
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+ 0x0 0x20000000
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+
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+ 0x1000000 0x0 0x0
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+ 0x1000000 0x0 0x0
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+ 0x0 0x100000>;
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+ };
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+ };
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+
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+ pci1: pcie@ffe0a000 {
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+ reg = <0 0xffe0a000 0 0x1000>;
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+ ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
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+ 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
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+ pcie@0 {
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+ ranges = <0x2000000 0x0 0x80000000
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+ 0x2000000 0x0 0x80000000
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+ 0x0 0x20000000
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+
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+ 0x1000000 0x0 0x0
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+ 0x1000000 0x0 0x0
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+ 0x0 0x100000>;
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+ };
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+ };
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+
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+ ifc: ifc@ffe1e000 {
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+ status = "disabled";
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+
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+ system {
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+ gpios = <&gpio0 2 1>; /* active low */
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+ label = "tp-link:blue:system";
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+ };
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+
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+ usb1 {
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+ gpios = <&gpio0 3 1>; /* active low */
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+ label = "tp-link:green:usb1";
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+ };
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+
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+ usb2 {
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+ gpios = <&gpio0 4 1>; /* active low */
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+ label = "tp-link:green:usb2";
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+ };
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+ };
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+
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+ buttons {
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+ compatible = "gpio-keys";
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+
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+ reset {
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+ label = "Reset button";
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+ gpios = <&gpio0 5 1>; /* active low */
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+ linux,code = <0x198>; /* KEY_RESTART */
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+ };
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+ };
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+};
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+
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+/include/ "fsl/p1010si-post.dtsi"
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--- a/arch/powerpc/boot/wrapper
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+++ b/arch/powerpc/boot/wrapper
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@@ -197,6 +197,10 @@ cuboot*)
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*-mpc85*|*-tqm85*|*-sbc85*)
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platformo=$object/cuboot-85xx.o
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;;
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+ *-tl-wdr4900-v1)
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+ platformo=$object/cuboot-tl-wdr4900-v1.o
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+ link_address='0x1000000'
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+ ;;
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*-amigaone)
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link_address='0x800000'
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;;
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--- a/arch/powerpc/platforms/85xx/Kconfig
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+++ b/arch/powerpc/platforms/85xx/Kconfig
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@@ -147,6 +147,17 @@ config STX_GP3
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select CPM2
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select DEFAULT_UIMAGE
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+config TL_WDR4900_V1
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+ bool "TP-Link TL-WDR4900 v1"
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+ select DEFAULT_UIMAGE
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+ select ARCH_REQUIRE_GPIOLIB
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+ select GPIO_MPC8XXX
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+ help
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+ This option enables support for the TP-Link TL-WDR4900 v1 board.
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+
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+ This board is a Concurrent Dual-Band wireless router with a
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+ Freescale P1014 SoC.
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+
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config TQM8540
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bool "TQ Components TQM8540"
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help
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--- a/arch/powerpc/platforms/85xx/Makefile
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+++ b/arch/powerpc/platforms/85xx/Makefile
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@@ -24,6 +24,7 @@ obj-$(CONFIG_P5020_DS) += p5020_ds.o
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obj-$(CONFIG_P5040_DS) += p5040_ds.o corenet_ds.o
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obj-$(CONFIG_STX_GP3) += stx_gp3.o
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obj-$(CONFIG_TQM85xx) += tqm85xx.o
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+obj-$(CONFIG_TL_WDR4900_V1) += tl_wdr4900_v1.o
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obj-$(CONFIG_SBC8548) += sbc8548.o
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obj-$(CONFIG_SOCRATES) += socrates.o socrates_fpga_pic.o
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obj-$(CONFIG_KSI8560) += ksi8560.o
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--- /dev/null
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+++ b/arch/powerpc/platforms/85xx/tl_wdr4900_v1.c
|
||||
@@ -0,0 +1,145 @@
|
||||
+/*
|
||||
+ * TL-WDR4900 v1 board setup
|
||||
+ *
|
||||
+ * Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
|
||||
+ *
|
||||
+ * Based on:
|
||||
+ * p1010rdb.c:
|
||||
+ * P1010RDB Board Setup
|
||||
+ * Copyright 2011 Freescale Semiconductor Inc.
|
||||
+ *
|
||||
+ * This program is free software; you can redistribute it and/or modify it
|
||||
+ * under the terms of the GNU General Public License as published by the
|
||||
+ * Free Software Foundation; either version 2 of the License, or (at your
|
||||
+ * option) any later version.
|
||||
+ */
|
||||
+
|
||||
+#include <linux/stddef.h>
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/pci.h>
|
||||
+#include <linux/delay.h>
|
||||
+#include <linux/interrupt.h>
|
||||
+#include <linux/of_platform.h>
|
||||
+#include <linux/ath9k_platform.h>
|
||||
+#include <linux/leds.h>
|
||||
+
|
||||
+#include <asm/time.h>
|
||||
+#include <asm/machdep.h>
|
||||
+#include <asm/pci-bridge.h>
|
||||
+#include <mm/mmu_decl.h>
|
||||
+#include <asm/prom.h>
|
||||
+#include <asm/udbg.h>
|
||||
+#include <asm/mpic.h>
|
||||
+
|
||||
+#include <sysdev/fsl_soc.h>
|
||||
+#include <sysdev/fsl_pci.h>
|
||||
+
|
||||
+#include "mpc85xx.h"
|
||||
+
|
||||
+void __init tl_wdr4900_v1_pic_init(void)
|
||||
+{
|
||||
+ struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
|
||||
+ MPIC_SINGLE_DEST_CPU,
|
||||
+ 0, 256, " OpenPIC ");
|
||||
+
|
||||
+ BUG_ON(mpic == NULL);
|
||||
+
|
||||
+ mpic_init(mpic);
|
||||
+}
|
||||
+
|
||||
+#ifdef CONFIG_PCI
|
||||
+static struct gpio_led tl_wdr4900_v1_wmac_leds_gpio[] = {
|
||||
+ {
|
||||
+ .name = "tp-link:blue:wps",
|
||||
+ .gpio = 1,
|
||||
+ .active_low = 1,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static struct ath9k_platform_data tl_wdr4900_v1_wmac0_data = {
|
||||
+ .led_pin = 0,
|
||||
+ .eeprom_name = "pci_wmac0.eeprom",
|
||||
+ .leds = tl_wdr4900_v1_wmac_leds_gpio,
|
||||
+ .num_leds = ARRAY_SIZE(tl_wdr4900_v1_wmac_leds_gpio),
|
||||
+};
|
||||
+
|
||||
+static struct ath9k_platform_data tl_wdr4900_v1_wmac1_data = {
|
||||
+ .led_pin = 0,
|
||||
+ .eeprom_name = "pci_wmac1.eeprom",
|
||||
+};
|
||||
+
|
||||
+static void tl_wdr4900_v1_pci_wmac_fixup(struct pci_dev *dev)
|
||||
+{
|
||||
+ if (!machine_is(tl_wdr4900_v1))
|
||||
+ return;
|
||||
+
|
||||
+ if (dev->bus->number == 1 &&
|
||||
+ PCI_SLOT(dev->devfn) == 0) {
|
||||
+ dev->dev.platform_data = &tl_wdr4900_v1_wmac0_data;
|
||||
+ return;
|
||||
+ }
|
||||
+
|
||||
+ if (dev->bus->number == 3 &&
|
||||
+ PCI_SLOT(dev->devfn) == 0 &&
|
||||
+ dev->device == 0xabcd) {
|
||||
+ dev->dev.platform_data = &tl_wdr4900_v1_wmac1_data;
|
||||
+
|
||||
+ /*
|
||||
+ * The PCI header of the AR9381 chip is not programmed
|
||||
+ * correctly by the bootloader and the device uses wrong
|
||||
+ * data due to that. Replace the broken values with the
|
||||
+ * correct ones.
|
||||
+ */
|
||||
+ dev->device = 0x30;
|
||||
+ dev->class = 0x028000;
|
||||
+
|
||||
+ pr_info("pci %s: AR9381 fixup applied\n", pci_name(dev));
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID,
|
||||
+ tl_wdr4900_v1_pci_wmac_fixup);
|
||||
+#endif /* CONFIG_PCI */
|
||||
+
|
||||
+/*
|
||||
+ * Setup the architecture
|
||||
+ */
|
||||
+static void __init tl_wdr4900_v1_setup_arch(void)
|
||||
+{
|
||||
+ if (ppc_md.progress)
|
||||
+ ppc_md.progress("tl_wdr4900_v1_setup_arch()", 0);
|
||||
+
|
||||
+ fsl_pci_assign_primary();
|
||||
+
|
||||
+ printk(KERN_INFO "TL-WDR4900 v1 board from TP-Link\n");
|
||||
+}
|
||||
+
|
||||
+machine_arch_initcall(tl_wdr4900_v1, mpc85xx_common_publish_devices);
|
||||
+machine_arch_initcall(tl_wdr4900_v1, swiotlb_setup_bus_notifier);
|
||||
+
|
||||
+/*
|
||||
+ * Called very early, device-tree isn't unflattened
|
||||
+ */
|
||||
+static int __init tl_wdr4900_v1_probe(void)
|
||||
+{
|
||||
+ unsigned long root = of_get_flat_dt_root();
|
||||
+
|
||||
+ if (of_flat_dt_is_compatible(root, "tp-link,TL-WDR4900v1"))
|
||||
+ return 1;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+define_machine(tl_wdr4900_v1) {
|
||||
+ .name = "Freescale P1014",
|
||||
+ .probe = tl_wdr4900_v1_probe,
|
||||
+ .setup_arch = tl_wdr4900_v1_setup_arch,
|
||||
+ .init_IRQ = tl_wdr4900_v1_pic_init,
|
||||
+#ifdef CONFIG_PCI
|
||||
+ .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
|
||||
+#endif
|
||||
+ .get_irq = mpic_get_irq,
|
||||
+ .restart = fsl_rstcr_restart,
|
||||
+ .calibrate_decr = generic_calibrate_decr,
|
||||
+ .progress = udbg_progress,
|
||||
+};
|
Loading…
Reference in New Issue