mirror of https://github.com/hak5/openwrt-owl.git
Gabor Juhos
parent
5ff6932c66
commit
3994f8e4c3
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@ -7,6 +7,7 @@ CONFIG_AG71XX=y
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CONFIG_AR71XX_MACH_GENERIC=y
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CONFIG_AR71XX_MACH_RB_4XX=y
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CONFIG_AR71XX_MACH_WP543=y
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CONFIG_AR71XX_WDT=y
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# CONFIG_ARCH_HAS_ILOG2_U32 is not set
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# CONFIG_ARCH_HAS_ILOG2_U64 is not set
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CONFIG_ARCH_POPULATES_NODE_MAP=y
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@ -16,10 +16,19 @@
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#include <asm/mach-ar71xx/ar71xx.h>
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void __iomem *ar71xx_ddr_base;
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EXPORT_SYMBOL_GPL(ar71xx_ddr_base);
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void __iomem *ar71xx_pll_base;
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EXPORT_SYMBOL_GPL(ar71xx_pll_base);
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void __iomem *ar71xx_reset_base;
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EXPORT_SYMBOL_GPL(ar71xx_reset_base);
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void __iomem *ar71xx_gpio_base;
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EXPORT_SYMBOL_GPL(ar71xx_gpio_base);
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void __iomem *ar71xx_usb_ctrl_base;
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EXPORT_SYMBOL_GPL(ar71xx_usb_ctrl_base);
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void ar71xx_device_stop(u32 mask)
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{
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@ -414,6 +414,11 @@ err_free_buttons:
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kfree(p);
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}
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void __init ar71xx_add_device_wdt(void)
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{
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platform_device_register_simple("ar71xx-wdt", -1, NULL, 0);
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}
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void __init ar71xx_set_mac_base(unsigned char *mac)
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{
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memcpy(ar71xx_mac_base, mac, ETH_ALEN);
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@ -439,6 +444,7 @@ static int __init ar71xx_machine_setup(void)
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ar71xx_gpio_init();
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ar71xx_add_device_uart();
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ar71xx_add_device_wdt();
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mips_machine_setup();
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return 0;
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@ -0,0 +1,270 @@
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/*
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* Driver for the Atheros AR71xx SoC's built-in hardware watchdog timer.
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*
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* Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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*
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* This driver was based on: drivers/watchdog/ixp4xx_wdt.c
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* Author: Deepak Saxena <dsaxena@plexity.net>
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* Copyright 2004 (c) MontaVista, Software, Inc.
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*
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* which again was based on sa1100 driver,
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* Copyright (C) 2000 Oleg Drokin <green@crimea.edu>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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*/
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#include <linux/bitops.h>
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#include <linux/errno.h>
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#include <linux/fs.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/miscdevice.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/platform_device.h>
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#include <linux/types.h>
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#include <linux/watchdog.h>
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#include <asm/mach-ar71xx/ar71xx.h>
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#define DRV_NAME "ar71xx-wdt"
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#define DRV_DESC "Atheros AR71xx hardware watchdog driver"
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#define DRV_VERSION "0.1.0"
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#define WDT_TIMEOUT 15 /* seconds */
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static int nowayout = WATCHDOG_NOWAYOUT;
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#ifdef CONFIG_WATCHDOG_NOWAYOUT
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module_param(nowayout, int, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
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"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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#endif
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static unsigned long wdt_flags;
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#define WDT_FLAGS_BUSY 0
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#define WDT_FLAGS_EXPECT_CLOSE 1
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static int wdt_timeout = WDT_TIMEOUT;
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static int boot_status;
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static int max_timeout;
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static void inline ar71xx_wdt_keepalive(void)
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{
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ar71xx_reset_wr(RESET_REG_WDOG, ar71xx_ahb_freq * wdt_timeout);
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}
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static void inline ar71xx_wdt_enable(void)
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{
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printk(KERN_DEBUG DRV_NAME ": enabling watchdog timer\n");
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ar71xx_wdt_keepalive();
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ar71xx_reset_wr(RESET_REG_WDOG_CTRL, WDOG_CTRL_ACTION_FCR);
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}
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static void inline ar71xx_wdt_disable(void)
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{
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printk(KERN_DEBUG DRV_NAME ": disabling watchdog timer\n");
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ar71xx_reset_wr(RESET_REG_WDOG_CTRL, WDOG_CTRL_ACTION_NONE);
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}
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static int ar71xx_wdt_set_timeout(int val)
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{
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if (val < 1 || val > max_timeout)
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return -EINVAL;
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wdt_timeout = val;
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ar71xx_wdt_keepalive();
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printk(KERN_DEBUG DRV_NAME ": timeout=%d secs\n", wdt_timeout);
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return 0;
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}
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static int ar71xx_wdt_open(struct inode *inode, struct file *file)
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{
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if (test_and_set_bit(WDT_FLAGS_BUSY, &wdt_flags))
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return -EBUSY;
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clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags);
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ar71xx_wdt_enable();
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return nonseekable_open(inode, file);
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}
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static int ar71xx_wdt_release(struct inode *inode, struct file *file)
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{
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if (test_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags)) {
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ar71xx_wdt_disable();
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} else {
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printk(KERN_CRIT DRV_NAME ": device closed unexpectedly, "
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"watchdog timer will not stop!\n");
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}
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clear_bit(WDT_FLAGS_BUSY, &wdt_flags);
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clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags);
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return 0;
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}
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static ssize_t ar71xx_wdt_write(struct file *file, const char *data,
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size_t len, loff_t *ppos)
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{
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if (len) {
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if (!nowayout) {
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size_t i;
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clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags);
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for (i = 0; i != len; i++) {
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char c;
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if (get_user(c, data + i))
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return -EFAULT;
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if (c == 'V')
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set_bit(WDT_FLAGS_EXPECT_CLOSE,
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&wdt_flags);
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}
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}
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ar71xx_wdt_keepalive();
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}
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return len;
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}
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static struct watchdog_info ar71xx_wdt_info = {
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.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
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WDIOF_MAGICCLOSE | WDIOF_CARDRESET,
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.firmware_version = 0,
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.identity = "AR71XX watchdog",
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};
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static int ar71xx_wdt_ioctl(struct inode *inode, struct file *file,
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unsigned int cmd, unsigned long arg)
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{
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int t;
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int ret;
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switch (cmd) {
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case WDIOC_GETSUPPORT:
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ret = copy_to_user((struct watchdog_info *)arg,
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&ar71xx_wdt_info,
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sizeof(&ar71xx_wdt_info)) ? -EFAULT : 0;
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break;
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case WDIOC_GETSTATUS:
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ret = put_user(0, (int *)arg) ? -EFAULT : 0;
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break;
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case WDIOC_GETBOOTSTATUS:
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ret = put_user(boot_status, (int *)arg) ? -EFAULT : 0;
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break;
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case WDIOC_KEEPALIVE:
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ar71xx_wdt_keepalive();
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ret = 0;
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break;
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case WDIOC_SETTIMEOUT:
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ret = get_user(t, (int *)arg) ? -EFAULT : 0;
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if (ret)
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break;
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ret = ar71xx_wdt_set_timeout(t);
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if (ret)
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break;
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/* fallthrough */
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case WDIOC_GETTIMEOUT:
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ret = put_user(wdt_timeout, (int *)arg) ? -EFAULT : 0;
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break;
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default:
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ret = -ENOTTY;
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break;
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}
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return ret;
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}
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static const struct file_operations ar71xx_wdt_fops = {
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.owner = THIS_MODULE,
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.write = ar71xx_wdt_write,
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.ioctl = ar71xx_wdt_ioctl,
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.open = ar71xx_wdt_open,
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.release = ar71xx_wdt_release,
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};
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static struct miscdevice ar71xx_wdt_miscdev = {
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.minor = WATCHDOG_MINOR,
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.name = "watchdog",
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.fops = &ar71xx_wdt_fops,
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};
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static int __devinit ar71xx_wdt_probe(struct platform_device *pdev)
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{
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int ret;
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max_timeout = (0xfffffffful / ar71xx_ahb_freq);
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wdt_timeout = (max_timeout < WDT_TIMEOUT) ? max_timeout : WDT_TIMEOUT;
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boot_status =
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(ar71xx_reset_rr(RESET_REG_WDOG_CTRL) & WDOG_CTRL_LAST_RESET) ?
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WDIOF_CARDRESET : 0;
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ret = misc_register(&ar71xx_wdt_miscdev);
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if (ret)
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goto err_out;
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printk(KERN_INFO DRV_DESC " version " DRV_VERSION "\n");
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printk(KERN_DEBUG DRV_NAME ": timeout=%d secs (max=%d)\n",
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wdt_timeout, max_timeout);
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return 0;
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err_out:
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return ret;
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}
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static int __devexit ar71xx_wdt_remove(struct platform_device *pdev)
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{
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misc_deregister(&ar71xx_wdt_miscdev);
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return 0;
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}
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static struct platform_driver ar71xx_wdt_driver = {
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.probe = ar71xx_wdt_probe,
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.remove = __devexit_p(ar71xx_wdt_remove),
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.driver = {
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.name = DRV_NAME,
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.owner = THIS_MODULE,
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},
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};
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static int __init ar71xx_wdt_init(void)
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{
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return platform_driver_register(&ar71xx_wdt_driver);
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}
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module_init(ar71xx_wdt_init);
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static void __exit ar71xx_wdt_exit(void)
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{
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platform_driver_unregister(&ar71xx_wdt_driver);
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}
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module_exit(ar71xx_wdt_exit);
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MODULE_DESCRIPTION(DRV_DESC);
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MODULE_VERSION(DRV_VERSION);
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MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org");
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MODULE_AUTHOR("Imre Kaloz <kaloz@openwrt.org");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("platform:" DRV_NAME);
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MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
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@ -275,6 +275,13 @@ extern void ar71xx_ddr_flush(u32 reg);
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#define RESET_REG_PERFC1 0x34
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#define RESET_REG_REV_ID 0x90
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#define WDOG_CTRL_LAST_RESET BIT(31)
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#define WDOG_CTRL_ACTION_MASK 3
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#define WDOG_CTRL_ACTION_NONE 0 /* no action */
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#define WDOG_CTRL_ACTION_GPI 1 /* general purpose interrupt */
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#define WDOG_CTRL_ACTION_NMI 2 /* NMI */
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#define WDOG_CTRL_ACTION_FCR 3 /* full chip reset */
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#define MISC_INT_DMA BIT(7)
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#define MISC_INT_OHCI BIT(6)
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#define MISC_INT_PERFC BIT(5)
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