mirror of https://github.com/hak5/openwrt-owl.git
parent
764aa3fe9c
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2b50cecea6
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@ -33,6 +33,7 @@
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#define RT2880_SDRAM_BASE 0x08000000
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#define RT2880_SDRAM_BASE 0x08000000
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#define RT2880_SYSC_SIZE 0x100
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#define RT2880_SYSC_SIZE 0x100
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#define RT2880_TIMER_SIZE 0x100
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#define RT2880_INTC_SIZE 0x100
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#define RT2880_INTC_SIZE 0x100
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#define RT2880_MEMC_SIZE 0x100
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#define RT2880_MEMC_SIZE 0x100
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#define RT2880_UART0_SIZE 0x100
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#define RT2880_UART0_SIZE 0x100
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@ -45,6 +46,7 @@
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#define SYSC_REG_CHIP_NAME1 0x004 /* Chip Name 1 */
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#define SYSC_REG_CHIP_NAME1 0x004 /* Chip Name 1 */
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#define SYSC_REG_CHIP_ID 0x00c /* Chip Identification */
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#define SYSC_REG_CHIP_ID 0x00c /* Chip Identification */
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#define SYSC_REG_SYSTEM_CONFIG 0x010 /* System Configuration */
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#define SYSC_REG_SYSTEM_CONFIG 0x010 /* System Configuration */
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#define SYSC_REG_CLKCFG 0x030
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#define SYSC_REG_RESET_CTRL 0x034 /* Reset Control*/
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#define SYSC_REG_RESET_CTRL 0x034 /* Reset Control*/
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#define SYSC_REG_RESET_STATUS 0x038 /* Reset Status*/
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#define SYSC_REG_RESET_STATUS 0x038 /* Reset Status*/
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#define SYSC_REG_GPIO_MODE 0x060 /* GPIO Purpose Select */
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#define SYSC_REG_GPIO_MODE 0x060 /* GPIO Purpose Select */
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@ -62,6 +64,8 @@
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#define SYSTEM_CONFIG_CPUCLK_280 0x2
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#define SYSTEM_CONFIG_CPUCLK_280 0x2
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#define SYSTEM_CONFIG_CPUCLK_300 0x3
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#define SYSTEM_CONFIG_CPUCLK_300 0x3
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#define CLKCFG_SRAM_CS_N_WDT BIT(9)
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#define RT2880_RESET_SYSTEM BIT(0)
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#define RT2880_RESET_SYSTEM BIT(0)
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#define RT2880_RESET_TIMER BIT(1)
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#define RT2880_RESET_TIMER BIT(1)
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#define RT2880_RESET_INTC BIT(2)
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#define RT2880_RESET_INTC BIT(2)
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@ -171,3 +171,30 @@ void __init rt288x_register_ethernet(void)
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platform_device_register(&rt288x_eth_device);
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platform_device_register(&rt288x_eth_device);
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}
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}
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static struct resource rt288x_wdt_resources[] = {
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{
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.start = RT2880_TIMER_BASE,
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.end = RT2880_TIMER_BASE + RT2880_TIMER_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device rt288x_wdt_device = {
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.name = "ramips-wdt",
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.id = -1,
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.resource = rt288x_wdt_resources,
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.num_resources = ARRAY_SIZE(rt288x_wdt_resources),
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};
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void __init rt288x_register_wdt(void)
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{
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u32 t;
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/* enable WDT reset output on pin SRAM_CS_N */
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t = rt288x_sysc_rr(SYSC_REG_CLKCFG);
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t |= CLKCFG_SRAM_CS_N_WDT;
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rt288x_sysc_wr(t, SYSC_REG_CLKCFG);
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platform_device_register(&rt288x_wdt_device);
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}
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@ -20,4 +20,6 @@ void rt288x_register_wifi(void);
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extern struct ramips_eth_platform_data rt288x_eth_data;
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extern struct ramips_eth_platform_data rt288x_eth_data;
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void rt288x_register_ethernet(void);
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void rt288x_register_ethernet(void);
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void rt288x_register_wdt(void);
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#endif /* __ASM_MACH_RT288X_PLATFORM_H */
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#endif /* __ASM_MACH_RT288X_PLATFORM_H */
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