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ar71xx: add support for the watchdog of the AR934x SoCs 

Signed-off-by: Jaiganesh Narayanan <jnarayanan@atheros.com>

SVN-Revision: 26516
owl
Gabor Juhos 2011-04-07 20:53:10 +00:00
parent e4555809c7
commit 2b064bb398
1 changed files with 20 additions and 2 deletions
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22
target/linux/ar71xx/files/drivers/watchdog/ar71xx_wdt.c
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@ -1,9 +1,12 @@
/*
* Driver for the Atheros AR71xx SoC's built-in hardware watchdog timer.
*
* Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
* Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* Parts of this file are based on Atheros 2.6.31 BSP
*
* This driver was based on: drivers/watchdog/ixp4xx_wdt.c
* Author: Deepak Saxena <dsaxena@plexity.net>
* Copyright 2004 (c) MontaVista, Software, Inc.
@ -28,6 +31,7 @@
#include <linux/platform_device.h>
#include <linux/types.h>
#include <linux/watchdog.h>
#include <linux/delay.h>
#include <asm/mach-ar71xx/ar71xx.h>
@ -53,16 +57,18 @@ static unsigned long wdt_flags;
static int wdt_timeout = WDT_TIMEOUT;
static int boot_status;
static int max_timeout;
static u32 wdt_clk_freq;
static inline void ar71xx_wdt_keepalive(void)
{
ar71xx_reset_wr(AR71XX_RESET_REG_WDOG, ar71xx_ahb_freq * wdt_timeout);
ar71xx_reset_wr(AR71XX_RESET_REG_WDOG, wdt_clk_freq * wdt_timeout);
}
static inline void ar71xx_wdt_enable(void)
{
printk(KERN_DEBUG DRV_NAME ": enabling watchdog timer\n");
ar71xx_wdt_keepalive();
udelay(2);
ar71xx_reset_wr(AR71XX_RESET_REG_WDOG_CTRL, WDOG_CTRL_ACTION_FCR);
}
@ -212,7 +218,19 @@ static int __devinit ar71xx_wdt_probe(struct platform_device *pdev)
{
int ret;
max_timeout = (0xfffffffful / ar71xx_ahb_freq);
switch (ar71xx_soc) {
case AR71XX_SOC_AR9341:
case AR71XX_SOC_AR9342:
case AR71XX_SOC_AR9344:
wdt_clk_freq = ar934x_ref_freq;
break;
default:
wdt_clk_freq = ar71xx_ahb_freq;
break;
}
max_timeout = (0xfffffffful / wdt_clk_freq);
wdt_timeout = (max_timeout < WDT_TIMEOUT) ? max_timeout : WDT_TIMEOUT;
if (ar71xx_reset_rr(AR71XX_RESET_REG_WDOG_CTRL) & WDOG_CTRL_LAST_RESET)