enable the second uart on the WG302v1

SVN-Revision: 12040
owl
Imre Kaloz 2008-07-31 11:14:00 +00:00
parent 7c7af43a39
commit 1c2a1c888a
1 changed files with 23 additions and 7 deletions

View File

@ -112,7 +112,7 @@
+subsys_initcall(wg302v1_pci_init); +subsys_initcall(wg302v1_pci_init);
--- /dev/null --- /dev/null
+++ b/arch/arm/mach-ixp4xx/wg302v1-setup.c +++ b/arch/arm/mach-ixp4xx/wg302v1-setup.c
@@ -0,0 +1,126 @@ @@ -0,0 +1,142 @@
+/* +/*
+ * arch/arm/mach-ixp4xx/wg302v1-setup.c + * arch/arm/mach-ixp4xx/wg302v1-setup.c
+ * + *
@ -163,10 +163,17 @@
+ .resource = &wg302v1_flash_resource, + .resource = &wg302v1_flash_resource,
+}; +};
+ +
+static struct resource wg302v1_uart_resource = { +static struct resource wg302v1_uart_resources[] = {
+ {
+ .start = IXP4XX_UART1_BASE_PHYS, + .start = IXP4XX_UART1_BASE_PHYS,
+ .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, + .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
+ .flags = IORESOURCE_MEM, + .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = IXP4XX_UART2_BASE_PHYS,
+ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
+ .flags = IORESOURCE_MEM,
+ }
+}; +};
+ +
+static struct plat_serial8250_port wg302v1_uart_data[] = { +static struct plat_serial8250_port wg302v1_uart_data[] = {
@ -179,6 +186,15 @@
+ .regshift = 2, + .regshift = 2,
+ .uartclk = IXP4XX_UART_XTAL, + .uartclk = IXP4XX_UART_XTAL,
+ }, + },
+ {
+ .mapbase = IXP4XX_UART2_BASE_PHYS,
+ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
+ .irq = IRQ_IXP4XX_UART2,
+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
+ .iotype = UPIO_MEM,
+ .regshift = 2,
+ .uartclk = IXP4XX_UART_XTAL,
+ },
+ { }, + { },
+}; +};
+ +
@ -188,8 +204,8 @@
+ .dev = { + .dev = {
+ .platform_data = wg302v1_uart_data, + .platform_data = wg302v1_uart_data,
+ }, + },
+ .num_resources = 1, + .num_resources = 2,
+ .resource = &wg302v1_uart_resource, + .resource = wg302v1_uart_resources,
+}; +};
+ +
+static struct eth_plat_info wg302v1_plat_eth[] = { +static struct eth_plat_info wg302v1_plat_eth[] = {