layerscape: update patches-4.9 to LSDK1712

Patches changes
- Updated patches-4.9 to NXP LSDK1712 linux-4.9.
- Merged changes of patch 303 into integrated patch 201.
- Split changes of patch 706 into dpaa part and dpaa2
  part, and merged these changes into integrated patches
  701 and 705.
- Removed patch 819 since ehci-fsl driver could be compiled now.
- Refreshed these patches.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>

target/linux/layerscape/patches-4.9/201-config-support-layerscape.patch

@@ -1,12 +1,12 @@
-From 7992b4384d94c5e1bad998ca3a9a5781caac8e62 Mon Sep 17 00:00:00 2001
+From e43dec70614b55ba1ce24dfcdf8f51e36d800af2 Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Mon, 25 Sep 2017 09:52:26 +0800
+Date: Wed, 17 Jan 2018 15:26:46 +0800
-Subject: [PATCH] config: support layerscape
+Subject: [PATCH 01/30] config: support layerscape
 MIME-Version: 1.0
 Content-Type: text/plain; charset=UTF-8
 Content-Transfer-Encoding: 8bit
 
-This is a integrated patch for layerscape config/makefile support.
+This is an integrated patch for layerscape config/makefile support.
 
 Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
 Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
@@ -16,33 +16,42 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
 Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 ---
- drivers/base/Kconfig                    |   1 +
+ arch/arm/mach-imx/Kconfig               |  1 +
- drivers/crypto/Makefile                 |   2 +-
+ drivers/base/Kconfig                    |  1 +
- drivers/net/ethernet/freescale/Kconfig  |   4 +-
+ drivers/crypto/Makefile                 |  2 +-
- drivers/net/ethernet/freescale/Makefile |   2 +
+ drivers/net/ethernet/freescale/Kconfig  |  4 ++-
- drivers/ptp/Kconfig                     |  29 ++++++
+ drivers/net/ethernet/freescale/Makefile |  2 ++
- drivers/rtc/Kconfig                     |   8 ++
+ drivers/ptp/Kconfig                     | 29 +++++++++++++++++++
- drivers/rtc/Makefile                    |   1 +
+ drivers/rtc/Kconfig                     |  8 ++++++
- drivers/soc/Kconfig                     |   3 +-
+ drivers/rtc/Makefile                    |  1 +
- drivers/soc/fsl/Kconfig                 |  22 +++++
+ drivers/soc/Kconfig                     |  3 +-
- drivers/soc/fsl/Kconfig.arm             |  16 ++++
+ drivers/soc/fsl/Kconfig                 | 22 ++++++++++++++
- drivers/soc/fsl/Makefile                |   4 +
+ drivers/soc/fsl/Kconfig.arm             | 16 +++++++++++
- drivers/soc/fsl/layerscape/Kconfig      |  10 +++
+ drivers/soc/fsl/Makefile                |  4 +++
- drivers/soc/fsl/layerscape/Makefile     |   1 +
+ drivers/soc/fsl/layerscape/Kconfig      | 10 +++++++
- drivers/soc/fsl/rcpm.c                  | 154 ++++++++++++++++++++++++++++++++
+ drivers/soc/fsl/layerscape/Makefile     |  1 +
- drivers/staging/Kconfig                 |   6 ++
+ drivers/staging/Kconfig                 |  6 ++++
- drivers/staging/Makefile                |   3 +
+ drivers/staging/Makefile                |  3 ++
- drivers/staging/fsl-dpaa2/Kconfig       |  41 +++++++++
+ drivers/staging/fsl-dpaa2/Kconfig       | 51 +++++++++++++++++++++++++++++++++
- drivers/staging/fsl-dpaa2/Makefile      |   9 ++
+ drivers/staging/fsl-dpaa2/Makefile      |  9 ++++++
- 18 files changed, 312 insertions(+), 4 deletions(-)
+ 18 files changed, 169 insertions(+), 4 deletions(-)
  create mode 100644 drivers/soc/fsl/Kconfig
  create mode 100644 drivers/soc/fsl/Kconfig.arm
  create mode 100644 drivers/soc/fsl/layerscape/Kconfig
  create mode 100644 drivers/soc/fsl/layerscape/Makefile
- create mode 100644 drivers/soc/fsl/rcpm.c
  create mode 100644 drivers/staging/fsl-dpaa2/Kconfig
  create mode 100644 drivers/staging/fsl-dpaa2/Makefile
 
+--- a/arch/arm/mach-imx/Kconfig
++++ b/arch/arm/mach-imx/Kconfig
+@@ -1,6 +1,7 @@
+ menuconfig ARCH_MXC
+ 	bool "Freescale i.MX family"
+ 	depends on ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7 || ARM_SINGLE_ARMV7M
++	select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
+ 	select ARCH_SUPPORTS_BIG_ENDIAN
+ 	select CLKSRC_IMX_GPT
+ 	select GENERIC_IRQ_CHIP
 --- a/drivers/base/Kconfig
 +++ b/drivers/base/Kconfig
 @@ -240,6 +240,7 @@ config GENERIC_CPU_VULNERABILITIES
@@ -239,163 +248,6 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +++ b/drivers/soc/fsl/layerscape/Makefile
 @@ -0,0 +1 @@
 +obj-$(CONFIG_FTM_ALARM) += ftm_alarm.o
---- /dev/null
-+++ b/drivers/soc/fsl/rcpm.c
-@@ -0,0 +1,154 @@
-+/*
-+ * Run Control and Power Management (RCPM) driver
-+ *
-+ * Copyright 2016 NXP
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ */
-+#define pr_fmt(fmt) "RCPM: %s: " fmt, __func__
-+
-+#include <linux/kernel.h>
-+#include <linux/io.h>
-+#include <linux/of_platform.h>
-+#include <linux/of_address.h>
-+#include <linux/suspend.h>
-+
-+/* RCPM register offset */
-+#define RCPM_IPPDEXPCR0			0x140
-+
-+#define RCPM_WAKEUP_CELL_SIZE	2
-+
-+struct rcpm_config {
-+	int ipp_num;
-+	int ippdexpcr_offset;
-+	u32 ippdexpcr[2];
-+	void *rcpm_reg_base;
-+};
-+
-+static struct rcpm_config *rcpm;
-+
-+static inline void rcpm_reg_write(u32 offset, u32 value)
-+{
-+	iowrite32be(value, rcpm->rcpm_reg_base + offset);
-+}
-+
-+static inline u32 rcpm_reg_read(u32 offset)
-+{
-+	return ioread32be(rcpm->rcpm_reg_base + offset);
-+}
-+
-+static void rcpm_wakeup_fixup(struct device *dev, void *data)
-+{
-+	struct device_node *node = dev ? dev->of_node : NULL;
-+	u32 value[RCPM_WAKEUP_CELL_SIZE];
-+	int ret, i;
-+
-+	if (!dev || !node || !device_may_wakeup(dev))
-+		return;
-+
-+	/*
-+	 * Get the values in the "rcpm-wakeup" property.
-+	 * Three values are:
-+	 * The first is a pointer to the RCPM node.
-+	 * The second is the value of the ippdexpcr0 register.
-+	 * The third is the value of the ippdexpcr1 register.
-+	 */
-+	ret = of_property_read_u32_array(node, "fsl,rcpm-wakeup",
-+					 value, RCPM_WAKEUP_CELL_SIZE);
-+	if (ret)
-+		return;
-+
-+	pr_debug("wakeup source: the device %s\n", node->full_name);
-+
-+	for (i = 0; i < rcpm->ipp_num; i++)
-+		rcpm->ippdexpcr[i] |= value[i + 1];
-+}
-+
-+static int rcpm_suspend_prepare(void)
-+{
-+	int i;
-+
-+	BUG_ON(!rcpm);
-+
-+	for (i = 0; i < rcpm->ipp_num; i++)
-+		rcpm->ippdexpcr[i] = 0;
-+
-+	dpm_for_each_dev(NULL, rcpm_wakeup_fixup);
-+
-+	for (i = 0; i < rcpm->ipp_num; i++) {
-+		rcpm_reg_write(rcpm->ippdexpcr_offset + 4 * i,
-+			       rcpm->ippdexpcr[i]);
-+		pr_debug("ippdexpcr%d = 0x%x\n", i, rcpm->ippdexpcr[i]);
-+	}
-+
-+	return 0;
-+}
-+
-+static int rcpm_suspend_notifier_call(struct notifier_block *bl,
-+				      unsigned long state,
-+				      void *unused)
-+{
-+	switch (state) {
-+	case PM_SUSPEND_PREPARE:
-+		rcpm_suspend_prepare();
-+		break;
-+	}
-+
-+	return NOTIFY_DONE;
-+}
-+
-+static struct rcpm_config rcpm_default_config = {
-+	.ipp_num = 1,
-+	.ippdexpcr_offset = RCPM_IPPDEXPCR0,
-+};
-+
-+static const struct of_device_id rcpm_matches[] = {
-+	{
-+		.compatible = "fsl,qoriq-rcpm-2.1",
-+		.data = &rcpm_default_config,
-+	},
-+	{}
-+};
-+
-+static struct notifier_block rcpm_suspend_notifier = {
-+	.notifier_call = rcpm_suspend_notifier_call,
-+};
-+
-+static int __init layerscape_rcpm_init(void)
-+{
-+	const struct of_device_id *match;
-+	struct device_node *np;
-+
-+	np = of_find_matching_node_and_match(NULL, rcpm_matches, &match);
-+	if (!np) {
-+		pr_err("Can't find the RCPM node.\n");
-+		return -EINVAL;
-+	}
-+
-+	if (match->data)
-+		rcpm = (struct rcpm_config *)match->data;
-+	else
-+		return -EINVAL;
-+
-+	rcpm->rcpm_reg_base = of_iomap(np, 0);
-+	of_node_put(np);
-+	if (!rcpm->rcpm_reg_base)
-+		return -ENOMEM;
-+
-+	register_pm_notifier(&rcpm_suspend_notifier);
-+
-+	pr_info("The RCPM driver initialized.\n");
-+
-+	return 0;
-+}
-+
-+subsys_initcall(layerscape_rcpm_init);
 --- a/drivers/staging/Kconfig
 +++ b/drivers/staging/Kconfig
 @@ -94,6 +94,8 @@ source "drivers/staging/fbtft/Kconfig"
@@ -433,7 +285,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +obj-$(CONFIG_FSL_PPFE)		+= fsl_ppfe/
 --- /dev/null
 +++ b/drivers/staging/fsl-dpaa2/Kconfig
-@@ -0,0 +1,41 @@
+@@ -0,0 +1,51 @@
 +#
 +# Freescale DataPath Acceleration Architecture Gen2 (DPAA2) drivers
 +#
@@ -470,6 +322,16 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +	default n
 +	---help---
 +	  Enable advanced statistics through debugfs interface.
++
++config FSL_DPAA2_ETH_DCB
++        bool "Data Center Bridging (DCB) Support"
++        default n
++        depends on DCB
++        ---help---
++          Say Y here if you want to use Data Center Bridging (DCB) features
++          (PFC) in the driver.
++
++          If unsure, say N.
 +endif
 +
 +source "drivers/staging/fsl-dpaa2/mac/Kconfig"

target/linux/layerscape/patches-4.9/202-core-linux-support-layerscape.patch

@@ -1,9 +1,9 @@
-From c37953457a7ebeb0d97ae8574b3d41274fcd9119 Mon Sep 17 00:00:00 2001
+From 67a2eceebe9dcd92a1a5f3e912340c8975c84434 Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Wed, 1 Nov 2017 16:22:33 +0800
+Date: Wed, 17 Jan 2018 14:50:41 +0800
-Subject: [PATCH] core-linux: support layerscape
+Subject: [PATCH 02/30] core-linux: support layerscape
 
-This is a integrated patch for layerscape core-linux support.
+This is an integrated patch for layerscape core-linux support.
 
 Signed-off-by: Madalin Bucur <madalin.bucur@freescale.com>
 Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
@@ -18,7 +18,7 @@ Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 ---
  drivers/base/devres.c           | 66 ++++++++++++++++++++++++++++
- drivers/base/soc.c              | 66 ++++++++++++++++++++++++++++
+ drivers/base/soc.c              | 70 +++++++++++++++++++++++++++++
  include/linux/device.h          | 19 ++++++++
  include/linux/fsl/svr.h         | 97 +++++++++++++++++++++++++++++++++++++++++
  include/linux/fsl_devices.h     |  3 ++
@@ -30,7 +30,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  net/core/dev.c                  | 13 +++++-
  net/core/skbuff.c               | 29 +++++++++++-
  net/sched/sch_generic.c         |  7 +++
- 13 files changed, 309 insertions(+), 3 deletions(-)
+ 13 files changed, 313 insertions(+), 3 deletions(-)
  create mode 100644 include/linux/fsl/svr.h
 
 --- a/drivers/base/devres.c
@@ -122,7 +122,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  
  static DEFINE_IDA(soc_ida);
  
-@@ -159,3 +160,68 @@ static int __init soc_bus_register(void)
+@@ -159,3 +160,72 @@ static int __init soc_bus_register(void)
  	return bus_register(&soc_bus_type);
  }
  core_initcall(soc_bus_register);
@@ -133,19 +133,23 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +	const struct soc_device_attribute *match = arg;
 +
 +	if (match->machine &&
-+	    !glob_match(match->machine, soc_dev->attr->machine))
++	    (!soc_dev->attr->machine ||
++	     !glob_match(match->machine, soc_dev->attr->machine)))
 +		return 0;
 +
 +	if (match->family &&
-+	    !glob_match(match->family, soc_dev->attr->family))
++	    (!soc_dev->attr->family ||
++	     !glob_match(match->family, soc_dev->attr->family)))
 +		return 0;
 +
 +	if (match->revision &&
-+	    !glob_match(match->revision, soc_dev->attr->revision))
++	    (!soc_dev->attr->revision ||
++	     !glob_match(match->revision, soc_dev->attr->revision)))
 +		return 0;
 +
 +	if (match->soc_id &&
-+	    !glob_match(match->soc_id, soc_dev->attr->soc_id))
++	    (!soc_dev->attr->soc_id ||
++	     !glob_match(match->soc_id, soc_dev->attr->soc_id)))
 +		return 0;
 +
 +	return 1;

target/linux/layerscape/patches-4.9/301-arch-support-layerscape.patch

@@ -1,12 +1,12 @@
-From 739029f49bd9181b821298f9d27b29ce2d292967 Mon Sep 17 00:00:00 2001
+From 45e934873f9147f692dddbb61abc088f4c8059d7 Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Mon, 25 Sep 2017 10:03:52 +0800
+Date: Wed, 17 Jan 2018 14:51:29 +0800
-Subject: [PATCH] arch: support layerscape
+Subject: [PATCH 03/30] arch: support layerscape
 MIME-Version: 1.0
 Content-Type: text/plain; charset=UTF-8
 Content-Transfer-Encoding: 8bit
 
-This is a integrated patch for layerscape arch support.
+This is an integrated patch for layerscape arch support.
 
 Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
 Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
@@ -29,13 +29,13 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  arch/arm/mm/ioremap.c                 |  7 ++++
  arch/arm/mm/mmu.c                     |  9 +++++
  arch/arm64/include/asm/cache.h        |  2 +-
- arch/arm64/include/asm/io.h           |  2 ++
+ arch/arm64/include/asm/io.h           | 30 +++++++++++++++++
  arch/arm64/include/asm/pci.h          |  4 +++
  arch/arm64/include/asm/pgtable-prot.h |  1 +
  arch/arm64/include/asm/pgtable.h      |  5 +++
  arch/arm64/kernel/pci.c               | 62 +++++++++++++++++++++++++++++++++++
- arch/arm64/mm/dma-mapping.c           | 23 ++++++++++---
+ arch/arm64/mm/dma-mapping.c           |  6 ++++
- 15 files changed, 209 insertions(+), 8 deletions(-)
+ 15 files changed, 225 insertions(+), 3 deletions(-)
 
 --- a/arch/arm/include/asm/delay.h
 +++ b/arch/arm/include/asm/delay.h
@@ -284,6 +284,41 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +                                                __pgprot(PROT_NORMAL_NS))
  #define iounmap				__iounmap
  
+ /*
+@@ -184,6 +186,34 @@ extern void __iomem *ioremap_cache(phys_
+ #define iowrite32be(v,p)	({ __iowmb(); __raw_writel((__force __u32)cpu_to_be32(v), p); })
+ #define iowrite64be(v,p)	({ __iowmb(); __raw_writeq((__force __u64)cpu_to_be64(v), p); })
+ 
++/* access ports */
++#define setbits32(_addr, _v) iowrite32be(ioread32be(_addr) |  (_v), (_addr))
++#define clrbits32(_addr, _v) iowrite32be(ioread32be(_addr) & ~(_v), (_addr))
++
++#define setbits16(_addr, _v) iowrite16be(ioread16be(_addr) |  (_v), (_addr))
++#define clrbits16(_addr, _v) iowrite16be(ioread16be(_addr) & ~(_v), (_addr))
++
++#define setbits8(_addr, _v) iowrite8(ioread8(_addr) |  (_v), (_addr))
++#define clrbits8(_addr, _v) iowrite8(ioread8(_addr) & ~(_v), (_addr))
++
++/* Clear and set bits in one shot.  These macros can be used to clear and
++ * set multiple bits in a register using a single read-modify-write.  These
++ * macros can also be used to set a multiple-bit bit pattern using a mask,
++ * by specifying the mask in the 'clear' parameter and the new bit pattern
++ * in the 'set' parameter.
++ */
++
++#define clrsetbits_be32(addr, clear, set) \
++	iowrite32be((ioread32be(addr) & ~(clear)) | (set), (addr))
++#define clrsetbits_le32(addr, clear, set) \
++	iowrite32le((ioread32le(addr) & ~(clear)) | (set), (addr))
++#define clrsetbits_be16(addr, clear, set) \
++	iowrite16be((ioread16be(addr) & ~(clear)) | (set), (addr))
++#define clrsetbits_le16(addr, clear, set) \
++	iowrite16le((ioread16le(addr) & ~(clear)) | (set), (addr))
++#define clrsetbits_8(addr, clear, set) \
++	iowrite8((ioread8(addr) & ~(clear)) | (set), (addr))
++
+ #include <asm-generic/io.h>
+ 
  /*
 --- a/arch/arm64/include/asm/pci.h
 +++ b/arch/arm64/include/asm/pci.h

target/linux/layerscape/patches-4.9/302-dts-support-layercape.patch

@@ -1,9 +1,9 @@
-From bfa4a794f91162cfeccfa4d59121cde9a84e32a3 Mon Sep 17 00:00:00 2001
+From 1806d342beb334c8cb0a438315ad5529262b2791 Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Mon, 25 Sep 2017 10:02:10 +0800
+Date: Wed, 17 Jan 2018 14:52:50 +0800
-Subject: [PATCH] dts: support layercape
+Subject: [PATCH 04/30] dts: support layercape
 
-This is a integrated patch for layerscape dts support.
+This is an integrated patch for layerscape dts support.
 
 Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
 Signed-off-by: Alison Wang <b18965@freescale.com>
@@ -32,9 +32,9 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  arch/arm/boot/dts/ecx-2000.dts                     |   2 +-
  arch/arm/boot/dts/imx6ul.dtsi                      |   4 +-
  arch/arm/boot/dts/keystone.dtsi                    |   4 +-
- arch/arm/boot/dts/ls1021a-qds.dts                  |  13 +
+ arch/arm/boot/dts/ls1021a-qds.dts                  |  21 +
- arch/arm/boot/dts/ls1021a-twr.dts                  |  13 +
+ arch/arm/boot/dts/ls1021a-twr.dts                  |  25 +
- arch/arm/boot/dts/ls1021a.dtsi                     | 155 ++--
+ arch/arm/boot/dts/ls1021a.dtsi                     | 197 +++--
  arch/arm/boot/dts/mt6580.dtsi                      |   2 +-
  arch/arm/boot/dts/mt6589.dtsi                      |   2 +-
  arch/arm/boot/dts/mt8127.dtsi                      |   2 +-
@@ -44,28 +44,29 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  arch/arm/boot/dts/sun7i-a20.dtsi                   |   4 +-
  arch/arm/boot/dts/sun8i-a23-a33.dtsi               |   2 +-
  arch/arm/boot/dts/sun9i-a80.dtsi                   |   2 +-
- arch/arm64/boot/dts/freescale/Makefile             |  16 +
+ arch/arm64/boot/dts/freescale/Makefile             |  17 +
+ .../boot/dts/freescale/fsl-ls1012a-2g5rdb.dts      | 123 +++
  arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts | 177 ++++
- arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts  | 198 +++++
+ arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts  | 202 +++++
- arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts  | 134 +++
+ arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts  | 138 ++++
- arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi     | 594 ++++++++++++++
+ arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi     | 602 ++++++++++++++
  arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi |  45 +
  .../boot/dts/freescale/fsl-ls1043a-qds-sdk.dts     |  69 ++
  arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts  | 171 +++-
  .../boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts     |  69 ++
  .../boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts  | 117 +++
  arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts  | 113 ++-
- arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi     | 302 ++++++-
+ arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi     | 308 ++++++-
  arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi |  48 ++
- .../boot/dts/freescale/fsl-ls1046a-qds-sdk.dts     | 109 +++
+ .../boot/dts/freescale/fsl-ls1046a-qds-sdk.dts     | 110 +++
  arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts  | 363 ++++++++
- .../boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts     |  76 ++
+ .../boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts     |  83 ++
  .../boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts  | 110 +++
  arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts  | 218 +++++
- arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi     | 793 ++++++++++++++++++
+ arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi     | 800 ++++++++++++++++++
  arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts  | 173 ++++
  arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts  | 236 ++++++
- arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi     | 818 ++++++++++++++++++
+ arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi     | 825 ++++++++++++++++++
  arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts  | 191 ++---
  arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts  | 169 ++--
  arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts |   9 +-
@@ -76,9 +77,9 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi     | 195 +++++
  arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi | 198 +++++
  arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 161 ++++
- arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi     | 912 +++++++++++++++++++++
+ arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi     | 919 +++++++++++++++++++++
  .../boot/dts/freescale/qoriq-bman1-portals.dtsi    |  81 ++
- arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi  |  66 ++
+ arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi  |  73 ++
  .../boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi    |  43 +
  .../boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi    |  43 +
  .../boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi     |  42 +
@@ -93,7 +94,8 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  arch/powerpc/boot/dts/fsl/qoriq-bman1-portals.dtsi |  10 +
  arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi |   4 +-
  arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi |   4 +-
- 66 files changed, 7988 insertions(+), 1021 deletions(-)
+ 67 files changed, 8231 insertions(+), 1022 deletions(-)
+ create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts
  create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
  create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
  create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
@@ -221,6 +223,18 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  &enet0 {
  	tbi-handle = <&tbi0>;
  	phy-handle = <&sgmii_phy1c>;
+@@ -331,3 +344,11 @@
+ &uart1 {
+ 	status = "okay";
+ };
++
++&can0 {
++	status = "okay";
++};
++
++&can1 {
++	status = "okay";
++};
 --- a/arch/arm/boot/dts/ls1021a-twr.dts
 +++ b/arch/arm/boot/dts/ls1021a-twr.dts
 @@ -142,6 +142,19 @@
@@ -243,6 +257,29 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  &enet0 {
  	tbi-handle = <&tbi1>;
  	phy-handle = <&sgmii_phy2>;
+@@ -228,6 +241,10 @@
+ 	};
+ };
+ 
++&esdhc {
++        status = "okay";
++};
++
+ &sai1 {
+ 	status = "okay";
+ };
+@@ -243,3 +260,11 @@
+ &uart1 {
+ 	status = "okay";
+ };
++
++&can0 {
++	status = "okay";
++};
++
++&can1 {
++	status = "okay";
++};
 --- a/arch/arm/boot/dts/ls1021a.dtsi
 +++ b/arch/arm/boot/dts/ls1021a.dtsi
 @@ -74,17 +74,24 @@
@@ -303,7 +340,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  			reg = <0x0 0x1570e08 0x0 0x8>;
  			msi-controller;
  			interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
-@@ -137,11 +144,12 @@
+@@ -137,16 +144,17 @@
  			compatible = "fsl,ifc", "simple-bus";
  			reg = <0x0 0x1530000 0x0 0x10000>;
  			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
@@ -317,6 +354,12 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  			big-endian;
  		};
  
+ 		esdhc: esdhc@1560000 {
+-			compatible = "fsl,esdhc";
++			compatible = "fsl,ls1021a-esdhc","fsl,esdhc";
+ 			reg = <0x0 0x1560000 0x0 0x10000>;
+ 			interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
+ 			clock-frequency = <0>;
 @@ -163,7 +171,7 @@
  			      <0x0 0x20220520 0x0 0x4>;
  			reg-names = "ahci", "sata-ecc";
@@ -536,9 +579,9 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +
 +		qdma: qdma@8390000 {
 +			compatible = "fsl,ls1021a-qdma";
-+			reg = <0x0 0x8388000 0x0 0x1000>, /* Controller regs */
++			reg = <0x0 0x8398000 0x0 0x1000>, /* Controller regs */
-+			      <0x0 0x8389000 0x0 0x1000>, /* Status regs */
++			      <0x0 0x8399000 0x0 0x1000>, /* Status regs */
-+			      <0x0 0x838a000 0x0 0x2000>; /* Block regs */
++			      <0x0 0x839a000 0x0 0x2000>; /* Block regs */
 +			interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
 +				     <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 +			interrupt-names = "qdma-error", "qdma-queue";
@@ -609,6 +652,52 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  			#interrupt-cells = <1>;
  			interrupt-map-mask = <0 0 0 7>;
  			interrupt-map = <0000 0 0 1 &gic GIC_SPI 92  IRQ_TYPE_LEVEL_HIGH>,
+@@ -674,5 +697,45 @@
+ 					<0000 0 0 3 &gic GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
+ 					<0000 0 0 4 &gic GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
+ 		};
++
++		can0: can@2a70000 {
++			compatible = "fsl,ls1021ar2-flexcan";
++			reg = <0x0 0x2a70000 0x0 0x1000>;
++			interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&clockgen 4 1>, <&clockgen 4 1>;
++			clock-names = "ipg", "per";
++			big-endian;
++			status = "disabled";
++		};
++
++		can1: can@2a80000 {
++			compatible = "fsl,ls1021ar2-flexcan";
++			reg = <0x0 0x2a80000 0x0 0x1000>;
++			interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&clockgen 4 1>, <&clockgen 4 1>;
++			clock-names = "ipg", "per";
++			big-endian;
++			status = "disabled";
++		};
++
++		can2: can@2a90000 {
++			compatible = "fsl,ls1021ar2-flexcan";
++			reg = <0x0 0x2a90000 0x0 0x1000>;
++			interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&clockgen 4 1>, <&clockgen 4 1>;
++			clock-names = "ipg", "per";
++			big-endian;
++			status = "disabled";
++		};
++
++		can3: can@2aa0000 {
++			compatible = "fsl,ls1021ar2-flexcan";
++			reg = <0x0 0x2aa0000 0x0 0x1000>;
++			interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&clockgen 4 1>, <&clockgen 4 1>;
++			clock-names = "ipg", "per";
++			big-endian;
++			status = "disabled";
++		};
+ 	};
+ };
 --- a/arch/arm/boot/dts/mt6580.dtsi
 +++ b/arch/arm/boot/dts/mt6580.dtsi
 @@ -91,7 +91,7 @@
@@ -713,10 +802,11 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  			interrupt-controller;
 --- a/arch/arm64/boot/dts/freescale/Makefile
 +++ b/arch/arm64/boot/dts/freescale/Makefile
-@@ -1,8 +1,24 @@
+@@ -1,8 +1,25 @@
 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frdm.dtb
 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-qds.dtb
 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb
++dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-2g5rdb.dtb
  dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb
 +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds-sdk.dtb
  dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb
@@ -739,6 +829,132 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  always		:= $(dtb-y)
  subdir-y	:= $(dts-dirs)
 --- /dev/null
++++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts
+@@ -0,0 +1,123 @@
++/*
++ * Device Tree file for NXP LS1012A 2G5RDB Board.
++ *
++ * Copyright 2017 NXP
++ *
++ * Bhaskar Upadhaya <bhaskar.upadhaya@nxp.com>
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPLv2 or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ *  a) This library is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This library is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
++ */
++/dts-v1/;
++
++#include "fsl-ls1012a.dtsi"
++
++/ {
++	model = "LS1012A 2G5RDB Board";
++	compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
++
++	aliases {
++		ethernet0 = &pfe_mac0;
++		ethernet1 = &pfe_mac1;
++	};
++};
++
++&duart0 {
++	status = "okay";
++};
++
++&i2c0 {
++	status = "okay";
++};
++
++&qspi {
++	num-cs = <2>;
++	bus-num = <0>;
++	status = "okay";
++
++	qflash0: s25fs512s@0 {
++		compatible = "spansion,m25p80";
++		#address-cells = <1>;
++		#size-cells = <1>;
++		spi-max-frequency = <20000000>;
++		m25p,fast-read;
++		reg = <0>;
++	};
++};
++
++&sata {
++	status = "okay";
++};
++
++&pfe {
++	status = "okay";
++	#address-cells = <1>;
++	#size-cells = <0>;
++
++	ethernet@0 {
++		compatible = "fsl,pfe-gemac-port";
++		#address-cells = <1>;
++		#size-cells = <0>;
++		reg = <0x0>;	/* GEM_ID */
++		fsl,gemac-bus-id = <0x0>;	/* BUS_ID */
++		fsl,gemac-phy-id = <0x1>;	/* PHY_ID */
++		fsl,mdio-mux-val = <0x0>;
++		phy-mode = "sgmii-2500";
++		fsl,pfe-phy-if-flags = <0x0>;
++
++		mdio@0 {
++			reg = <0x1>; /* enabled/disabled */
++		};
++	};
++
++	ethernet@1 {
++		compatible = "fsl,pfe-gemac-port";
++		#address-cells = <1>;
++		#size-cells = <0>;
++		reg = <0x1>;	/* GEM_ID */
++		fsl,gemac-bus-id = < 0x0>;	/* BUS_ID */
++		fsl,gemac-phy-id = < 0x2>;	/* PHY_ID */
++		fsl,mdio-mux-val = <0x0>;
++		phy-mode = "sgmii-2500";
++		fsl,pfe-phy-if-flags = <0x0>;
++
++		mdio@0 {
++			reg = <0x0>; /* enabled/disabled */
++		};
++	};
++};
+--- /dev/null
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
 @@ -0,0 +1,177 @@
 +/*
@@ -920,7 +1136,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +};
 --- /dev/null
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
-@@ -0,0 +1,198 @@
+@@ -0,0 +1,202 @@
 +/*
 + * Device Tree file for Freescale LS1012A QDS Board.
 + *
@@ -1021,6 +1237,10 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +	};
 +};
 +
++&pcie {
++	status = "okay";
++};
++
 +&duart0 {
 +	status = "okay";
 +};
@@ -1121,7 +1341,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +};
 --- /dev/null
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
-@@ -0,0 +1,134 @@
+@@ -0,0 +1,138 @@
 +/*
 + * Device Tree file for Freescale LS1012A RDB Board.
 + *
@@ -1179,6 +1399,10 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +	};
 +};
 +
++&pcie {
++	status = "okay";
++};
++
 +&duart0 {
 +	status = "okay";
 +};
@@ -1258,7 +1482,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +};
 --- /dev/null
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
-@@ -0,0 +1,594 @@
+@@ -0,0 +1,602 @@
 +/*
 + * Device Tree Include file for Freescale Layerscape-1012A family SoC.
 + *
@@ -1641,7 +1865,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +			#size-cells = <0>;
 +			reg = <0x0 0x2180000 0x0 0x10000>;
 +			interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&clockgen 4 0>;
++			clocks = <&clockgen 4 3>;
 +			status = "disabled";
 +		};
 +
@@ -1651,7 +1875,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +			#size-cells = <0>;
 +			reg = <0x0 0x2190000 0x0 0x10000>;
 +			interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&clockgen 4 0>;
++			clocks = <&clockgen 4 3>;
 +			status = "disabled";
 +		};
 +
@@ -1794,7 +2018,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +			interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>;
 +		};
 +
-+		pcie@3400000 {
++		pcie: pcie@3400000 {
 +			compatible = "fsl,ls1012a-pcie", "snps,dw-pcie";
 +			reg = <0x00 0x03400000 0x0 0x00100000   /* controller registers */
 +			       0x40 0x00000000 0x0 0x00002000>; /* configuration space */
@@ -1816,6 +2040,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +					<0000 0 0 2 &gic 0 111 IRQ_TYPE_LEVEL_HIGH>,
 +					<0000 0 0 3 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>,
 +					<0000 0 0 4 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
++			status = "disabled";
 +		};
 +	};
 +
@@ -1852,6 +2077,13 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +		pfe_mac1: ethernet@1 {
 +		};
 +	};
++
++	firmware {
++		optee {
++			compatible = "linaro,optee-tz";
++			method = "smc";
++		};
++	};
 +};
 --- /dev/null
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi
@@ -3006,9 +3238,16 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  			#interrupt-cells = <1>;
  			interrupt-map-mask = <0 0 0 7>;
  			interrupt-map = <0000 0 0 1 &gic 0 154 0x4>,
-@@ -608,3 +869,6 @@
+@@ -607,4 +868,13 @@
+ 		};
  	};
  
++	firmware {
++		optee {
++			compatible = "linaro,optee-tz";
++			method = "smc";
++		};
++	};
  };
 +
 +#include "qoriq-qman1-portals.dtsi"
@@ -3066,7 +3305,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +};
 --- /dev/null
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts
-@@ -0,0 +1,109 @@
+@@ -0,0 +1,110 @@
 +/*
 + * Device Tree Include file for Freescale Layerscape-1046A family SoC.
 + *
@@ -3137,6 +3376,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +	ethernet@9 {
 +		compatible = "fsl,dpa-ethernet";
 +		fsl,fman-mac = <&enet7>;
++		dma-coherent;
 +	};
 +};
 +
@@ -3544,7 +3784,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +};
 --- /dev/null
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts
-@@ -0,0 +1,76 @@
+@@ -0,0 +1,83 @@
 +/*
 + * Device Tree Include file for Freescale Layerscape-1046A family SoC.
 + *
@@ -3612,9 +3852,16 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +};
 +
 +&fsldpaa {
++	ethernet@0 {
++		status = "disabled";
++	};
++	ethernet@1 {
++		status = "disabled";
++	};
 +	ethernet@9 {
 +		compatible = "fsl,dpa-ethernet";
 +		fsl,fman-mac = <&enet7>;
++		dma-coherent;
 +	};
 +};
 +
@@ -3957,7 +4204,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +};
 --- /dev/null
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
-@@ -0,0 +1,793 @@
+@@ -0,0 +1,800 @@
 +/*
 + * Device Tree Include file for Freescale Layerscape-1046A family SoC.
 + *
@@ -4747,6 +4994,13 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +			no-map;
 +		};
 +	};
++
++	firmware {
++		optee {
++			compatible = "linaro,optee-tz";
++			method = "smc";
++		};
++	};
 +};
 +
 +#include "qoriq-qman1-portals.dtsi"
@@ -5168,7 +5422,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +};
 --- /dev/null
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
-@@ -0,0 +1,818 @@
+@@ -0,0 +1,825 @@
 +/*
 + * Device Tree Include file for NXP Layerscape-1088A family SoC.
 + *
@@ -5694,7 +5948,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +			#size-cells = <0>;
 +			reg = <0x0 0x2000000 0x0 0x10000>;
 +			interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&clockgen 4 3>;
++			clocks = <&clockgen 4 7>;
 +			status = "disabled";
 +		};
 +
@@ -5704,7 +5958,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +			#size-cells = <0>;
 +			reg = <0x0 0x2010000 0x0 0x10000>;
 +			interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&clockgen 4 3>;
++			clocks = <&clockgen 4 7>;
 +			status = "disabled";
 +		};
 +
@@ -5714,7 +5968,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +			#size-cells = <0>;
 +			reg = <0x0 0x2020000 0x0 0x10000>;
 +			interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&clockgen 4 3>;
++			clocks = <&clockgen 4 7>;
 +			status = "disabled";
 +		};
 +
@@ -5724,7 +5978,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +			#size-cells = <0>;
 +			reg = <0x0 0x2030000 0x0 0x10000>;
 +			interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
-+			clocks = <&clockgen 4 3>;
++			clocks = <&clockgen 4 7>;
 +			status = "disabled";
 +		};
 +
@@ -5986,6 +6240,13 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +		};
 +	};
 +
++	firmware {
++		optee {
++			compatible = "linaro,optee-tz";
++			method = "smc";
++		};
++	};
++
 +};
 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
@@ -8332,7 +8593,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +};
 --- /dev/null
 +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
-@@ -0,0 +1,912 @@
+@@ -0,0 +1,919 @@
 +/*
 + * Device Tree Include file for Freescale Layerscape-2080A family SoC.
 + *
@@ -9024,7 +9285,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +			reg = <0x0 0x2000000 0x0 0x10000>;
 +			interrupts = <0 34 0x4>; /* Level high type */
 +			clock-names = "i2c";
-+			clocks = <&clockgen 4 3>;
++			clocks = <&clockgen 4 1>;
 +		};
 +
 +		i2c1: i2c@2010000 {
@@ -9035,7 +9296,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +			reg = <0x0 0x2010000 0x0 0x10000>;
 +			interrupts = <0 34 0x4>; /* Level high type */
 +			clock-names = "i2c";
-+			clocks = <&clockgen 4 3>;
++			clocks = <&clockgen 4 1>;
 +		};
 +
 +		i2c2: i2c@2020000 {
@@ -9046,7 +9307,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +			reg = <0x0 0x2020000 0x0 0x10000>;
 +			interrupts = <0 35 0x4>; /* Level high type */
 +			clock-names = "i2c";
-+			clocks = <&clockgen 4 3>;
++			clocks = <&clockgen 4 1>;
 +		};
 +
 +		i2c3: i2c@2030000 {
@@ -9057,7 +9318,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +			reg = <0x0 0x2030000 0x0 0x10000>;
 +			interrupts = <0 35 0x4>; /* Level high type */
 +			clock-names = "i2c";
-+			clocks = <&clockgen 4 3>;
++			clocks = <&clockgen 4 1>;
 +		};
 +
 +		ifc: ifc@2240000 {
@@ -9244,6 +9505,13 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +		interrupts = <0 18 0x4>;
 +		little-endian;
 +	};
++
++	firmware {
++		optee {
++			compatible = "linaro,optee-tz";
++			method = "smc";
++		};
++	};
 +};
 --- /dev/null
 +++ b/arch/arm64/boot/dts/freescale/qoriq-bman1-portals.dtsi
@@ -9331,7 +9599,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +};
 --- /dev/null
 +++ b/arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi
-@@ -0,0 +1,66 @@
+@@ -0,0 +1,73 @@
 +/*
 + * QorIQ FMan v3 10g port #1 device tree stub [ controller @ offset 0x400000 ]
 + *
@@ -9371,30 +9639,37 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +	ethernet@0 {
 +		compatible = "fsl,dpa-ethernet";
 +		fsl,fman-mac = <&enet0>;
++		dma-coherent;
 +	};
 +	ethernet@1 {
 +		compatible = "fsl,dpa-ethernet";
 +		fsl,fman-mac = <&enet1>;
++		dma-coherent;
 +	};
 +	ethernet@2 {
 +		compatible = "fsl,dpa-ethernet";
 +		fsl,fman-mac = <&enet2>;
++		dma-coherent;
 +	};
 +	ethernet@3 {
 +		compatible = "fsl,dpa-ethernet";
 +		fsl,fman-mac = <&enet3>;
++		dma-coherent;
 +	};
 +	ethernet@4 {
 +		compatible = "fsl,dpa-ethernet";
 +		fsl,fman-mac = <&enet4>;
++		dma-coherent;
 +	};
 +	ethernet@5 {
 +		compatible = "fsl,dpa-ethernet";
 +		fsl,fman-mac = <&enet5>;
++		dma-coherent;
 +	};
 +	ethernet@8 {
 +		compatible = "fsl,dpa-ethernet";
 +		fsl,fman-mac = <&enet6>;
++		dma-coherent;
 +	};
 +};
 +

target/linux/layerscape/patches-4.9/303-arm-imx-select-ARCH_DMA_ADDR_T_64BIT-for-LPAE.patch

@@ -1,23 +0,0 @@
-From c079739fa1101dcf7a1e40a195e019065e327d15 Mon Sep 17 00:00:00 2001
-From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Fri, 20 Oct 2017 16:45:17 +0800
-Subject: [PATCH] arm: imx: select ARCH_DMA_ADDR_T_64BIT for LPAE
-
-Selected ARCH_DMA_ADDR_T_64BIT for LPAE since
-hardware could support it.
-
-Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
----
- arch/arm/mach-imx/Kconfig | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm/mach-imx/Kconfig
-+++ b/arch/arm/mach-imx/Kconfig
-@@ -1,6 +1,7 @@
- menuconfig ARCH_MXC
- 	bool "Freescale i.MX family"
- 	depends on ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7 || ARM_SINGLE_ARMV7M
-+	select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
- 	select ARCH_SUPPORTS_BIG_ENDIAN
- 	select CLKSRC_IMX_GPT
- 	select GENERIC_IRQ_CHIP

target/linux/layerscape/patches-4.9/401-mtd-spi-nor-support-layerscape.patch

@@ -1,9 +1,9 @@
-From a3757157751a8a5302ee5e11faf828dc5db02018 Mon Sep 17 00:00:00 2001
+From 825d57369b196b64387348922b47adc5b651622c Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Mon, 25 Sep 2017 10:53:50 +0800
+Date: Wed, 17 Jan 2018 14:55:47 +0800
-Subject: [PATCH] mtd: spi-nor: support layerscape
+Subject: [PATCH 05/30] mtd: spi-nor: support layerscape
 
-This is a integrated patch for layerscape qspi support.
+This is an integrated patch for layerscape qspi support.
 
 Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
 Signed-off-by: Yunhui Cui <B56489@freescale.com>

target/linux/layerscape/patches-4.9/402-mtd-support-layerscape.patch

@@ -1,9 +1,9 @@
-From c0e4767d3b26f21e5043fe2d15a24a1958de766e Mon Sep 17 00:00:00 2001
+From d9d0181f74146507026c31cccd52dda27ec3d966 Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Mon, 25 Sep 2017 10:17:28 +0800
+Date: Wed, 17 Jan 2018 14:57:31 +0800
-Subject: [PATCH] mtd: support layerscape
+Subject: [PATCH 06/30] mtd: support layerscape
 
-This is a integrated patch for layerscape ifc-nor-nand support.
+This is an integrated patch for layerscape ifc-nor-nand support.
 
 Signed-off-by: Alison Wang <b18965@freescale.com>
 Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

target/linux/layerscape/patches-4.9/701-sdk_dpaa-support-layerscape.patch

@@ -1,29 +1,30 @@
-From 3cd36deb674720ab34eabb9783648ed743e52121 Mon Sep 17 00:00:00 2001
+From 2f887ade916e7e1de2f8a84d3902aaa30af4b163 Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Mon, 25 Sep 2017 11:58:03 +0800
+Date: Wed, 17 Jan 2018 14:59:15 +0800
-Subject: [PATCH] sdk_dpaa: support layerscape
+Subject: [PATCH 07/30] sdk_dpaa: support layerscape
 
-This is a integrated patch for layerscape dpaa1-sdk support.
+This is an integrated patch for layerscape dpaa1-sdk support.
 
 Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
 Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
 Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
 Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
+Signed-off-by: Mathew McBride <matt@traverse.com.au>
 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 ---
- drivers/net/ethernet/freescale/sdk_dpaa/Kconfig    |  173 +
+ drivers/net/ethernet/freescale/sdk_dpaa/Kconfig    |  196 +
  drivers/net/ethernet/freescale/sdk_dpaa/Makefile   |   46 +
  .../net/ethernet/freescale/sdk_dpaa/dpaa_1588.c    |  580 ++
  .../net/ethernet/freescale/sdk_dpaa/dpaa_1588.h    |  138 +
  .../net/ethernet/freescale/sdk_dpaa/dpaa_debugfs.c |  180 +
  .../net/ethernet/freescale/sdk_dpaa/dpaa_debugfs.h |   43 +
- drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth.c | 1213 ++++
+ drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth.c | 1224 ++++
  drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth.h |  687 ++
  .../ethernet/freescale/sdk_dpaa/dpaa_eth_base.c    |  205 +
  .../ethernet/freescale/sdk_dpaa/dpaa_eth_base.h    |   49 +
- .../ethernet/freescale/sdk_dpaa/dpaa_eth_ceetm.c   | 1992 +++++
+ .../ethernet/freescale/sdk_dpaa/dpaa_eth_ceetm.c   | 2013 ++++++
- .../ethernet/freescale/sdk_dpaa/dpaa_eth_ceetm.h   |  237 +
+ .../ethernet/freescale/sdk_dpaa/dpaa_eth_ceetm.h   |  238 +
- .../ethernet/freescale/sdk_dpaa/dpaa_eth_common.c  | 1820 +++++
+ .../ethernet/freescale/sdk_dpaa/dpaa_eth_common.c  | 1802 +++++
  .../ethernet/freescale/sdk_dpaa/dpaa_eth_common.h  |  225 +
  .../ethernet/freescale/sdk_dpaa/dpaa_eth_proxy.c   |  381 +
  .../net/ethernet/freescale/sdk_dpaa/dpaa_eth_sg.c  | 1168 +++
@@ -241,14 +242,14 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  drivers/staging/fsl_qbman/dpa_sys_arm64.h          |  102 +
  drivers/staging/fsl_qbman/dpa_sys_ppc32.h          |   70 +
  drivers/staging/fsl_qbman/dpa_sys_ppc64.h          |   79 +
- drivers/staging/fsl_qbman/fsl_usdpaa.c             | 1983 +++++
+ drivers/staging/fsl_qbman/fsl_usdpaa.c             | 2007 ++++++
  drivers/staging/fsl_qbman/fsl_usdpaa_irq.c         |  289 +
  drivers/staging/fsl_qbman/qbman_driver.c           |   88 +
  drivers/staging/fsl_qbman/qman_config.c            | 1224 ++++
  drivers/staging/fsl_qbman/qman_debugfs.c           | 1594 ++++
  drivers/staging/fsl_qbman/qman_driver.c            |  977 +++
  drivers/staging/fsl_qbman/qman_high.c              | 5669 +++++++++++++++
- drivers/staging/fsl_qbman/qman_low.h               | 1427 ++++
+ drivers/staging/fsl_qbman/qman_low.h               | 1442 ++++
  drivers/staging/fsl_qbman/qman_private.h           |  398 +
  drivers/staging/fsl_qbman/qman_test.c              |   57 +
  drivers/staging/fsl_qbman/qman_test.h              |   45 +
@@ -268,7 +269,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  .../linux/fmd/integrations/integration_ioctls.h    |   56 +
  include/uapi/linux/fmd/ioctls.h                    |   96 +
  include/uapi/linux/fmd/net_ioctls.h                |  430 ++
- 257 files changed, 153159 insertions(+)
+ 257 files changed, 153236 insertions(+)
  create mode 100644 drivers/net/ethernet/freescale/sdk_dpaa/Kconfig
  create mode 100644 drivers/net/ethernet/freescale/sdk_dpaa/Makefile
  create mode 100644 drivers/net/ethernet/freescale/sdk_dpaa/dpaa_1588.c
@@ -529,7 +530,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 
 --- /dev/null
 +++ b/drivers/net/ethernet/freescale/sdk_dpaa/Kconfig
-@@ -0,0 +1,173 @@
+@@ -0,0 +1,196 @@
 +menuconfig FSL_SDK_DPAA_ETH
 +	tristate "DPAA Ethernet"
 +	depends on (FSL_SOC || ARM64 || ARM) && FSL_SDK_BMAN && FSL_SDK_QMAN && FSL_SDK_FMAN && !FSL_DPAA_ETH
@@ -552,6 +553,29 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +	help
 +	Enable QoS offloading support through the CEETM hardware block.
 +
++config FSL_DPAA_CEETM_CCS_THRESHOLD_1G
++	hex "CEETM egress congestion threshold on 1G ports"
++	depends on FSL_DPAA_CEETM
++	range 0x1000 0x10000000
++	default "0x000a0000"
++	help
++	  The size in bytes of the CEETM egress Class Congestion State threshold on 1G ports.
++	  The threshold needs to be configured keeping in mind the following factors:
++	       - A threshold too large will buffer frames for a long time in the TX queues,
++	       when a small shaping rate is configured. This will cause buffer pool depletion
++	       or out of memory errors. This in turn will cause frame loss on RX;
++	       - A threshold too small will cause unnecessary frame loss by entering
++	       congestion too often.
++
++config FSL_DPAA_CEETM_CCS_THRESHOLD_10G
++	hex "CEETM egress congestion threshold on 10G ports"
++	depends on FSL_DPAA_CEETM
++	range 0x1000 0x20000000
++	default "0x00640000"
++	help
++	  The size in bytes of the CEETM egress Class Congestion State threshold on 10G ports.
++	  See FSL_DPAA_CEETM_CCS_THRESHOLD_1G for details.
++
 +config FSL_DPAA_OFFLINE_PORTS
 +	bool "Offline Ports support"
 +	depends on FSL_SDK_DPAA_ETH
@@ -1707,7 +1731,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +#endif /* DPAA_DEBUGFS_H_ */
 --- /dev/null
 +++ b/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth.c
-@@ -0,0 +1,1213 @@
+@@ -0,0 +1,1224 @@
 +/* Copyright 2008-2013 Freescale Semiconductor Inc.
 + *
 + * Redistribution and use in source and binary forms, with or without
@@ -2485,6 +2509,17 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +	/* Advertise NETIF_F_HW_ACCEL_MQ to avoid Tx timeout warnings */
 +	net_dev->features |= NETIF_F_HW_ACCEL_MQ;
 +
++#ifndef CONFIG_PPC
++	/* Due to the A010022 FMan errata, we can not use contig frames larger
++	 * than 4K, nor S/G frames. We need to stop advertising S/G and GSO
++	 * support.
++	 */
++	if (unlikely(dpaa_errata_a010022)) {
++		net_dev->hw_features &= ~NETIF_F_SG;
++		net_dev->features &= ~NETIF_F_GSO;
++	}
++#endif
++
 +	return dpa_netdev_init(net_dev, mac_addr, tx_timeout);
 +}
 +
@@ -2573,7 +2608,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +
 +	for (i = 0; i < count; i++) {
 +		int err;
-+		err = dpa_bp_alloc(&dpa_bp[i]);
++		err = dpa_bp_alloc(&dpa_bp[i], net_dev->dev.parent);
 +		if (err < 0) {
 +			dpa_bp_free(priv);
 +			priv->dpa_bp = NULL;
@@ -3792,7 +3827,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +
 +	for (i = 0; i < count; i++) {
 +		int err;
-+		err = dpa_bp_alloc(&dpa_bp[i]);
++		err = dpa_bp_alloc(&dpa_bp[i], net_dev->dev.parent);
 +		if (err < 0) {
 +			dpa_bp_free(priv);
 +			priv->dpa_bp = NULL;
@@ -3873,7 +3908,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +#endif /* __DPAA_ETH_BASE_H */
 --- /dev/null
 +++ b/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_ceetm.c
-@@ -0,0 +1,1992 @@
+@@ -0,0 +1,2013 @@
 +/* Copyright 2008-2016 Freescale Semiconductor Inc.
 + *
 + * Redistribution and use in source and binary forms, with or without
@@ -3945,24 +3980,27 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +static void ceetm_ern(struct qman_portal *portal, struct qman_fq *fq,
 +		      const struct qm_mr_entry *msg)
 +{
-+	struct net_device *net_dev;
++	struct dpa_percpu_priv_s *dpa_percpu_priv;
-+	struct ceetm_class *cls;
 +	struct ceetm_class_stats *cstats = NULL;
 +	const struct dpa_priv_s *dpa_priv;
-+	struct dpa_percpu_priv_s *dpa_percpu_priv;
-+	struct sk_buff *skb;
 +	struct qm_fd fd = msg->ern.fd;
++	struct net_device *net_dev;
++	struct ceetm_fq *ceetm_fq;
++	struct ceetm_class *cls;
++	struct sk_buff *skb;
 +
-+	net_dev = ((struct ceetm_fq *)fq)->net_dev;
++	ceetm_fq = container_of(fq, struct ceetm_fq, fq);
++	net_dev = ceetm_fq->net_dev;
 +	dpa_priv = netdev_priv(net_dev);
 +	dpa_percpu_priv = raw_cpu_ptr(dpa_priv->percpu_priv);
 +
 +	/* Increment DPA counters */
 +	dpa_percpu_priv->stats.tx_dropped++;
 +	dpa_percpu_priv->stats.tx_fifo_errors++;
++	count_ern(dpa_percpu_priv, msg);
 +
 +	/* Increment CEETM counters */
-+	cls = ((struct ceetm_fq *)fq)->ceetm_cls;
++	cls = ceetm_fq->ceetm_cls;
 +	switch (cls->type) {
 +	case CEETM_PRIO:
 +		cstats = this_cpu_ptr(cls->prio.cstats);
@@ -3975,11 +4013,15 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +	if (cstats)
 +		cstats->ern_drop_count++;
 +
++	/* Release the buffers that were supposed to be recycled. */
 +	if (fd.bpid != 0xff) {
 +		dpa_fd_release(net_dev, &fd);
 +		return;
 +	}
 +
++	/* Release the frames that were supposed to return on the
++	 * confirmation path.
++	 */
 +	skb = _dpa_cleanup_tx_fd(dpa_priv, &fd);
 +	dev_kfree_skb_any(skb);
 +}
@@ -4001,16 +4043,16 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +		break;
 +	}
 +
++	ceetm_fq->congested = congested;
++
 +	if (congested) {
 +		dpa_priv->cgr_data.congestion_start_jiffies = jiffies;
-+		netif_tx_stop_all_queues(dpa_priv->net_dev);
 +		dpa_priv->cgr_data.cgr_congested_count++;
 +		if (cstats)
 +			cstats->congested_count++;
 +	} else {
 +		dpa_priv->cgr_data.congested_jiffies +=
 +			(jiffies - dpa_priv->cgr_data.congestion_start_jiffies);
-+		netif_tx_wake_all_queues(dpa_priv->net_dev);
 +	}
 +}
 +
@@ -4024,6 +4066,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +
 +	(*fq)->net_dev = dev;
 +	(*fq)->ceetm_cls = cls;
++	(*fq)->congested = 0;
 +	return 0;
 +}
 +
@@ -4061,9 +4104,9 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +
 +	/* Set the congestion state thresholds according to the link speed */
 +	if (dpa_priv->mac_dev->if_support & SUPPORTED_10000baseT_Full)
-+		cs_th = CONFIG_FSL_DPAA_CS_THRESHOLD_10G;
++		cs_th = CONFIG_FSL_DPAA_CEETM_CCS_THRESHOLD_10G;
 +	else
-+		cs_th = CONFIG_FSL_DPAA_CS_THRESHOLD_1G;
++		cs_th = CONFIG_FSL_DPAA_CEETM_CCS_THRESHOLD_1G;
 +
 +	qm_cgr_cs_thres_set64(&ccg_params.cs_thres_in, cs_th, 1);
 +	qm_cgr_cs_thres_set64(&ccg_params.cs_thres_out,
@@ -5784,17 +5827,22 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +
 +int __hot ceetm_tx(struct sk_buff *skb, struct net_device *net_dev)
 +{
-+	int ret;
-+	bool act_drop = false;
-+	struct Qdisc *sch = net_dev->qdisc;
-+	struct ceetm_class *cl;
-+	struct dpa_priv_s *priv_dpa;
-+	struct qman_fq *egress_fq, *conf_fq;
-+	struct ceetm_qdisc *priv = qdisc_priv(sch);
-+	struct ceetm_qdisc_stats *qstats = this_cpu_ptr(priv->root.qstats);
-+	struct ceetm_class_stats *cstats;
 +	const int queue_mapping = dpa_get_queue_mapping(skb);
-+	spinlock_t *root_lock = qdisc_lock(sch);
++	struct Qdisc *sch = net_dev->qdisc;
++	struct ceetm_class_stats *cstats;
++	struct ceetm_qdisc_stats *qstats;
++	struct dpa_priv_s *priv_dpa;
++	struct ceetm_fq *ceetm_fq;
++	struct ceetm_qdisc *priv;
++	struct qman_fq *conf_fq;
++	struct ceetm_class *cl;
++	spinlock_t *root_lock;
++	bool act_drop = false;
++	int ret;
++
++	root_lock = qdisc_lock(sch);
++	priv = qdisc_priv(sch);
++	qstats = this_cpu_ptr(priv->root.qstats);
 +
 +	spin_lock(root_lock);
 +	cl = ceetm_classify(skb, sch, &ret, &act_drop);
@@ -5821,11 +5869,11 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +	 */
 +	switch (cl->type) {
 +	case CEETM_PRIO:
-+		egress_fq = &cl->prio.fq->fq;
++		ceetm_fq = cl->prio.fq;
 +		cstats = this_cpu_ptr(cl->prio.cstats);
 +		break;
 +	case CEETM_WBFS:
-+		egress_fq = &cl->wbfs.fq->fq;
++		ceetm_fq = cl->wbfs.fq;
 +		cstats = this_cpu_ptr(cl->wbfs.cstats);
 +		break;
 +	default:
@@ -5833,8 +5881,16 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +		goto drop;
 +	}
 +
++	/* If the FQ is congested, avoid enqueuing the frame and dropping it
++	 * when it returns on the ERN path. Drop it here directly instead.
++	 */
++	if (unlikely(ceetm_fq->congested)) {
++		qstats->drops++;
++		goto drop;
++	}
++
 +	bstats_update(&cstats->bstats, skb);
-+	return dpa_tx_extended(skb, net_dev, egress_fq, conf_fq);
++	return dpa_tx_extended(skb, net_dev, &ceetm_fq->fq, conf_fq);
 +
 +drop:
 +	dev_kfree_skb_any(skb);
@@ -5868,7 +5924,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +module_exit(ceetm_unregister);
 --- /dev/null
 +++ b/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_ceetm.h
-@@ -0,0 +1,237 @@
+@@ -0,0 +1,238 @@
 +/* Copyright 2008-2016 Freescale Semiconductor Inc.
 + *
 + * Redistribution and use in source and binary forms, with or without
@@ -5976,6 +6032,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +	struct qman_fq fq;
 +	struct net_device *net_dev;
 +	struct ceetm_class *ceetm_cls;
++	int congested; /* Congestion status */
 +};
 +
 +struct root_q {
@@ -6108,7 +6165,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +#endif
 --- /dev/null
 +++ b/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_common.c
-@@ -0,0 +1,1820 @@
+@@ -0,0 +1,1802 @@
 +/* Copyright 2008-2013 Freescale Semiconductor, Inc.
 + *
 + * Redistribution and use in source and binary forms, with or without
@@ -6350,8 +6407,8 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 + * Calculates the statistics for the given device by adding the statistics
 + * collected by each CPU.
 + */
-+void __cold
++struct rtnl_link_stats64 __cold
-+dpa_get_stats64(struct net_device *net_dev,
++*dpa_get_stats64(struct net_device *net_dev,
 +		struct rtnl_link_stats64 *stats)
 +{
 +	struct dpa_priv_s *priv = netdev_priv(net_dev);
@@ -6369,6 +6426,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +		for (j = 0; j < numstats; j++)
 +			netstats[j] += cpustats[j];
 +	}
++	return stats;
 +}
 +EXPORT_SYMBOL(dpa_get_stats64);
 +
@@ -6580,14 +6638,18 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +#ifdef CONFIG_FSL_DPAA_1588
 +	struct dpa_priv_s *priv = netdev_priv(dev);
 +#endif
-+	int ret = 0;
++	int ret = -EINVAL;
 +
-+	/* at least one timestamping feature must be enabled */
-+#ifdef CONFIG_FSL_DPAA_TS
 +	if (!netif_running(dev))
-+#endif
 +		return -EINVAL;
 +
++	if (cmd == SIOCGMIIREG) {
++		if (!dev->phydev)
++			ret = -EINVAL;
++		else
++			ret = phy_mii_ioctl(dev->phydev, rq, cmd);
++	}
++
 +#ifdef CONFIG_FSL_DPAA_TS
 +	if (cmd == SIOCSHWTSTAMP)
 +		return dpa_ts_ioctl(dev, rq, cmd);
@@ -6822,11 +6884,10 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +EXPORT_SYMBOL(dpa_set_buffers_layout);
 +
 +int __attribute__((nonnull))
-+dpa_bp_alloc(struct dpa_bp *dpa_bp)
++dpa_bp_alloc(struct dpa_bp *dpa_bp, struct device *dev)
 +{
 +	int err;
 +	struct bman_pool_params	 bp_params;
-+	struct platform_device *pdev;
 +
 +	if (dpa_bp->size == 0 || dpa_bp->config_count == 0) {
 +		pr_err("Buffer pool is not properly initialized! Missing size or initial number of buffers");
@@ -6859,44 +6920,25 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +
 +	dpa_bp->bpid = (uint8_t)bman_get_params(dpa_bp->pool)->bpid;
 +
-+	pdev = platform_device_register_simple("dpaa_eth_bpool",
++	err = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(40));
-+			dpa_bp->bpid, NULL, 0);
-+	if (IS_ERR(pdev)) {
-+		pr_err("platform_device_register_simple() failed\n");
-+		err = PTR_ERR(pdev);
-+		goto pdev_register_failed;
-+	}
-+	{
-+		struct dma_map_ops *ops = get_dma_ops(&pdev->dev);
-+		ops->dma_supported = NULL;
-+	}
-+	err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(40));
 +	if (err) {
 +		pr_err("dma_coerce_mask_and_coherent() failed\n");
-+		goto pdev_mask_failed;
++		goto bman_free_pool;
 +	}
-+#ifdef CONFIG_FMAN_ARM
-+	/* force coherency */
-+	pdev->dev.archdata.dma_coherent = true;
-+	arch_setup_dma_ops(&pdev->dev, 0, 0, NULL, true);
-+#endif
 +
-+	dpa_bp->dev = &pdev->dev;
++	dpa_bp->dev = dev;
 +
 +	if (dpa_bp->seed_cb) {
 +		err = dpa_bp->seed_cb(dpa_bp);
 +		if (err)
-+			goto pool_seed_failed;
++			goto bman_free_pool;
 +	}
 +
 +	dpa_bpid2pool_map(dpa_bp->bpid, dpa_bp);
 +
 +	return 0;
 +
-+pool_seed_failed:
++bman_free_pool:
-+pdev_mask_failed:
-+	platform_device_unregister(pdev);
-+pdev_register_failed:
 +	bman_free_pool(dpa_bp->pool);
 +
 +	return err;
@@ -6958,9 +7000,6 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +
 +	dpa_bp_array[bp->bpid] = NULL;
 +	bman_free_pool(bp->pool);
-+
-+	if (bp->dev)
-+		platform_device_unregister(to_platform_device(bp->dev));
 +}
 +
 +void __cold __attribute__((nonnull))
@@ -8074,8 +8113,8 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +int __cold dpa_start(struct net_device *net_dev);
 +int __cold dpa_stop(struct net_device *net_dev);
 +void __cold dpa_timeout(struct net_device *net_dev);
-+void __cold
++struct rtnl_link_stats64 __cold
-+dpa_get_stats64(struct net_device *net_dev,
++*dpa_get_stats64(struct net_device *net_dev,
 +		struct rtnl_link_stats64 *stats);
 +int dpa_change_mtu(struct net_device *net_dev, int new_mtu);
 +int dpa_ndo_init(struct net_device *net_dev);
@@ -8098,7 +8137,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +void dpa_set_buffers_layout(struct mac_device *mac_dev,
 +		struct dpa_buffer_layout_s *layout);
 +int __attribute__((nonnull))
-+dpa_bp_alloc(struct dpa_bp *dpa_bp);
++dpa_bp_alloc(struct dpa_bp *dpa_bp, struct device *dev);
 +void __cold __attribute__((nonnull))
 +dpa_bp_free(struct dpa_priv_s *priv);
 +struct dpa_bp *dpa_bpid2pool(int bpid);
@@ -11972,7 +12011,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +	[PHY_INTERFACE_MODE_RGMII_TXID]	= "rgmii-txid",
 +	[PHY_INTERFACE_MODE_RTBI]	= "rtbi",
 +	[PHY_INTERFACE_MODE_XGMII]	= "xgmii",
-+	[PHY_INTERFACE_MODE_SGMII_2500] = "sgmii-2500",
++	[PHY_INTERFACE_MODE_2500SGMII] = "sgmii-2500",
 +};
 +
 +static phy_interface_t __pure __attribute__((nonnull)) str2phy(const char *str)
@@ -11999,7 +12038,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +	[PHY_INTERFACE_MODE_RGMII_TXID]	= SPEED_1000,
 +	[PHY_INTERFACE_MODE_RTBI]	= SPEED_1000,
 +	[PHY_INTERFACE_MODE_XGMII]	= SPEED_10000,
-+	[PHY_INTERFACE_MODE_SGMII_2500] = SPEED_2500,
++	[PHY_INTERFACE_MODE_2500SGMII] = SPEED_2500,
 +};
 +
 +static struct mac_device * __cold
@@ -129503,7 +129542,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +#endif
 --- /dev/null
 +++ b/drivers/staging/fsl_qbman/fsl_usdpaa.c
-@@ -0,0 +1,1983 @@
+@@ -0,0 +1,2007 @@
 +/* Copyright (C) 2008-2012 Freescale Semiconductor, Inc.
 + * Authors: Andy Fleming <afleming@freescale.com>
 + *	    Timur Tabi <timur@freescale.com>
@@ -129877,6 +129916,16 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +
 +#define DQRR_MAXFILL 15
 +
++
++/* Invalidate a portal */
++void dbci_portal(void *addr)
++{
++	int i;
++
++	for (i = 0; i < 0x4000; i += 64)
++		dcbi(addr + i);
++}
++
 +/* Reset a QMan portal to its default state */
 +static int init_qm_portal(struct qm_portal_config *config,
 +			  struct qm_portal *portal)
@@ -129890,6 +129939,13 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +	/* Make sure interrupts are inhibited */
 +	qm_out(IIR, 1);
 +
++	/*
++	 * Invalidate the entire CE portal are to ensure no stale
++	 * cachelines are present.  This should be done on all
++	 * cores as the portal is mapped as M=0 (non-coherent).
++	 */
++	on_each_cpu(dbci_portal, portal->addr.addr_ce, 1);
++
 +	/* Initialize the DQRR.  This will stop any dequeue
 +	   commands that are in progress */
 +	if (qm_dqrr_init(portal, config, qm_dqrr_dpush, qm_dqrr_pvb,
@@ -129941,6 +129997,13 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +	portal->addr.addr_ce = config->addr_virt[DPA_PORTAL_CE];
 +	portal->addr.addr_ci = config->addr_virt[DPA_PORTAL_CI];
 +
++	/*
++	 * Invalidate the entire CE portal are to ensure no stale
++	 * cachelines are present.  This should be done on all
++	 * cores as the portal is mapped as M=0 (non-coherent).
++	 */
++	on_each_cpu(dbci_portal, portal->addr.addr_ce, 1);
++
 +	if (bm_rcr_init(portal, bm_rcr_pvb, bm_rcr_cce)) {
 +		pr_err("Bman RCR initialisation failed\n");
 +	return 1;
@@ -141348,7 +141411,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +}
 --- /dev/null
 +++ b/drivers/staging/fsl_qbman/qman_low.h
-@@ -0,0 +1,1427 @@
+@@ -0,0 +1,1442 @@
 +/* Copyright 2008-2011 Freescale Semiconductor, Inc.
 + *
 + * Redistribution and use in source and binary forms, with or without
@@ -142446,11 +142509,26 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +
 +static inline int qm_mc_init(struct qm_portal *portal)
 +{
++	u8 rr0, rr1;
 +	register struct qm_mc *mc = &portal->mc;
++
 +	mc->cr = portal->addr.addr_ce + QM_CL_CR;
 +	mc->rr = portal->addr.addr_ce + QM_CL_RR0;
-+	mc->rridx = (__raw_readb(&mc->cr->__dont_write_directly__verb) &
++
-+			QM_MCC_VERB_VBIT) ?  0 : 1;
++	/*
++	 * The expected valid bit polarity for the next CR command is 0
++	 * if RR1 contains a valid response, and is 1 if RR0 contains a
++	 * valid response. If both RR contain all 0, this indicates either
++	 * that no command has been executed since reset (in which case the
++	 * expected valid bit polarity is 1)
++	 */
++	rr0 = __raw_readb(&mc->rr->verb);
++	rr1 = __raw_readb(&(mc->rr+1)->verb);
++	if ((rr0 == 0 && rr1 == 0) || rr0 != 0)
++		mc->rridx = 1;
++	else
++		mc->rridx = 0;
++
 +	mc->vbit = mc->rridx ? QM_MCC_VERB_VBIT : 0;
 +#ifdef CONFIG_FSL_DPA_CHECKING
 +	mc->state = qman_mc_idle;

target/linux/layerscape/patches-4.9/702-pci-support-layerscape.patch

@@ -1,9 +1,9 @@
-From 9e6e0a53b29190dbd86a39304b59c3028f5b36c2 Mon Sep 17 00:00:00 2001
+From 5fcb42fbd224e1103bacbae4785745842cfd6304 Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Mon, 25 Sep 2017 11:04:10 +0800
+Date: Wed, 17 Jan 2018 15:00:43 +0800
-Subject: [PATCH] pci: support layerscape
+Subject: [PATCH 08/30] pci: support layerscape
 
-This is a integrated patch for layerscape pcie support.
+This is an integrated patch for layerscape pcie support.
 
 Signed-off-by: Po Liu <po.liu@nxp.com>
 Signed-off-by: Liu Gang <Gang.Liu@nxp.com>
@@ -20,12 +20,14 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  drivers/pci/host/pci-layerscape-ep-debugfs.c | 758 +++++++++++++++++++++++++++
  drivers/pci/host/pci-layerscape-ep.c         | 309 +++++++++++
  drivers/pci/host/pci-layerscape-ep.h         | 115 ++++
- drivers/pci/host/pci-layerscape.c            |  38 +-
+ drivers/pci/host/pci-layerscape.c            |  48 +-
  drivers/pci/host/pcie-designware.c           |   6 +
  drivers/pci/host/pcie-designware.h           |   1 +
+ drivers/pci/pci.c                            |   2 +-
  drivers/pci/pcie/portdrv_core.c              | 181 +++----
+ drivers/pci/quirks.c                         |   8 +
  include/linux/pci.h                          |   1 +
- 10 files changed, 1520 insertions(+), 148 deletions(-)
+ 12 files changed, 1539 insertions(+), 149 deletions(-)
  create mode 100644 drivers/pci/host/pci-layerscape-ep-debugfs.c
  create mode 100644 drivers/pci/host/pci-layerscape-ep.c
  create mode 100644 drivers/pci/host/pci-layerscape-ep.h
@@ -1606,8 +1608,12 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +#endif /* _PCIE_LAYERSCAPE_EP_H */
 --- a/drivers/pci/host/pci-layerscape.c
 +++ b/drivers/pci/host/pci-layerscape.c
-@@ -35,12 +35,14 @@
+@@ -33,14 +33,18 @@
+ 
+ /* PEX Internal Configuration Registers */
  #define PCIE_STRFMR1		0x71c /* Symbol Timer & Filter Mask Register1 */
++#define PCIE_ABSERR		0x8d0 /* Bridge Slave Error Response Register */
++#define PCIE_ABSERR_SETTING	0x9401 /* Forward error of non-posted request */
  #define PCIE_DBI_RO_WR_EN	0x8bc /* DBI Read-Only Write Enable Register */
  
 -/* PEX LUT registers */
@@ -1623,7 +1629,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  	struct pcie_host_ops *ops;
  };
  
-@@ -86,6 +88,14 @@ static void ls_pcie_drop_msg_tlp(struct
+@@ -86,6 +90,14 @@ static void ls_pcie_drop_msg_tlp(struct
  	iowrite32(val, pcie->pp.dbi_base + PCIE_STRFMR1);
  }
  
@@ -1638,7 +1644,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  static int ls1021_pcie_link_up(struct pcie_port *pp)
  {
  	u32 state;
-@@ -134,7 +144,7 @@ static int ls_pcie_link_up(struct pcie_p
+@@ -134,7 +146,7 @@ static int ls_pcie_link_up(struct pcie_p
  	struct ls_pcie *pcie = to_ls_pcie(pp);
  	u32 state;
  
@@ -1647,17 +1653,31 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  		 pcie->drvdata->ltssm_shift) &
  		 LTSSM_STATE_MASK;
  
-@@ -153,6 +163,9 @@ static void ls_pcie_host_init(struct pci
+@@ -144,6 +156,12 @@ static int ls_pcie_link_up(struct pcie_p
+ 	return 1;
+ }
+ 
++/* Forward error response of outbound non-posted requests */
++static void ls_pcie_fix_error_response(struct ls_pcie *pcie)
++{
++	iowrite32(PCIE_ABSERR_SETTING, pcie->pp.dbi_base + PCIE_ABSERR);
++}
++
+ static void ls_pcie_host_init(struct pcie_port *pp)
+ {
+ 	struct ls_pcie *pcie = to_ls_pcie(pp);
+@@ -153,6 +171,10 @@ static void ls_pcie_host_init(struct pci
  	ls_pcie_clear_multifunction(pcie);
  	ls_pcie_drop_msg_tlp(pcie);
  	iowrite32(0, pcie->pp.dbi_base + PCIE_DBI_RO_WR_EN);
 +
 +	ls_pcie_disable_outbound_atus(pcie);
++	ls_pcie_fix_error_response(pcie);
 +	dw_pcie_setup_rc(pp);
  }
  
  static int ls_pcie_msi_host_init(struct pcie_port *pp,
-@@ -196,20 +209,39 @@ static struct ls_pcie_drvdata ls1021_drv
+@@ -196,20 +218,40 @@ static struct ls_pcie_drvdata ls1021_drv
  static struct ls_pcie_drvdata ls1043_drvdata = {
  	.lut_offset = 0x10000,
  	.ltssm_shift = 24,
@@ -1694,6 +1714,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  	{ .compatible = "fsl,ls2080a-pcie", .data = &ls2080_drvdata },
  	{ .compatible = "fsl,ls2085a-pcie", .data = &ls2080_drvdata },
 +	{ .compatible = "fsl,ls2088a-pcie", .data = &ls2088_drvdata },
++	{ .compatible = "fsl,ls1088a-pcie", .data = &ls2088_drvdata },
  	{ },
  };
  
@@ -1721,6 +1742,17 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +void dw_pcie_disable_outbound_atu(struct pcie_port *pp, int index);
  
  #endif /* _PCIE_DESIGNWARE_H */
+--- a/drivers/pci/pci.c
++++ b/drivers/pci/pci.c
+@@ -454,7 +454,7 @@ struct resource *pci_find_parent_resourc
+ 	pci_bus_for_each_resource(bus, r, i) {
+ 		if (!r)
+ 			continue;
+-		if (res->start && resource_contains(r, res)) {
++		if (resource_contains(r, res)) {
+ 
+ 			/*
+ 			 * If the window is prefetchable but the BAR is
 --- a/drivers/pci/pcie/portdrv_core.c
 +++ b/drivers/pci/pcie/portdrv_core.c
 @@ -44,52 +44,30 @@ static void release_pcie_device(struct d
@@ -2026,6 +2058,20 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  		driver->remove(pciedev);
  		put_device(dev);
  	}
+--- a/drivers/pci/quirks.c
++++ b/drivers/pci/quirks.c
+@@ -4642,3 +4642,11 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_IN
+ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2031, quirk_no_aersid);
+ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2032, quirk_no_aersid);
+ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2033, quirk_no_aersid);
++
++/* Freescale PCIe doesn't support MSI in RC mode */
++static void quirk_fsl_no_msi(struct pci_dev *pdev)
++{
++	if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT)
++		pdev->no_msi = 1;
++}
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, quirk_fsl_no_msi);
 --- a/include/linux/pci.h
 +++ b/include/linux/pci.h
 @@ -1823,6 +1823,7 @@ void pcibios_release_device(struct pci_d

target/linux/layerscape/patches-4.9/703-phy-support-layerscape.patch

@@ -1,9 +1,9 @@
-From be07319b9897738a4ab1501880b7dd9be26eba66 Mon Sep 17 00:00:00 2001
+From 8949ebc0c5b982eab7ca493dad7b86c30befa6ec Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Mon, 25 Sep 2017 11:54:28 +0800
+Date: Wed, 17 Jan 2018 15:01:30 +0800
-Subject: [PATCH] phy: support layerscape
+Subject: [PATCH 09/30] phy: support layerscape
 
-This is a integrated patch for layerscape mdio-phy support.
+This is an integrated patch for layerscape mdio-phy support.
 
 Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
 Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
@@ -18,11 +18,12 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  drivers/net/phy/aquantia.c      |   28 +
  drivers/net/phy/cortina.c       |  118 ++++
  drivers/net/phy/fsl_backplane.c | 1358 +++++++++++++++++++++++++++++++++++++++
+ drivers/net/phy/marvell.c       |    2 +-
  drivers/net/phy/phy.c           |   23 +-
  drivers/net/phy/phy_device.c    |    6 +-
  drivers/net/phy/swphy.c         |    1 +
- include/linux/phy.h             |    4 +
+ include/linux/phy.h             |    6 +
- 9 files changed, 1544 insertions(+), 7 deletions(-)
+ 10 files changed, 1547 insertions(+), 8 deletions(-)
  create mode 100644 drivers/net/phy/cortina.c
  create mode 100644 drivers/net/phy/fsl_backplane.c
 
@@ -1604,6 +1605,17 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +MODULE_DESCRIPTION("Freescale Backplane driver");
 +MODULE_AUTHOR("Shaohui Xie <Shaohui.Xie@freescale.com>");
 +MODULE_LICENSE("GPL v2");
+--- a/drivers/net/phy/marvell.c
++++ b/drivers/net/phy/marvell.c
+@@ -1610,7 +1610,7 @@ static struct phy_driver marvell_drivers
+ 		.flags = PHY_HAS_INTERRUPT,
+ 		.probe = marvell_probe,
+ 		.config_init = &m88e1145_config_init,
+-		.config_aneg = &marvell_config_aneg,
++		.config_aneg = &m88e1101_config_aneg,
+ 		.read_status = &genphy_read_status,
+ 		.ack_interrupt = &marvell_ack_interrupt,
+ 		.config_intr = &marvell_config_intr,
 --- a/drivers/net/phy/phy.c
 +++ b/drivers/net/phy/phy.c
 @@ -585,7 +585,7 @@ int phy_mii_ioctl(struct phy_device *phy
@@ -1737,11 +1749,20 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  	PHY_INTERFACE_MODE_MOCA,
  	PHY_INTERFACE_MODE_QSGMII,
  	PHY_INTERFACE_MODE_TRGMII,
-+	PHY_INTERFACE_MODE_SGMII_2500,
++	PHY_INTERFACE_MODE_2500SGMII,
  	PHY_INTERFACE_MODE_MAX,
  } phy_interface_t;
  
-@@ -791,6 +792,9 @@ int phy_stop_interrupts(struct phy_devic
+@@ -126,6 +127,8 @@ static inline const char *phy_modes(phy_
+ 		return "qsgmii";
+ 	case PHY_INTERFACE_MODE_TRGMII:
+ 		return "trgmii";
++	case PHY_INTERFACE_MODE_2500SGMII:
++		return "sgmii-2500";
+ 	default:
+ 		return "unknown";
+ 	}
+@@ -791,6 +794,9 @@ int phy_stop_interrupts(struct phy_devic
  
  static inline int phy_read_status(struct phy_device *phydev)
  {

target/linux/layerscape/patches-4.9/704-fsl-mc-layerscape-support.patch

@@ -1,12 +1,12 @@
-From afb7254de9f03c3efaf4e306dcf5f88e1873fc6b Mon Sep 17 00:00:00 2001
+From 667f0792b6f6d000c10f21c29c397c84cbe77f4a Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Mon, 25 Sep 2017 12:06:25 +0800
+Date: Wed, 17 Jan 2018 15:11:45 +0800
-Subject: [PATCH] fsl-mc: layerscape support
+Subject: [PATCH 10/30] fsl-mc: layerscape support
 MIME-Version: 1.0
 Content-Type: text/plain; charset=UTF-8
 Content-Transfer-Encoding: 8bit
 
-This is a integrated patch for layerscape mc-bus support.
+This is an integrated patch for layerscape mc-bus support.
 
 Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
 Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
@@ -28,7 +28,6 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  drivers/staging/fsl-mc/bus/dpio/Makefile           |   11 +
  .../{include/dpcon-cmd.h => bus/dpio/dpio-cmd.h}   |   73 +-
  drivers/staging/fsl-mc/bus/dpio/dpio-driver.c      |  296 ++++++
- drivers/staging/fsl-mc/bus/dpio/dpio-driver.txt    |  135 +++
  drivers/staging/fsl-mc/bus/dpio/dpio-service.c     |  693 +++++++++++++
  drivers/staging/fsl-mc/bus/dpio/dpio.c             |  224 +++++
  drivers/staging/fsl-mc/bus/dpio/dpio.h             |  109 ++
@@ -48,9 +47,9 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  drivers/staging/fsl-mc/bus/fsl-mc-allocator.c      |   78 +-
  drivers/staging/fsl-mc/bus/fsl-mc-bus.c            |  318 +++---
  drivers/staging/fsl-mc/bus/fsl-mc-iommu.c          |  104 ++
- drivers/staging/fsl-mc/bus/fsl-mc-msi.c            |    3 +-
+ drivers/staging/fsl-mc/bus/fsl-mc-msi.c            |    2 +-
  drivers/staging/fsl-mc/bus/fsl-mc-private.h        |    6 +-
- .../staging/fsl-mc/bus/irq-gic-v3-its-fsl-mc-msi.c |   11 +-
+ .../staging/fsl-mc/bus/irq-gic-v3-its-fsl-mc-msi.c |   10 +-
  drivers/staging/fsl-mc/bus/mc-io.c                 |    4 +-
  drivers/staging/fsl-mc/bus/mc-ioctl.h              |   22 +
  drivers/staging/fsl-mc/bus/mc-restool.c            |  405 ++++++++
@@ -68,14 +67,13 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  drivers/staging/fsl-mc/include/mc-cmd.h            |   44 +-
  drivers/staging/fsl-mc/include/mc-sys.h            |    3 +-
  drivers/staging/fsl-mc/include/mc.h                |   17 +-
- 49 files changed, 7384 insertions(+), 2612 deletions(-)
+ 48 files changed, 7247 insertions(+), 2612 deletions(-)
  create mode 100644 drivers/staging/fsl-mc/bus/dpbp-cmd.h
  create mode 100644 drivers/staging/fsl-mc/bus/dpcon-cmd.h
  create mode 100644 drivers/staging/fsl-mc/bus/dpcon.c
  create mode 100644 drivers/staging/fsl-mc/bus/dpio/Makefile
  rename drivers/staging/fsl-mc/{include/dpcon-cmd.h => bus/dpio/dpio-cmd.h} (64%)
  create mode 100644 drivers/staging/fsl-mc/bus/dpio/dpio-driver.c
- create mode 100644 drivers/staging/fsl-mc/bus/dpio/dpio-driver.txt
  create mode 100644 drivers/staging/fsl-mc/bus/dpio/dpio-service.c
  create mode 100644 drivers/staging/fsl-mc/bus/dpio/dpio.c
  create mode 100644 drivers/staging/fsl-mc/bus/dpio/dpio.h
@@ -1633,144 +1631,6 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +module_init(dpio_driver_init);
 +module_exit(dpio_driver_exit);
 --- /dev/null
-+++ b/drivers/staging/fsl-mc/bus/dpio/dpio-driver.txt
-@@ -0,0 +1,135 @@
-+Copyright 2016 NXP
-+
-+Introduction
-+------------
-+
-+A DPAA2 DPIO (Data Path I/O) is a hardware object that provides
-+interfaces to enqueue and dequeue frames to/from network interfaces
-+and other accelerators.  A DPIO also provides hardware buffer
-+pool management for network interfaces.
-+
-+This document provides an overview the Linux DPIO driver, its
-+subcomponents, and its APIs.
-+
-+See Documentation/dpaa2/overview.txt for a general overview of DPAA2
-+and the general DPAA2 driver architecture in Linux.
-+
-+Driver Overview
-+---------------
-+
-+The DPIO driver is bound to DPIO objects discovered on the fsl-mc bus and
-+provides services that:
-+  A) allow other drivers, such as the Ethernet driver, to enqueue and dequeue
-+     frames for their respective objects
-+  B) allow drivers to register callbacks for data availability notifications
-+     when data becomes available on a queue or channel
-+  C) allow drivers to manage hardware buffer pools
-+
-+The Linux DPIO driver consists of 3 primary components--
-+   DPIO object driver-- fsl-mc driver that manages the DPIO object
-+   DPIO service-- provides APIs to other Linux drivers for services
-+   QBman portal interface-- sends portal commands, gets responses
-+
-+          fsl-mc          other
-+           bus           drivers
-+            |               |
-+        +---+----+   +------+-----+
-+        |DPIO obj|   |DPIO service|
-+        | driver |---|  (DPIO)    |
-+        +--------+   +------+-----+
-+                            |
-+                     +------+-----+
-+                     |    QBman   |
-+                     | portal i/f |
-+                     +------------+
-+                            |
-+                         hardware
-+
-+The diagram below shows how the DPIO driver components fit with the other
-+DPAA2 Linux driver components:
-+                                                   +------------+
-+                                                   | OS Network |
-+                                                   |   Stack    |
-+                 +------------+                    +------------+
-+                 | Allocator  |. . . . . . .       |  Ethernet  |
-+                 |(DPMCP,DPBP)|                    |   (DPNI)   |
-+                 +-.----------+                    +---+---+----+
-+                  .          .                         ^   |
-+                 .            .           <data avail, |   |<enqueue,
-+                .              .           tx confirm> |   | dequeue>
-+    +-------------+             .                      |   |
-+    | DPRC driver |              .    +--------+ +------------+
-+    |   (DPRC)    |               . . |DPIO obj| |DPIO service|
-+    +----------+--+                   | driver |-|  (DPIO)    |
-+               |                      +--------+ +------+-----+
-+               |<dev add/remove>                 +------|-----+
-+               |                                 |   QBman    |
-+          +----+--------------+                  | portal i/f |
-+          |   MC-bus driver   |                  +------------+
-+          |                   |                     |
-+          | /soc/fsl-mc       |                     |
-+          +-------------------+                     |
-+                                                    |
-+ =========================================|=========|========================
-+                                        +-+--DPIO---|-----------+
-+                                        |           |           |
-+                                        |        QBman Portal   |
-+                                        +-----------------------+
-+
-+ ============================================================================
-+
-+
-+DPIO Object Driver (dpio-driver.c)
-+----------------------------------
-+
-+   The dpio-driver component registers with the fsl-mc bus to handle objects of
-+   type "dpio".  The implementation of probe() handles basic initialization
-+   of the DPIO including mapping of the DPIO regions (the QBman SW portal)
-+   and initializing interrupts and registering irq handlers.  The dpio-driver
-+   registers the probed DPIO with dpio-service.
-+
-+DPIO service  (dpio-service.c, dpaa2-io.h)
-+------------------------------------------
-+
-+   The dpio service component provides queuing, notification, and buffers
-+   management services to DPAA2 drivers, such as the Ethernet driver.  A system
-+   will typically allocate 1 DPIO object per CPU to allow queuing operations
-+   to happen simultaneously across all CPUs.
-+
-+   Notification handling
-+      dpaa2_io_service_register()
-+      dpaa2_io_service_deregister()
-+      dpaa2_io_service_rearm()
-+
-+   Queuing
-+      dpaa2_io_service_pull_fq()
-+      dpaa2_io_service_pull_channel()
-+      dpaa2_io_service_enqueue_fq()
-+      dpaa2_io_service_enqueue_qd()
-+      dpaa2_io_store_create()
-+      dpaa2_io_store_destroy()
-+      dpaa2_io_store_next()
-+
-+   Buffer pool management
-+      dpaa2_io_service_release()
-+      dpaa2_io_service_acquire()
-+
-+QBman portal interface (qbman-portal.c)
-+---------------------------------------
-+
-+   The qbman-portal component provides APIs to do the low level hardware
-+   bit twiddling for operations such as:
-+      -initializing Qman software portals
-+      -building and sending portal commands
-+      -portal interrupt configuration and processing
-+
-+   The qbman-portal APIs are not public to other drivers, and are
-+   only used by dpio-service.
-+
-+Other (dpaa2-fd.h, dpaa2-global.h)
-+----------------------------------
-+
-+   Frame descriptor and scatter-gather definitions and the APIs used to
-+   manipulate them are defined in dpaa2-fd.h.
-+
-+   Dequeue result struct and parsing APIs are defined in dpaa2-global.h.
---- /dev/null
 +++ b/drivers/staging/fsl-mc/bus/dpio/dpio-service.c
 @@ -0,0 +1,693 @@
 +/*

target/linux/layerscape/patches-4.9/706-fsl-dpaa-use-4-9-ndo-get-stats64.patch

@@ -1,112 +0,0 @@
-From: Mathew McBride <matt@traverse.com.au>
-Date: Tue, 24 Oct 2017 11:30:00 +1100
-Subject: [PATCH] dpaa: backport use of 4.9 ndo_get_stats64
-
-This patch changes the declarations of ndo_get_stats64 handlers
-to the previous struct rtnl_link_stats64 * return type instead of
-the mainline void return.
-
-Suggested-by: Adrien Gallouët <adrien@gallouet.fr>
-Signed-off-by: Mathew McBride <matt@traverse.com.au>
-
----
- drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_common.c |    5 +++--
- drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_common.h |    4 ++--
- drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.c            |    3 ++-
- drivers/staging/fsl-dpaa2/ethsw/switch.c                  |    4 ++--
- drivers/staging/fsl-dpaa2/evb/evb.c                       |    4 ++--
- 5 files changed, 11 insertions(+), 9 deletions(-)
-
---- a/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.c
-+++ b/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.c
-@@ -1296,7 +1296,7 @@ static int dpaa2_eth_set_addr(struct net
- /** Fill in counters maintained by the GPP driver. These may be different from
-  * the hardware counters obtained by ethtool.
-  */
--static void dpaa2_eth_get_stats(struct net_device *net_dev,
-+static struct rtnl_link_stats64 *dpaa2_eth_get_stats(struct net_device *net_dev,
- 				struct rtnl_link_stats64 *stats)
- {
- 	struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
-@@ -1312,6 +1312,7 @@ static void dpaa2_eth_get_stats(struct n
- 		for (j = 0; j < num; j++)
- 			netstats[j] += cpustats[j];
- 	}
-+	return stats;
- }
- 
- static int dpaa2_eth_change_mtu(struct net_device *net_dev, int mtu)
---- a/drivers/staging/fsl-dpaa2/ethsw/switch.c
-+++ b/drivers/staging/fsl-dpaa2/ethsw/switch.c
-@@ -1094,7 +1094,7 @@ static int ethsw_port_fdb_del(struct ndm
- 	return 0;
- }
- 
--void ethsw_port_get_stats(struct net_device *netdev,
-+struct rtnl_link_stats64 *ethsw_port_get_stats(struct net_device *netdev,
- 			  struct rtnl_link_stats64 *storage)
- {
- 	struct ethsw_port_priv	*port_priv = netdev_priv(netdev);
-@@ -1154,7 +1154,7 @@ void ethsw_port_get_stats(struct net_dev
- 	if (err)
- 		goto error;
- 
--	return;
-+	return storage;
- 
- error:
- 	netdev_err(netdev, "dpsw_if_get_counter err %d\n", err);
---- a/drivers/staging/fsl-dpaa2/evb/evb.c
-+++ b/drivers/staging/fsl-dpaa2/evb/evb.c
-@@ -765,7 +765,7 @@ static int evb_dellink(struct net_device
- 	return 0;
- }
- 
--void evb_port_get_stats(struct net_device *netdev,
-+struct rtnl_link_stats64 *evb_port_get_stats(struct net_device *netdev,
- 			struct rtnl_link_stats64 *storage)
- {
- 	struct evb_port_priv	*port_priv = netdev_priv(netdev);
-@@ -842,7 +842,7 @@ void evb_port_get_stats(struct net_devic
- 	if (unlikely(err))
- 		goto error;
- 
--	return;
-+	return storage;
- 
- error:
- 	netdev_err(netdev, "dpdmux_if_get_counter err %d\n", err);
---- a/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_common.c
-+++ b/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_common.c
-@@ -239,8 +239,8 @@ EXPORT_SYMBOL(dpa_timeout);
-  * Calculates the statistics for the given device by adding the statistics
-  * collected by each CPU.
-  */
--void __cold
--dpa_get_stats64(struct net_device *net_dev,
-+struct rtnl_link_stats64 __cold
-+*dpa_get_stats64(struct net_device *net_dev,
- 		struct rtnl_link_stats64 *stats)
- {
- 	struct dpa_priv_s *priv = netdev_priv(net_dev);
-@@ -258,6 +258,7 @@ dpa_get_stats64(struct net_device *net_d
- 		for (j = 0; j < numstats; j++)
- 			netstats[j] += cpustats[j];
- 	}
-+	return stats;
- }
- EXPORT_SYMBOL(dpa_get_stats64);
- 
---- a/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_common.h
-+++ b/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_common.h
-@@ -140,8 +140,8 @@ int dpa_netdev_init(struct net_device *n
- int __cold dpa_start(struct net_device *net_dev);
- int __cold dpa_stop(struct net_device *net_dev);
- void __cold dpa_timeout(struct net_device *net_dev);
--void __cold
--dpa_get_stats64(struct net_device *net_dev,
-+struct rtnl_link_stats64 __cold
-+*dpa_get_stats64(struct net_device *net_dev,
- 		struct rtnl_link_stats64 *stats);
- int dpa_change_mtu(struct net_device *net_dev, int new_mtu);
- int dpa_ndo_init(struct net_device *net_dev);

target/linux/layerscape/patches-4.9/706-fsl_ppfe-support-layercape.patch

@@ -1,9 +1,9 @@
-From 8b7935a883d42187716fe486c83352f24d01ddcd Mon Sep 17 00:00:00 2001
+From 8089957ac5ac5f4f8436b1052dda7840f3bff3ea Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Thu, 19 Oct 2017 12:48:19 +0800
+Date: Wed, 17 Jan 2018 15:14:12 +0800
-Subject: [PATCH] fsl_ppfe: support layercape
+Subject: [PATCH 12/30] fsl_ppfe: support layercape
 
-This is a integrated patch for layerscape pfe support.
+This is an integrated patch for layerscape pfe support.
 
 Calvin Johnson <calvin.johnson@nxp.com>
 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
@@ -25,15 +25,15 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  drivers/staging/fsl_ppfe/pfe_ctrl.h                |  112 +
  drivers/staging/fsl_ppfe/pfe_debugfs.c             |  111 +
  drivers/staging/fsl_ppfe/pfe_debugfs.h             |   25 +
- drivers/staging/fsl_ppfe/pfe_eth.c                 | 2434 ++++++++++++++++++++
+ drivers/staging/fsl_ppfe/pfe_eth.c                 | 2474 ++++++++++++++++++++
  drivers/staging/fsl_ppfe/pfe_eth.h                 |  184 ++
  drivers/staging/fsl_ppfe/pfe_firmware.c            |  314 +++
  drivers/staging/fsl_ppfe/pfe_firmware.h            |   32 +
  drivers/staging/fsl_ppfe/pfe_hal.c                 | 1516 ++++++++++++
  drivers/staging/fsl_ppfe/pfe_hif.c                 | 1072 +++++++++
  drivers/staging/fsl_ppfe/pfe_hif.h                 |  211 ++
- drivers/staging/fsl_ppfe/pfe_hif_lib.c             |  601 +++++
+ drivers/staging/fsl_ppfe/pfe_hif_lib.c             |  637 +++++
- drivers/staging/fsl_ppfe/pfe_hif_lib.h             |  239 ++
+ drivers/staging/fsl_ppfe/pfe_hif_lib.h             |  240 ++
  drivers/staging/fsl_ppfe/pfe_hw.c                  |  176 ++
  drivers/staging/fsl_ppfe/pfe_hw.h                  |   27 +
  drivers/staging/fsl_ppfe/pfe_ls1012a_platform.c    |  394 ++++
@@ -42,7 +42,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  drivers/staging/fsl_ppfe/pfe_perfmon.h             |   38 +
  drivers/staging/fsl_ppfe/pfe_sysfs.c               |  818 +++++++
  drivers/staging/fsl_ppfe/pfe_sysfs.h               |   29 +
- 34 files changed, 10366 insertions(+)
+ 34 files changed, 10443 insertions(+)
  create mode 100644 drivers/staging/fsl_ppfe/Kconfig
  create mode 100644 drivers/staging/fsl_ppfe/Makefile
  create mode 100644 drivers/staging/fsl_ppfe/TODO
@@ -2159,7 +2159,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +#endif /* _PFE_DEBUGFS_H_ */
 --- /dev/null
 +++ b/drivers/staging/fsl_ppfe/pfe_eth.c
-@@ -0,0 +1,2434 @@
+@@ -0,0 +1,2474 @@
 +/*
 + * Copyright 2015-2016 Freescale Semiconductor, Inc.
 + * Copyright 2017 NXP
@@ -2455,10 +2455,10 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +	/* Initialize the default values */
 +
 +	/*
-+	 * By default, packets without conntrack will use this default high
++	 * By default, packets without conntrack will use this default low
 +	 * priority queue
 +	 */
-+	priv->default_priority = 15;
++	priv->default_priority = 0;
 +
 +	/* Create our sysfs files */
 +	err = device_create_file(&ndev->dev, &dev_attr_default_priority);
@@ -2739,7 +2739,9 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +	if (!phydev)
 +		return -ENODEV;
 +
-+	return phy_ethtool_ksettings_get(phydev, cmd);
++	phy_ethtool_ksettings_get(phydev, cmd);
++
++	return 0;
 +}
 +
 +/*
@@ -3083,7 +3085,8 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +			     struct ls1012a_mdio_platform_data *minfo)
 +{
 +	struct mii_bus *bus;
-+	int rc;
++	int rc, ii;
++	struct phy_device *phydev;
 +
 +	netif_info(priv, drv, priv->ndev, "%s\n", __func__);
 +	pr_info("%s\n", __func__);
@@ -3122,6 +3125,31 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +	}
 +
 +	priv->mii_bus = bus;
++
++	/* For clause 45 we need to call get_phy_device() with it's
++	 * 3rd argument as true and then register the phy device
++	 * via phy_device_register()
++	 */
++
++	if (priv->einfo->mii_config == PHY_INTERFACE_MODE_2500SGMII) {
++		for (ii = 0; ii < NUM_GEMAC_SUPPORT; ii++) {
++			phydev = get_phy_device(priv->mii_bus,
++					priv->einfo->phy_id + ii, true);
++			if (!phydev || IS_ERR(phydev)) {
++				rc = -EIO;
++				netdev_err(priv->ndev, "fail to get device\n");
++				goto err1;
++			}
++			rc = phy_device_register(phydev);
++			if (rc) {
++				phy_device_free(phydev);
++				netdev_err(priv->ndev,
++					"phy_device_register() failed\n");
++				goto err1;
++			}
++		}
++	}
++
 +	pfe_eth_mdio_reset(bus);
 +
 +	return 0;
@@ -3307,8 +3335,9 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +	struct pfe_eth_priv_s *priv = pfe->eth.eth_priv[0];
 +	int sgmii_2500 = 0;
 +	struct mii_bus *bus = priv->mii_bus;
++	u16 value = 0;
 +
-+	if (priv->einfo->mii_config == PHY_INTERFACE_MODE_SGMII_2500)
++	if (priv->einfo->mii_config == PHY_INTERFACE_MODE_2500SGMII)
 +		sgmii_2500 = 1;
 +
 +	netif_info(priv, drv, ndev, "%s\n", __func__);
@@ -3324,14 +3353,16 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +		pfe_eth_mdio_write(bus, 0, 0x4, 0x4001);
 +		pfe_eth_mdio_write(bus, 0, 0x12, 0xa120);
 +		pfe_eth_mdio_write(bus, 0, 0x13, 0x7);
++		/* Autonegotiation need to be disabled for 2.5G SGMII mode*/
++		value = 0x0140;
++		pfe_eth_mdio_write(bus, 0, 0x0, value);
 +	} else {
 +		pfe_eth_mdio_write(bus, 0, 0x14, 0xb);
 +		pfe_eth_mdio_write(bus, 0, 0x4, 0x1a1);
 +		pfe_eth_mdio_write(bus, 0, 0x12, 0x400);
 +		pfe_eth_mdio_write(bus, 0, 0x13, 0x0);
++		pfe_eth_mdio_write(bus, 0, 0x0, 0x1140);
 +	}
-+
-+	pfe_eth_mdio_write(bus, 0, 0x0, 0x1140);
 +}
 +
 +/*
@@ -3357,7 +3388,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +	netif_info(priv, drv, ndev, "%s: %s\n", __func__, phy_id);
 +	interface = priv->einfo->mii_config;
 +	if ((interface == PHY_INTERFACE_MODE_SGMII) ||
-+	    (interface == PHY_INTERFACE_MODE_SGMII_2500)) {
++	    (interface == PHY_INTERFACE_MODE_2500SGMII)) {
 +		/*Configure SGMII PCS */
 +		if (pfe->scfg) {
 +			/*Config MDIO from serdes */
@@ -3725,10 +3756,17 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +				 unsigned int n_segs)
 +{
 +	ktime_t kt;
++	int tried = 0;
 +
++try_again:
 +	if (unlikely((__hif_tx_avail(&pfe->hif) < n_desc) ||
-+		     (hif_lib_tx_avail(&priv->client, queuenum) < n_desc) ||
++	(hif_lib_tx_avail(&priv->client, queuenum) < n_desc) ||
 +	(hif_lib_tx_credit_avail(pfe, priv->id, queuenum) < n_segs))) {
++		if (!tried) {
++			__hif_lib_update_credit(&priv->client, queuenum);
++			tried = 1;
++			goto try_again;
++		}
 +#ifdef PFE_ETH_TX_STATS
 +		if (__hif_tx_avail(&pfe->hif) < n_desc) {
 +			priv->stop_queue_hif[queuenum]++;
@@ -3851,8 +3889,10 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +
 +	netif_info(priv, tx_done, priv->ndev, "%s\n", __func__);
 +
-+	for (ii = 0; ii < emac_txq_cnt; ii++)
++	for (ii = 0; ii < emac_txq_cnt; ii++) {
 +		pfe_eth_flush_txQ(priv, ii, 0, 0);
++		__hif_lib_update_credit(&priv->client, ii);
++	}
 +}
 +
 +void pfe_tx_get_req_desc(struct sk_buff *skb, unsigned int *n_desc, unsigned int
@@ -7943,7 +7983,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +#endif /* _PFE_HIF_H_ */
 --- /dev/null
 +++ b/drivers/staging/fsl_ppfe/pfe_hif_lib.c
-@@ -0,0 +1,601 @@
+@@ -0,0 +1,637 @@
 +/*
 + * Copyright 2015-2016 Freescale Semiconductor, Inc.
 + * Copyright 2017 NXP
@@ -7980,7 +8020,10 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +
 +unsigned int lro_mode;
 +unsigned int page_mode;
-+unsigned int tx_qos;
++unsigned int tx_qos = 1;
++module_param(tx_qos, uint, 0444);
++MODULE_PARM_DESC(tx_qos, "0: disable ,\n"
++			 "1: enable (default), guarantee no packet drop at TMU level\n");
 +unsigned int pfe_pkt_size;
 +unsigned int pfe_pkt_headroom;
 +unsigned int emac_txq_cnt;
@@ -8511,6 +8554,39 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +		}
 +}
 +
++/* __hif_lib_update_credit
++ *
++ * @param[in] client	hif client context
++ * @param[in] queue	queue number in match with TMU
++ */
++void __hif_lib_update_credit(struct hif_client_s *client, unsigned int queue)
++{
++	unsigned int tmu_tx_packets, tmp;
++
++	if (tx_qos) {
++		tmu_tx_packets = be32_to_cpu(pe_dmem_read(TMU0_ID +
++			client->id, (TMU_DM_TX_TRANS + (queue * 4)), 4));
++
++		/* tx_packets counter overflowed */
++		if (tmu_tx_packets >
++		    pfe->tmu_credit.tx_packets[client->id][queue]) {
++			tmp = UINT_MAX - tmu_tx_packets +
++			pfe->tmu_credit.tx_packets[client->id][queue];
++
++			pfe->tmu_credit.tx_credit[client->id][queue] =
++			pfe->tmu_credit.tx_credit_max[client->id][queue] - tmp;
++		} else {
++		/* TMU tx <= pfe_eth tx, normal case or both OF since
++		 * last time
++		 */
++			pfe->tmu_credit.tx_credit[client->id][queue] =
++			pfe->tmu_credit.tx_credit_max[client->id][queue] -
++			(pfe->tmu_credit.tx_packets[client->id][queue] -
++			tmu_tx_packets);
++		}
++	}
++}
++
 +int pfe_hif_lib_init(struct pfe *pfe)
 +{
 +	int rc;
@@ -8547,7 +8623,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +}
 --- /dev/null
 +++ b/drivers/staging/fsl_ppfe/pfe_hif_lib.h
-@@ -0,0 +1,239 @@
+@@ -0,0 +1,240 @@
 +/*
 + * Copyright 2015-2016 Freescale Semiconductor, Inc.
 + * Copyright 2017 NXP
@@ -8735,6 +8811,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +void *hif_lib_receive_pkt(struct hif_client_s *client, int qno, int *len, int
 +				*ofst, unsigned int *rx_ctrl,
 +				unsigned int *desc_ctrl, void **priv_data);
++void __hif_lib_update_credit(struct hif_client_s *client, unsigned int queue);
 +void hif_lib_set_rx_cpu_affinity(struct hif_client_s *client, int cpu_id);
 +void hif_lib_set_tx_queue_nocpy(struct hif_client_s *client, int qno, int
 +					enable);

target/linux/layerscape/patches-4.9/801-ata-support-layerscape.patch

@@ -1,9 +1,9 @@
-From 505eb62bdb7a4cc25b13491dd5c68d0741c5d6da Mon Sep 17 00:00:00 2001
+From 4c3979602db05bca439bfc98db88dc14a8663db0 Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Mon, 25 Sep 2017 12:21:13 +0800
+Date: Wed, 17 Jan 2018 15:14:57 +0800
-Subject: [PATCH] ata: support layerscape
+Subject: [PATCH 13/30] ata: support layerscape
 
-This is a integrated patch for layerscape sata support.
+This is an integrated patch for layerscape sata support.
 
 Signed-off-by: Tang Yuantian <Yuantian.Tang@nxp.com>
 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>

target/linux/layerscape/patches-4.9/802-clk-support-layerscape.patch

@@ -1,17 +1,17 @@
-From bd3df6d053a28d5aa630524c9087c21def30e764 Mon Sep 17 00:00:00 2001
+From 82a391a067491f4c46b75d0dfe2bf9e5a11aca8e Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Mon, 25 Sep 2017 12:09:35 +0800
+Date: Wed, 17 Jan 2018 15:15:44 +0800
-Subject: [PATCH] clk: support layerscape
+Subject: [PATCH 14/30] clk: support layerscape
 
-This is a integrated patch for layerscape clock support.
+This is an integrated patch for layerscape clock support.
 
 Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
 Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
 Signed-off-by: Scott Wood <oss@buserror.net>
 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 ---
- drivers/clk/clk-qoriq.c | 170 ++++++++++++++++++++++++++++++++++++++++++++----
+ drivers/clk/clk-qoriq.c | 179 ++++++++++++++++++++++++++++++++++++++++++++----
- 1 file changed, 156 insertions(+), 14 deletions(-)
+ 1 file changed, 164 insertions(+), 15 deletions(-)
 
 --- a/drivers/clk/clk-qoriq.c
 +++ b/drivers/clk/clk-qoriq.c
@@ -23,6 +23,15 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  #include <linux/fsl/guts.h>
  #include <linux/io.h>
  #include <linux/kernel.h>
+@@ -40,7 +41,7 @@ struct clockgen_pll_div {
+ };
+ 
+ struct clockgen_pll {
+-	struct clockgen_pll_div div[4];
++	struct clockgen_pll_div div[8];
+ };
+ 
+ #define CLKSEL_VALID	1
 @@ -87,7 +88,7 @@ struct clockgen {
  	struct device_node *node;
  	void __iomem *regs;
@@ -244,11 +253,18 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  	if (cg->info.flags & CG_VER3) {
  		switch (idx) {
  		case PLATFORM_PLL:
-@@ -1000,12 +1125,13 @@ static void __init create_one_pll(struct
+@@ -1000,12 +1125,20 @@ static void __init create_one_pll(struct
  
  	for (i = 0; i < ARRAY_SIZE(pll->div); i++) {
  		struct clk *clk;
 +		int ret;
++
++		/*
++		 * For platform PLL, there are 8 divider clocks.
++		 * For core PLL, there are 4 divider clocks at most.
++		 */
++		if (idx != 0 && i >= 4)
++			break;
  
  		snprintf(pll->div[i].name, sizeof(pll->div[i].name),
  			 "cg-pll%d-div%d", idx, i + 1);
@@ -259,7 +275,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  		if (IS_ERR(clk)) {
  			pr_err("%s: %s: register failed %ld\n",
  			       __func__, pll->div[i].name, PTR_ERR(clk));
-@@ -1013,6 +1139,11 @@ static void __init create_one_pll(struct
+@@ -1013,6 +1146,11 @@ static void __init create_one_pll(struct
  		}
  
  		pll->div[i].clk = clk;
@@ -271,7 +287,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  	}
  }
  
-@@ -1142,6 +1273,13 @@ static struct clk *clockgen_clk_get(stru
+@@ -1142,6 +1280,13 @@ static struct clk *clockgen_clk_get(stru
  			goto bad_args;
  		clk = pll->div[idx].clk;
  		break;
@@ -285,7 +301,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  	default:
  		goto bad_args;
  	}
-@@ -1253,6 +1391,7 @@ static void __init clockgen_init(struct
+@@ -1253,6 +1398,7 @@ static void __init clockgen_init(struct
  		clockgen.info.flags |= CG_CMUX_GE_PLAT;
  
  	clockgen.sysclk = create_sysclk("cg-sysclk");
@@ -293,7 +309,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  	create_plls(&clockgen);
  	create_muxes(&clockgen);
  
-@@ -1273,8 +1412,11 @@ err:
+@@ -1273,8 +1419,11 @@ err:
  
  CLK_OF_DECLARE(qoriq_clockgen_1, "fsl,qoriq-clockgen-1.0", clockgen_init);
  CLK_OF_DECLARE(qoriq_clockgen_2, "fsl,qoriq-clockgen-2.0", clockgen_init);

target/linux/layerscape/patches-4.9/803-cpufreq-support-layerscape.patch

@@ -1,9 +1,9 @@
-From a9ebdf9fa18fd317a4e97f46e8c5263898094864 Mon Sep 17 00:00:00 2001
+From b018e44a68dc2f4df819ae194e39e07313841dad Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Mon, 25 Sep 2017 12:20:10 +0800
+Date: Wed, 17 Jan 2018 15:27:58 +0800
-Subject: [PATCH] cpufreq: support layerscape
+Subject: [PATCH 15/30] cpufreq: support layerscape
 
-This is a integrated patch for layerscape pm support.
+This is an integrated patch for layerscape pm support.
 
 Signed-off-by: Tang Yuantian <Yuantian.Tang@nxp.com>
 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
@@ -11,7 +11,9 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  drivers/cpufreq/Kconfig         |   2 +-
  drivers/cpufreq/qoriq-cpufreq.c | 176 +++++++++++++++-------------------------
  drivers/firmware/psci.c         |  12 ++-
- 3 files changed, 77 insertions(+), 113 deletions(-)
+ drivers/soc/fsl/rcpm.c          | 158 ++++++++++++++++++++++++++++++++++++
+ 4 files changed, 235 insertions(+), 113 deletions(-)
+ create mode 100644 drivers/soc/fsl/rcpm.c
 
 --- a/drivers/cpufreq/Kconfig
 +++ b/drivers/cpufreq/Kconfig
@@ -359,3 +361,164 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  }
  
  /*
+--- /dev/null
++++ b/drivers/soc/fsl/rcpm.c
+@@ -0,0 +1,158 @@
++/*
++ * Run Control and Power Management (RCPM) driver
++ *
++ * Copyright 2016 NXP
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ */
++#define pr_fmt(fmt) "RCPM: %s: " fmt, __func__
++
++#include <linux/kernel.h>
++#include <linux/io.h>
++#include <linux/of_platform.h>
++#include <linux/of_address.h>
++#include <linux/suspend.h>
++
++/* RCPM register offset */
++#define RCPM_IPPDEXPCR0			0x140
++
++#define RCPM_WAKEUP_CELL_SIZE	2
++
++struct rcpm_config {
++	int ipp_num;
++	int ippdexpcr_offset;
++	u32 ippdexpcr[2];
++	void *rcpm_reg_base;
++};
++
++static struct rcpm_config *rcpm;
++
++static inline void rcpm_reg_write(u32 offset, u32 value)
++{
++	iowrite32be(value, rcpm->rcpm_reg_base + offset);
++}
++
++static inline u32 rcpm_reg_read(u32 offset)
++{
++	return ioread32be(rcpm->rcpm_reg_base + offset);
++}
++
++static void rcpm_wakeup_fixup(struct device *dev, void *data)
++{
++	struct device_node *node = dev ? dev->of_node : NULL;
++	u32 value[RCPM_WAKEUP_CELL_SIZE];
++	int ret, i;
++
++	if (!dev || !node || !device_may_wakeup(dev))
++		return;
++
++	/*
++	 * Get the values in the "rcpm-wakeup" property.
++	 * Three values are:
++	 * The first is a pointer to the RCPM node.
++	 * The second is the value of the ippdexpcr0 register.
++	 * The third is the value of the ippdexpcr1 register.
++	 */
++	ret = of_property_read_u32_array(node, "fsl,rcpm-wakeup",
++					 value, RCPM_WAKEUP_CELL_SIZE);
++	if (ret)
++		return;
++
++	pr_debug("wakeup source: the device %s\n", node->full_name);
++
++	for (i = 0; i < rcpm->ipp_num; i++)
++		rcpm->ippdexpcr[i] |= value[i + 1];
++}
++
++static int rcpm_suspend_prepare(void)
++{
++	int i;
++	u32 val;
++
++	BUG_ON(!rcpm);
++
++	for (i = 0; i < rcpm->ipp_num; i++)
++		rcpm->ippdexpcr[i] = 0;
++
++	dpm_for_each_dev(NULL, rcpm_wakeup_fixup);
++
++	for (i = 0; i < rcpm->ipp_num; i++) {
++		if (rcpm->ippdexpcr[i]) {
++			val = rcpm_reg_read(rcpm->ippdexpcr_offset + 4 * i);
++			rcpm_reg_write(rcpm->ippdexpcr_offset + 4 * i,
++					       val | rcpm->ippdexpcr[i]);
++			pr_debug("ippdexpcr%d = 0x%x\n", i, rcpm->ippdexpcr[i]);
++		}
++	}
++
++	return 0;
++}
++
++static int rcpm_suspend_notifier_call(struct notifier_block *bl,
++				      unsigned long state,
++				      void *unused)
++{
++	switch (state) {
++	case PM_SUSPEND_PREPARE:
++		rcpm_suspend_prepare();
++		break;
++	}
++
++	return NOTIFY_DONE;
++}
++
++static struct rcpm_config rcpm_default_config = {
++	.ipp_num = 1,
++	.ippdexpcr_offset = RCPM_IPPDEXPCR0,
++};
++
++static const struct of_device_id rcpm_matches[] = {
++	{
++		.compatible = "fsl,qoriq-rcpm-2.1",
++		.data = &rcpm_default_config,
++	},
++	{}
++};
++
++static struct notifier_block rcpm_suspend_notifier = {
++	.notifier_call = rcpm_suspend_notifier_call,
++};
++
++static int __init layerscape_rcpm_init(void)
++{
++	const struct of_device_id *match;
++	struct device_node *np;
++
++	np = of_find_matching_node_and_match(NULL, rcpm_matches, &match);
++	if (!np) {
++		pr_err("Can't find the RCPM node.\n");
++		return -EINVAL;
++	}
++
++	if (match->data)
++		rcpm = (struct rcpm_config *)match->data;
++	else
++		return -EINVAL;
++
++	rcpm->rcpm_reg_base = of_iomap(np, 0);
++	of_node_put(np);
++	if (!rcpm->rcpm_reg_base)
++		return -ENOMEM;
++
++	register_pm_notifier(&rcpm_suspend_notifier);
++
++	pr_info("The RCPM driver initialized.\n");
++
++	return 0;
++}
++
++subsys_initcall(layerscape_rcpm_init);

target/linux/layerscape/patches-4.9/805-dma-support-layerscape.patch

@@ -1,25 +1,25 @@
-From 854c1f0e9574e9b25a55b439608c71e013b34a56 Mon Sep 17 00:00:00 2001
+From 515d590e3d5313110faa4f2c86f7784d9b070fa9 Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Mon, 25 Sep 2017 12:12:20 +0800
+Date: Wed, 17 Jan 2018 15:30:59 +0800
-Subject: [PATCH] dma: support layerscape
+Subject: [PATCH 17/30] dma: support layerscape
 
-This is a integrated patch for layerscape dma support.
+This is an integrated patch for layerscape dma support.
 
 Signed-off-by: jiaheng.fan <jiaheng.fan@nxp.com>
 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 ---
  drivers/dma/Kconfig                     |   31 +
  drivers/dma/Makefile                    |    3 +
- drivers/dma/caam_dma.c                  |  563 +++++++++++++++
+ drivers/dma/caam_dma.c                  |  563 ++++++++++++++
  drivers/dma/dpaa2-qdma/Kconfig          |    8 +
  drivers/dma/dpaa2-qdma/Makefile         |    8 +
- drivers/dma/dpaa2-qdma/dpaa2-qdma.c     |  986 +++++++++++++++++++++++++
+ drivers/dma/dpaa2-qdma/dpaa2-qdma.c     |  986 ++++++++++++++++++++++++
  drivers/dma/dpaa2-qdma/dpaa2-qdma.h     |  262 +++++++
- drivers/dma/dpaa2-qdma/dpdmai.c         |  454 ++++++++++++
+ drivers/dma/dpaa2-qdma/dpdmai.c         |  454 +++++++++++
- drivers/dma/dpaa2-qdma/fsl_dpdmai.h     |  521 ++++++++++++++
+ drivers/dma/dpaa2-qdma/fsl_dpdmai.h     |  521 +++++++++++++
  drivers/dma/dpaa2-qdma/fsl_dpdmai_cmd.h |  222 ++++++
- drivers/dma/fsl-qdma.c                  | 1201 +++++++++++++++++++++++++++++++
+ drivers/dma/fsl-qdma.c                  | 1243 +++++++++++++++++++++++++++++++
- 11 files changed, 4259 insertions(+)
+ 11 files changed, 4301 insertions(+)
  create mode 100644 drivers/dma/caam_dma.c
  create mode 100644 drivers/dma/dpaa2-qdma/Kconfig
  create mode 100644 drivers/dma/dpaa2-qdma/Makefile
@@ -3146,7 +3146,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +#endif /* _FSL_DPDMAI_CMD_H */
 --- /dev/null
 +++ b/drivers/dma/fsl-qdma.c
-@@ -0,0 +1,1201 @@
+@@ -0,0 +1,1243 @@
 +/*
 + * drivers/dma/fsl-qdma.c
 + *
@@ -3268,67 +3268,111 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +
 +u64 pre_addr, pre_queue;
 +
++/* qDMA Command Descriptor Fotmats */
++
++/* Compound Command Descriptor Fotmat */
 +struct fsl_qdma_ccdf {
-+	u8 status;
++	__le32 status; /* ser, status */
-+	u32 rev1:22;
++	__le32 cfg;	/* format, offset */
-+	u32 ser:1;
-+	u32 rev2:1;
-+	u32 rev3:20;
-+	u32 offset:9;
-+	u32 format:3;
 +	union {
 +		struct {
-+			u32 addr_lo;	/* low 32-bits of 40-bit address */
++			__le32 addr_lo;	/* low 32-bits of 40-bit address */
-+			u32 addr_hi:8;	/* high 8-bits of 40-bit address */
++			u8 addr_hi;	/* high 8-bits of 40-bit address */
-+			u32 rev4:16;
++			u8 __reserved1[2];
-+			u32 queue:3;
++			u8 cfg8b_w1; /* dd, queue*/
-+			u32 rev5:3;
++		} __packed;
-+			u32 dd:2;	/* dynamic debug */
++		__le64 data;
-+		};
-+		struct {
-+			u64 addr:40;
-+			/* More efficient address accessor */
-+			u64 __notaddress:24;
-+		};
 +	};
 +} __packed;
 +
++#define QDMA_CCDF_STATUS		20
++#define QDMA_CCDF_OFFSET		20
++#define QDMA_CCDF_MASK		GENMASK(28, 20)
++#define QDMA_CCDF_FOTMAT		BIT(29)
++#define QDMA_CCDF_SER			BIT(30)
++
++static inline u64 qdma_ccdf_addr_get64(const struct fsl_qdma_ccdf *ccdf)
++{
++	return le64_to_cpu(ccdf->data) & 0xffffffffffLLU;
++}
++static inline u64 qdma_ccdf_get_queue(const struct fsl_qdma_ccdf *ccdf)
++{
++	return ccdf->cfg8b_w1 & 0xff;
++}
++static inline void qdma_ccdf_addr_set64(struct fsl_qdma_ccdf *ccdf, u64 addr)
++{
++	ccdf->addr_hi = upper_32_bits(addr);
++	ccdf->addr_lo = cpu_to_le32(lower_32_bits(addr));
++}
++static inline int qdma_ccdf_get_offset(const struct fsl_qdma_ccdf *ccdf)
++{
++	return (le32_to_cpu(ccdf->cfg) & QDMA_CCDF_MASK) >> QDMA_CCDF_OFFSET;
++}
++static inline void qdma_ccdf_set_format(struct fsl_qdma_ccdf *ccdf, int offset)
++{
++	ccdf->cfg = cpu_to_le32(QDMA_CCDF_FOTMAT | offset);
++}
++static inline int qdma_ccdf_get_status(const struct fsl_qdma_ccdf *ccdf)
++{
++	return (le32_to_cpu(ccdf->status) & QDMA_CCDF_MASK) >> QDMA_CCDF_STATUS;
++}
++static inline void qdma_ccdf_set_ser(struct fsl_qdma_ccdf *ccdf, int status)
++{
++	ccdf->status = cpu_to_le32(QDMA_CCDF_SER | status);
++}
++/* qDMA Compound S/G Format */
 +struct fsl_qdma_csgf {
-+	u32 offset:13;
++	__le32 offset; /* offset */
-+	u32 rev1:19;
++	__le32 cfg;	/* E bit, F bit, length */
-+	u32 length:30;
-+	u32 f:1;
-+	u32 e:1;
 +	union {
 +		struct {
-+			u32 addr_lo;	/* low 32-bits of 40-bit address */
++			__le32 addr_lo;	/* low 32-bits of 40-bit address */
-+			u32 addr_hi:8;	/* high 8-bits of 40-bit address */
++			u8 addr_hi;	/* high 8-bits of 40-bit address */
-+			u32 rev2:24;
++			u8 __reserved1[3];
-+		};
-+		struct {
-+			u64 addr:40;
-+			/* More efficient address accessor */
-+			u64 __notaddress:24;
 +		};
++		__le64 data;
 +	};
 +} __packed;
 +
++#define QDMA_SG_FIN	BIT(30)
++#define QDMA_SG_EXT	BIT(31)
++#define QDMA_SG_LEN_MASK	GENMASK(29, 0)
++static inline u64 qdma_csgf_addr_get64(const struct fsl_qdma_csgf *sg)
++{
++	return be64_to_cpu(sg->data) & 0xffffffffffLLU;
++}
++static inline void qdma_csgf_addr_set64(struct fsl_qdma_csgf *sg, u64 addr)
++{
++	sg->addr_hi = upper_32_bits(addr);
++	sg->addr_lo = cpu_to_le32(lower_32_bits(addr));
++}
++static inline void qdma_csgf_set_len(struct fsl_qdma_csgf *csgf, int len)
++{
++	csgf->cfg = cpu_to_le32(len & QDMA_SG_LEN_MASK);
++}
++static inline void qdma_csgf_set_f(struct fsl_qdma_csgf *csgf, int len)
++{
++	csgf->cfg = cpu_to_le32(QDMA_SG_FIN | (len & QDMA_SG_LEN_MASK));
++}
++static inline void qdma_csgf_set_e(struct fsl_qdma_csgf *csgf, int len)
++{
++	csgf->cfg = cpu_to_le32(QDMA_SG_EXT | (len & QDMA_SG_LEN_MASK));
++}
++
++/* qDMA Source Descriptor Format */
 +struct fsl_qdma_sdf {
-+	u32 rev3:32;
++	__le32 rev3;
-+	u32 ssd:12;	/* souce stride distance */
++	__le32 cfg; /* rev4, bit[0-11] - ssd, bit[12-23] sss */
-+	u32 sss:12;	/* souce stride size */
++	__le32 rev5;
-+	u32 rev4:8;
++	__le32 cmd;
-+	u32 rev5:32;
-+	u32 cmd;
 +} __packed;
 +
++/*qDMA Destination Descriptor Format*/
 +struct fsl_qdma_ddf {
-+	u32 rev1:32;
++	__le32 rev1;
-+	u32 dsd:12;	/* Destination stride distance */
++	__le32 cfg; /* rev2, bit[0-11] - dsd, bit[12-23] - dss */
-+	u32 dss:12;	/* Destination stride size */
++	__le32 rev3;
-+	u32 rev2:8;
++	__le32 cmd;
-+	u32 rev3:32;
-+	u32 cmd;
 +} __packed;
 +
 +struct fsl_qdma_chan {
@@ -3453,24 +3497,27 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +
 +	memset(fsl_comp->virt_addr, 0, FSL_QDMA_BASE_BUFFER_SIZE);
 +	/* Head Command Descriptor(Frame Descriptor) */
-+	ccdf->addr = fsl_comp->bus_addr + 16;
++	qdma_ccdf_addr_set64(ccdf, fsl_comp->bus_addr + 16);
-+	ccdf->format = 1; /* Compound S/G format */
++	qdma_ccdf_set_format(ccdf, qdma_ccdf_get_offset(ccdf));
++	qdma_ccdf_set_ser(ccdf, qdma_ccdf_get_status(ccdf));
 +	/* Status notification is enqueued to status queue. */
-+	ccdf->ser = 1;
 +	/* Compound Command Descriptor(Frame List Table) */
-+	csgf_desc->addr = fsl_comp->bus_addr + 64;
++	qdma_csgf_addr_set64(csgf_desc, fsl_comp->bus_addr + 64);
 +	/* It must be 32 as Compound S/G Descriptor */
-+	csgf_desc->length = 32;
++	qdma_csgf_set_len(csgf_desc, 32);
-+	csgf_src->addr = src;
++	qdma_csgf_addr_set64(csgf_src, src);
-+	csgf_src->length = len;
++	qdma_csgf_set_len(csgf_src, len);
-+	csgf_dest->addr = dst;
++	qdma_csgf_addr_set64(csgf_dest, dst);
-+	csgf_dest->length = len;
++	qdma_csgf_set_len(csgf_dest, len);
 +	/* This entry is the last entry. */
-+	csgf_dest->f = FSL_QDMA_F_LAST_ENTRY;
++	qdma_csgf_set_f(csgf_dest, len);
 +	/* Descriptor Buffer */
-+	sdf->cmd = FSL_QDMA_CMD_RWTTYPE << FSL_QDMA_CMD_RWTTYPE_OFFSET;
++	sdf->cmd = cpu_to_le32(
-+	ddf->cmd = FSL_QDMA_CMD_RWTTYPE << FSL_QDMA_CMD_RWTTYPE_OFFSET;
++			FSL_QDMA_CMD_RWTTYPE << FSL_QDMA_CMD_RWTTYPE_OFFSET);
-+	ddf->cmd |= FSL_QDMA_CMD_LWC << FSL_QDMA_CMD_LWC_OFFSET;
++	ddf->cmd = cpu_to_le32(
++			FSL_QDMA_CMD_RWTTYPE << FSL_QDMA_CMD_RWTTYPE_OFFSET);
++	ddf->cmd |= cpu_to_le32(
++			FSL_QDMA_CMD_LWC << FSL_QDMA_CMD_LWC_OFFSET);
 +}
 +
 +static void fsl_qdma_comp_fill_sg(
@@ -3494,49 +3541,48 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +	csgf_dest = (struct fsl_qdma_csgf *)fsl_comp->virt_addr + 3;
 +	sdf = (struct fsl_qdma_sdf *)fsl_comp->virt_addr + 4;
 +	ddf = (struct fsl_qdma_ddf *)fsl_comp->virt_addr + 5;
-+
 +	memset(fsl_comp->virt_addr, 0, FSL_QDMA_BASE_BUFFER_SIZE);
 +	/* Head Command Descriptor(Frame Descriptor) */
-+	ccdf->addr = fsl_comp->bus_addr + 16;
++	qdma_ccdf_addr_set64(ccdf, fsl_comp->bus_addr + 16);
-+	ccdf->format = 1; /* Compound S/G format */
++	qdma_ccdf_set_format(ccdf, qdma_ccdf_get_offset(ccdf));
 +	/* Status notification is enqueued to status queue. */
-+	ccdf->ser = 1;
++	qdma_ccdf_set_ser(ccdf, qdma_ccdf_get_status(ccdf));
 +
 +	/* Compound Command Descriptor(Frame List Table) */
-+	csgf_desc->addr = fsl_comp->bus_addr + 64;
++	qdma_csgf_addr_set64(csgf_desc, fsl_comp->bus_addr + 64);
 +	/* It must be 32 as Compound S/G Descriptor */
-+	csgf_desc->length = 32;
++	qdma_csgf_set_len(csgf_desc, 32);
 +
 +	sg_block = fsl_comp->sg_block;
-+	csgf_src->addr = sg_block->bus_addr;
++	qdma_csgf_addr_set64(csgf_src, sg_block->bus_addr);
 +	/* This entry link to the s/g entry. */
-+	csgf_src->e = FSL_QDMA_E_SG_TABLE;
++	qdma_csgf_set_e(csgf_src, 32);
 +
 +	temp = sg_block + fsl_comp->sg_block_src;
-+	csgf_dest->addr = temp->bus_addr;
++	qdma_csgf_addr_set64(csgf_dest, temp->bus_addr);
 +	/* This entry is the last entry. */
-+	csgf_dest->f = FSL_QDMA_F_LAST_ENTRY;
++	qdma_csgf_set_f(csgf_dest, 32);
 +	/* This entry link to the s/g entry. */
-+	csgf_dest->e = FSL_QDMA_E_SG_TABLE;
++	qdma_csgf_set_e(csgf_dest, 32);
 +
 +	for_each_sg(src_sg, sg, src_nents, i) {
 +		temp = sg_block + i / (FSL_QDMA_EXPECT_SG_ENTRY_NUM - 1);
 +		csgf_sg = (struct fsl_qdma_csgf *)temp->virt_addr +
 +			  i % (FSL_QDMA_EXPECT_SG_ENTRY_NUM - 1);
-+		csgf_sg->addr = sg_dma_address(sg);
++		qdma_csgf_addr_set64(csgf_sg, sg_dma_address(sg));
-+		csgf_sg->length = sg_dma_len(sg);
++		qdma_csgf_set_len(csgf_sg, sg_dma_len(sg));
 +		total_src_len += sg_dma_len(sg);
 +
 +		if (i == src_nents - 1)
-+			csgf_sg->f = FSL_QDMA_F_LAST_ENTRY;
++			qdma_csgf_set_f(csgf_sg, sg_dma_len(sg));
 +		if (i % (FSL_QDMA_EXPECT_SG_ENTRY_NUM - 1) ==
 +		    FSL_QDMA_EXPECT_SG_ENTRY_NUM - 2) {
 +			csgf_sg = (struct fsl_qdma_csgf *)temp->virt_addr +
 +				  FSL_QDMA_EXPECT_SG_ENTRY_NUM - 1;
 +			temp = sg_block +
 +				i / (FSL_QDMA_EXPECT_SG_ENTRY_NUM - 1) + 1;
-+			csgf_sg->addr = temp->bus_addr;
++			qdma_csgf_addr_set64(csgf_sg, temp->bus_addr);
-+			csgf_sg->e = FSL_QDMA_E_SG_TABLE;
++			qdma_csgf_set_e(csgf_sg, sg_dma_len(sg));
 +		}
 +	}
 +
@@ -3545,20 +3591,20 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +		temp = sg_block + i / (FSL_QDMA_EXPECT_SG_ENTRY_NUM - 1);
 +		csgf_sg = (struct fsl_qdma_csgf *)temp->virt_addr +
 +			  i % (FSL_QDMA_EXPECT_SG_ENTRY_NUM - 1);
-+		csgf_sg->addr = sg_dma_address(sg);
++		qdma_csgf_addr_set64(csgf_sg, sg_dma_address(sg));
-+		csgf_sg->length = sg_dma_len(sg);
++		qdma_csgf_set_len(csgf_sg, sg_dma_len(sg));
 +		total_dst_len += sg_dma_len(sg);
 +
 +		if (i == dst_nents - 1)
-+			csgf_sg->f = FSL_QDMA_F_LAST_ENTRY;
++			qdma_csgf_set_f(csgf_sg, sg_dma_len(sg));
 +		if (i % (FSL_QDMA_EXPECT_SG_ENTRY_NUM - 1) ==
 +		    FSL_QDMA_EXPECT_SG_ENTRY_NUM - 2) {
 +			csgf_sg = (struct fsl_qdma_csgf *)temp->virt_addr +
 +				  FSL_QDMA_EXPECT_SG_ENTRY_NUM - 1;
 +			temp = sg_block +
 +				i / (FSL_QDMA_EXPECT_SG_ENTRY_NUM - 1) + 1;
-+			csgf_sg->addr = temp->bus_addr;
++			qdma_csgf_addr_set64(csgf_sg, temp->bus_addr);
-+			csgf_sg->e = FSL_QDMA_E_SG_TABLE;
++			qdma_csgf_set_e(csgf_sg, sg_dma_len(sg));
 +		}
 +	}
 +
@@ -3566,12 +3612,10 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +		dev_err(&fsl_comp->qchan->vchan.chan.dev->device,
 +			"The data length for src and dst isn't match.\n");
 +
-+	csgf_src->length = total_src_len;
++	qdma_csgf_set_len(csgf_src, total_src_len);
-+	csgf_dest->length = total_dst_len;
++	qdma_csgf_set_len(csgf_dest, total_dst_len);
 +
 +	/* Descriptor Buffer */
-+	sdf->cmd = FSL_QDMA_CMD_RWTTYPE << FSL_QDMA_CMD_RWTTYPE_OFFSET;
-+	ddf->cmd = FSL_QDMA_CMD_RWTTYPE << FSL_QDMA_CMD_RWTTYPE_OFFSET;
 +}
 +
 +/*
@@ -3843,13 +3887,12 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +		if (reg & FSL_QDMA_BSQSR_QE)
 +			return 0;
 +		status_addr = fsl_status->virt_head;
-+		if (status_addr->queue == pre_queue &&
++		if (qdma_ccdf_get_queue(status_addr) == pre_queue &&
-+			status_addr->addr == pre_addr)
++			qdma_ccdf_addr_get64(status_addr) == pre_addr)
 +			duplicate = 1;
-+
++		i = qdma_ccdf_get_queue(status_addr);
-+		i = status_addr->queue;
++		pre_queue = qdma_ccdf_get_queue(status_addr);
-+		pre_queue = status_addr->queue;
++		pre_addr = qdma_ccdf_addr_get64(status_addr);
-+		pre_addr = status_addr->addr;
 +		temp_queue = fsl_queue + i;
 +		spin_lock(&temp_queue->queue_lock);
 +		if (list_empty(&temp_queue->comp_used)) {
@@ -3865,8 +3908,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +							list);
 +			csgf_src = (struct fsl_qdma_csgf *)fsl_comp->virt_addr
 +							   + 2;
-+			if (fsl_comp->bus_addr + 16 !=
++			if (fsl_comp->bus_addr + 16 != pre_addr) {
-+					(dma_addr_t)status_addr->addr) {
 +				if (duplicate)
 +					duplicate_handle = 1;
 +				else {
@@ -3879,7 +3921,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +			if (duplicate_handle) {
 +			reg = qdma_readl(fsl_qdma, block + FSL_QDMA_BSQMR);
 +			reg |= FSL_QDMA_BSQMR_DI;
-+			status_addr->addr = 0x0;
++			qdma_ccdf_addr_set64(status_addr, 0x0);
 +			fsl_status->virt_head++;
 +			if (fsl_status->virt_head == fsl_status->cq
 +						   + fsl_status->n_cq)
@@ -3892,7 +3934,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +
 +		reg = qdma_readl(fsl_qdma, block + FSL_QDMA_BSQMR);
 +		reg |= FSL_QDMA_BSQMR_DI;
-+		status_addr->addr = 0x0;
++		qdma_ccdf_addr_set64(status_addr, 0x0);
 +		fsl_status->virt_head++;
 +		if (fsl_status->virt_head == fsl_status->cq + fsl_status->n_cq)
 +			fsl_status->virt_head = fsl_status->cq;

target/linux/layerscape/patches-4.9/806-flextimer-support-layerscape.patch

@@ -1,9 +1,9 @@
-From 76cd2ef6b69b67c09480a3248f7b910897f0bb2f Mon Sep 17 00:00:00 2001
+From b92e223750a07b28f175eae97d5ce3978df41be8 Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Mon, 25 Sep 2017 12:13:12 +0800
+Date: Wed, 17 Jan 2018 15:32:05 +0800
-Subject: [PATCH] flextimer: support layerscape
+Subject: [PATCH 18/30] flextimer: support layerscape
 
-This is a integrated patch for layerscape flextimer support.
+This is an integrated patch for layerscape flextimer support.
 
 Signed-off-by: Wang Dongsheng <dongsheng.wang@nxp.com>
 Signed-off-by: Meng Yi <meng.yi@nxp.com>

target/linux/layerscape/patches-4.9/807-gpu-support-layerscape.patch

@@ -1,15 +1,15 @@
-From 4278a546526094dd57bfa3cf7ae2bf34092246db Mon Sep 17 00:00:00 2001
+From 177f92a14d8177124f37db0fafc11182e2dcdd62 Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Mon, 25 Sep 2017 12:10:01 +0800
+Date: Wed, 17 Jan 2018 15:33:05 +0800
-Subject: [PATCH] gpu: support layerscape
+Subject: [PATCH 19/30] gpu: support layerscape
 
-This is a integrated patch for layerscape dcu support.
+This is an integrated patch for layerscape dcu support.
 
 Signed-off-by: Alison Wang <b18965@freescale.com>
 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 ---
- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 18 ++++++++++++++++--
+ drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 15 ++++++++++++++-
- 1 file changed, 16 insertions(+), 2 deletions(-)
+ 1 file changed, 14 insertions(+), 1 deletion(-)
 
 --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
 +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c

target/linux/layerscape/patches-4.9/808-guts-support-layerscape.patch

@@ -1,51 +1,20 @@
-From d51e307e4ecf51832c9e3bc30acb5dbd559d5f4d Mon Sep 17 00:00:00 2001
+From 45b0e1589b25ea3106a8c8d18bf653fde95baa9f Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Mon, 25 Sep 2017 12:19:34 +0800
+Date: Wed, 17 Jan 2018 15:34:22 +0800
-Subject: [PATCH] guts: support layerscape
+Subject: [PATCH 20/30] guts: support layerscape
 
-This is a integrated patch for layerscape guts support.
+This is an integrated patch for layerscape guts support.
 
 Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
 Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 ---
- drivers/base/soc.c       |  12 ++-
  drivers/soc/fsl/guts.c   | 238 +++++++++++++++++++++++++++++++++++++++++++++++
  include/linux/fsl/guts.h | 125 +++++++++++++++----------
- 3 files changed, 323 insertions(+), 52 deletions(-)
+ 2 files changed, 315 insertions(+), 48 deletions(-)
  create mode 100644 drivers/soc/fsl/guts.c
 
---- a/drivers/base/soc.c
-+++ b/drivers/base/soc.c
-@@ -167,19 +167,23 @@ static int soc_device_match_one(struct d
- 	const struct soc_device_attribute *match = arg;
- 
- 	if (match->machine &&
--	    !glob_match(match->machine, soc_dev->attr->machine))
-+	    (!soc_dev->attr->machine ||
-+	     !glob_match(match->machine, soc_dev->attr->machine)))
- 		return 0;
- 
- 	if (match->family &&
--	    !glob_match(match->family, soc_dev->attr->family))
-+	    (!soc_dev->attr->family ||
-+	     !glob_match(match->family, soc_dev->attr->family)))
- 		return 0;
- 
- 	if (match->revision &&
--	    !glob_match(match->revision, soc_dev->attr->revision))
-+	    (!soc_dev->attr->revision ||
-+	     !glob_match(match->revision, soc_dev->attr->revision)))
- 		return 0;
- 
- 	if (match->soc_id &&
--	    !glob_match(match->soc_id, soc_dev->attr->soc_id))
-+	    (!soc_dev->attr->soc_id ||
-+	     !glob_match(match->soc_id, soc_dev->attr->soc_id)))
- 		return 0;
- 
- 	return 1;
 --- /dev/null
 +++ b/drivers/soc/fsl/guts.c
 @@ -0,0 +1,238 @@

target/linux/layerscape/patches-4.9/809-i2c-support-layerscape.patch

@@ -1,21 +1,180 @@
-From 3c5032fe34f1af50e9e5fe58d40bf93c1717302f Mon Sep 17 00:00:00 2001
+From 659aa30c59fb188b533a7edcb9bd38ac007a2739 Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Mon, 25 Sep 2017 12:19:53 +0800
+Date: Wed, 17 Jan 2018 15:35:11 +0800
-Subject: [PATCH] i2c: support layerscape
+Subject: [PATCH 21/30] i2c: support layerscape
 
-This is a integrated patch for layerscape i2c support.
+This is an integrated patch for layerscape i2c support.
 
 Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
 Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 ---
- drivers/i2c/busses/i2c-imx.c        | 10 ++++++++-
+ drivers/i2c/busses/i2c-imx.c        | 195 +++++++++++++++++++++++++++++++++++-
- drivers/i2c/muxes/i2c-mux-pca954x.c | 43 +++++++++++++++++++++++++++++++++++++
+ drivers/i2c/muxes/i2c-mux-pca954x.c |  43 ++++++++
- 2 files changed, 52 insertions(+), 1 deletion(-)
+ 2 files changed, 237 insertions(+), 1 deletion(-)
 
 --- a/drivers/i2c/busses/i2c-imx.c
 +++ b/drivers/i2c/busses/i2c-imx.c
-@@ -889,6 +889,14 @@ static int i2c_imx_xfer(struct i2c_adapt
+@@ -53,6 +53,11 @@
+ #include <linux/pm_runtime.h>
+ #include <linux/sched.h>
+ #include <linux/slab.h>
++#include <linux/gpio.h>
++#include <linux/of_address.h>
++#include <linux/of.h>
++#include <linux/of_device.h>
++#include <linux/libata.h>
+ 
+ /* This will be the driver name the kernel reports */
+ #define DRIVER_NAME "imx-i2c"
+@@ -117,6 +122,54 @@
+ 
+ #define I2C_PM_TIMEOUT		10 /* ms */
+ 
++enum pinmux_endian_type {
++	BIG_ENDIAN,
++	LITTLE_ENDIAN,
++};
++
++struct pinmux_cfg {
++	enum pinmux_endian_type endian; /* endian of RCWPMUXCR0 */
++	u32 pmuxcr_offset;
++	u32 pmuxcr_set_bit;		    /* pin mux of RCWPMUXCR0 */
++};
++
++static struct pinmux_cfg ls1012a_pinmux_cfg = {
++	.endian = BIG_ENDIAN,
++	.pmuxcr_offset = 0x430,
++	.pmuxcr_set_bit = 0x10,
++};
++
++static struct pinmux_cfg ls1043a_pinmux_cfg = {
++	.endian = BIG_ENDIAN,
++	.pmuxcr_offset = 0x40C,
++	.pmuxcr_set_bit = 0x10,
++};
++
++static struct pinmux_cfg ls1046a_pinmux_cfg = {
++	.endian = BIG_ENDIAN,
++	.pmuxcr_offset = 0x40C,
++	.pmuxcr_set_bit = 0x80000000,
++};
++
++static const struct of_device_id pinmux_of_match[] = {
++	{ .compatible = "fsl,ls1012a-vf610-i2c", .data = &ls1012a_pinmux_cfg},
++	{ .compatible = "fsl,ls1043a-vf610-i2c", .data = &ls1043a_pinmux_cfg},
++	{ .compatible = "fsl,ls1046a-vf610-i2c", .data = &ls1046a_pinmux_cfg},
++	{},
++};
++MODULE_DEVICE_TABLE(of, pinmux_of_match);
++
++/* The SCFG, Supplemental Configuration Unit, provides SoC specific
++ * configuration and status registers for the device. There is a
++ * SDHC IO VSEL control register on SCFG for some platforms. It's
++ * used to support SDHC IO voltage switching.
++ */
++static const struct of_device_id scfg_device_ids[] = {
++	{ .compatible = "fsl,ls1012a-scfg", },
++	{ .compatible = "fsl,ls1043a-scfg", },
++	{ .compatible = "fsl,ls1046a-scfg", },
++	{}
++};
+ /*
+  * sorted list of clock divider, register value pairs
+  * taken from table 26-5, p.26-9, Freescale i.MX
+@@ -210,6 +263,12 @@ struct imx_i2c_struct {
+ 	struct pinctrl_state *pinctrl_pins_gpio;
+ 
+ 	struct imx_i2c_dma	*dma;
++	int			layerscape_bus_recover;
++	int 			gpio;
++	int			need_set_pmuxcr;
++	int			pmuxcr_set;
++	int			pmuxcr_endian;
++	void __iomem		*pmuxcr_addr;
+ };
+ 
+ static const struct imx_i2c_hwdata imx1_i2c_hwdata = {
+@@ -879,6 +938,78 @@ static int i2c_imx_read(struct imx_i2c_s
+ 	return 0;
+ }
+ 
++/*
++ * Based on the I2C specification, if the data line (SDA) is
++ * stuck low, the master should send nine  * clock pulses.
++ * The I2C slave device that held the bus low should release it
++ * sometime within  * those nine clocks. Due to this erratum,
++ * the I2C controller cannot generate nine clock pulses.
++ */
++static int i2c_imx_recovery_for_layerscape(struct imx_i2c_struct *i2c_imx)
++{
++	u32 pmuxcr = 0;
++	int ret;
++	unsigned int i, temp;
++
++	/* configure IICx_SCL/GPIO pin as a GPIO */
++	if (i2c_imx->need_set_pmuxcr == 1) {
++		pmuxcr = ioread32be(i2c_imx->pmuxcr_addr);
++		if (i2c_imx->pmuxcr_endian == BIG_ENDIAN)
++			iowrite32be(i2c_imx->pmuxcr_set|pmuxcr,
++				    i2c_imx->pmuxcr_addr);
++		else
++			iowrite32(i2c_imx->pmuxcr_set|pmuxcr,
++				  i2c_imx->pmuxcr_addr);
++	}
++
++	ret = gpio_request(i2c_imx->gpio, i2c_imx->adapter.name);
++	if (ret) {
++		dev_err(&i2c_imx->adapter.dev,
++			"can't get gpio: %d\n", ret);
++		return ret;
++	}
++
++	/* Configure GPIO pin as an output and open drain. */
++	gpio_direction_output(i2c_imx->gpio, 1);
++	udelay(10);
++
++	/* Write data to generate 9 pulses */
++	for (i = 0; i < 9; i++) {
++		gpio_set_value(i2c_imx->gpio, 1);
++		udelay(10);
++		gpio_set_value(i2c_imx->gpio, 0);
++		udelay(10);
++	}
++	/* ensure that the last level sent is always high */
++	gpio_set_value(i2c_imx->gpio, 1);
++
++	/*
++	 * Set I2Cx_IBCR = 0h00 to generate a STOP and then
++	 * set I2Cx_IBCR = 0h80 to reset
++	 */
++	temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
++	temp &= ~(I2CR_MSTA | I2CR_MTX);
++	imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
++
++	/* Restore the saved value of the register SCFG_RCWPMUXCR0 */
++	if (i2c_imx->need_set_pmuxcr == 1) {
++		if (i2c_imx->pmuxcr_endian == BIG_ENDIAN)
++			iowrite32be(pmuxcr, i2c_imx->pmuxcr_addr);
++		else
++			iowrite32(pmuxcr, i2c_imx->pmuxcr_addr);
++	}
++	/*
++	 * Set I2C_IBSR[IBAL] to clear the IBAL bit if-
++	 * I2C_IBSR[IBAL] = 1
++	 */
++	temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR);
++	if (temp & I2SR_IAL) {
++		temp &= ~I2SR_IAL;
++		imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2SR);
++	}
++	return 0;
++}
++
+ static int i2c_imx_xfer(struct i2c_adapter *adapter,
+ 						struct i2c_msg *msgs, int num)
+ {
+@@ -889,6 +1020,19 @@ static int i2c_imx_xfer(struct i2c_adapt
  
  	dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
  
@@ -24,13 +183,81 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +	 * before switching to master mode and attempting a Start cycle
 +	 */
 +	result =  i2c_imx_bus_busy(i2c_imx, 0);
-+	if (result)
++	if (result) {
-+		goto out;
++		/* timeout */
++		if ((result == -ETIMEDOUT) && (i2c_imx->layerscape_bus_recover == 1))
++			i2c_imx_recovery_for_layerscape(i2c_imx);
++		else
++			goto out;
++	}
 +
  	result = pm_runtime_get_sync(i2c_imx->adapter.dev.parent);
  	if (result < 0)
  		goto out;
-@@ -1100,7 +1108,7 @@ static int i2c_imx_probe(struct platform
+@@ -1031,6 +1175,50 @@ static int i2c_imx_init_recovery_info(st
+ 	return 0;
+ }
+ 
++/*
++ * switch SCL and SDA to their GPIO function and do some bitbanging
++ * for bus recovery.
++ * There are platforms such as Layerscape that don't support pinctrl, so add
++ * workaround for layerscape, it has no effect for other platforms.
++ */
++static int i2c_imx_init_recovery_for_layerscape(
++		struct imx_i2c_struct *i2c_imx,
++		struct platform_device *pdev)
++{
++	const struct of_device_id *of_id;
++	struct device_node *np		= pdev->dev.of_node;
++	struct pinmux_cfg		*pinmux_cfg;
++	struct device_node *scfg_node;
++	void __iomem *scfg_base = NULL;
++
++	i2c_imx->gpio = of_get_named_gpio(np, "fsl-scl-gpio", 0);
++	if (!gpio_is_valid(i2c_imx->gpio)) {
++		dev_info(&pdev->dev, "fsl-scl-gpio not found\n");
++		return 0;
++	}
++	pinmux_cfg = devm_kzalloc(&pdev->dev, sizeof(*pinmux_cfg), GFP_KERNEL);
++	if (!pinmux_cfg)
++		return -ENOMEM;
++
++	i2c_imx->need_set_pmuxcr = 0;
++	of_id = of_match_node(pinmux_of_match, np);
++	if (of_id) {
++		pinmux_cfg = (struct pinmux_cfg *)of_id->data;
++		i2c_imx->pmuxcr_endian = pinmux_cfg->endian;
++		i2c_imx->pmuxcr_set = pinmux_cfg->pmuxcr_set_bit;
++		scfg_node = of_find_matching_node(NULL, scfg_device_ids);
++		if (scfg_node) {
++			scfg_base = of_iomap(scfg_node, 0);
++			if (scfg_base) {
++				i2c_imx->pmuxcr_addr = scfg_base + pinmux_cfg->pmuxcr_offset;
++				i2c_imx->need_set_pmuxcr = 1;
++			}
++		}
++	}
++	i2c_imx->layerscape_bus_recover = 1;
++	return 0;
++}
++
+ static u32 i2c_imx_func(struct i2c_adapter *adapter)
+ {
+ 	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL
+@@ -1086,6 +1274,11 @@ static int i2c_imx_probe(struct platform
+ 	i2c_imx->adapter.dev.of_node	= pdev->dev.of_node;
+ 	i2c_imx->base			= base;
+ 
++	/* Init optional bus recovery for layerscape */
++	ret = i2c_imx_init_recovery_for_layerscape(i2c_imx, pdev);
++	if (ret)
++		return ret;
++
+ 	/* Get I2C clock */
+ 	i2c_imx->clk = devm_clk_get(&pdev->dev, NULL);
+ 	if (IS_ERR(i2c_imx->clk)) {
+@@ -1100,7 +1293,7 @@ static int i2c_imx_probe(struct platform
  	}
  
  	/* Request IRQ */

target/linux/layerscape/patches-4.9/810-iommu-support-layerscape.patch

@@ -1,9 +1,9 @@
-From 152f316e7829f6aeb3a36009e7e5ec0f1d97d770 Mon Sep 17 00:00:00 2001
+From 0a6c701f92e1aa368c44632fa0985e92703354ed Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Wed, 27 Sep 2017 10:33:26 +0800
+Date: Wed, 17 Jan 2018 15:35:48 +0800
-Subject: [PATCH] iommu: support layerscape
+Subject: [PATCH 22/30] iommu: support layerscape
 
-This is a integrated patch for layerscape smmu support.
+This is an integrated patch for layerscape smmu support.
 
 Signed-off-by: Eric Auger <eric.auger@redhat.com>
 Signed-off-by: Robin Murphy <robin.murphy@arm.com>
@@ -12,7 +12,7 @@ Signed-off-by: Sunil Goutham <sgoutham@cavium.com>
 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 ---
  drivers/iommu/amd_iommu.c    |  56 ++++++----
- drivers/iommu/arm-smmu-v3.c  | 117 ++++++++++++++-------
+ drivers/iommu/arm-smmu-v3.c  | 111 ++++++++++++++------
  drivers/iommu/arm-smmu.c     | 100 +++++++++++++++---
  drivers/iommu/dma-iommu.c    | 242 ++++++++++++++++++++++++++++++++++++-------
  drivers/iommu/intel-iommu.c  |  92 ++++++++++++----
@@ -21,7 +21,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  drivers/iommu/mtk_iommu_v1.c |   2 +
  include/linux/dma-iommu.h    |  11 ++
  include/linux/iommu.h        |  55 +++++++---
- 10 files changed, 739 insertions(+), 157 deletions(-)
+ 10 files changed, 739 insertions(+), 151 deletions(-)
 
 --- a/drivers/iommu/amd_iommu.c
 +++ b/drivers/iommu/amd_iommu.c

target/linux/layerscape/patches-4.9/811-irqchip-support-layerscape.patch

@@ -1,9 +1,9 @@
-From 1d596855b596db88f10b12a1be6fd19e249be170 Mon Sep 17 00:00:00 2001
+From 5a5ff01c790d49c0f6fd247f68f2fd9a2128ea91 Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Mon, 25 Sep 2017 12:13:29 +0800
+Date: Wed, 17 Jan 2018 15:36:28 +0800
-Subject: [PATCH] irqchip: support layerscape
+Subject: [PATCH 23/30] irqchip: support layerscape
 
-This is a integrated patch for layerscape gic support.
+This is an integrated patch for layerscape gic support.
 
 Signed-off-by: Eric Auger <eric.auger@redhat.com>
 Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>

target/linux/layerscape/patches-4.9/812-mmc-layerscape-support.patch

@@ -1,9 +1,9 @@
-From b31046c51c72232363711f0c623df08bf28c37e4 Mon Sep 17 00:00:00 2001
+From 4215d5757595e7ec7ca146c2b901beb177f415d8 Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Mon, 25 Sep 2017 12:21:30 +0800
+Date: Wed, 17 Jan 2018 15:37:13 +0800
-Subject: [PATCH] mmc: layerscape support
+Subject: [PATCH 24/30] mmc: layerscape support
 
-This is a integrated patch for layerscape mmc support.
+This is an integrated patch for layerscape mmc support.
 
 Adrian Hunter <adrian.hunter@intel.com>
 Jaehoon Chung <jh80.chung@samsung.com>
@@ -12,10 +12,10 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 ---
  drivers/mmc/host/Kconfig          |   1 +
  drivers/mmc/host/sdhci-esdhc.h    |  52 +++++---
- drivers/mmc/host/sdhci-of-esdhc.c | 251 ++++++++++++++++++++++++++++++++++++--
+ drivers/mmc/host/sdhci-of-esdhc.c | 265 ++++++++++++++++++++++++++++++++++++--
  drivers/mmc/host/sdhci.c          |  45 ++++---
  drivers/mmc/host/sdhci.h          |   3 +
- 5 files changed, 306 insertions(+), 46 deletions(-)
+ 5 files changed, 320 insertions(+), 46 deletions(-)
 
 --- a/drivers/mmc/host/Kconfig
 +++ b/drivers/mmc/host/Kconfig
@@ -253,9 +253,16 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  	/* Workaround to reduce the clock frequency for p1010 esdhc */
  	if (of_find_compatible_node(NULL, NULL, "fsl,p1010-esdhc")) {
  		if (clock > 20000000)
-@@ -441,8 +503,8 @@ static void esdhc_of_set_clock(struct sd
+@@ -440,9 +502,15 @@ static void esdhc_of_set_clock(struct sd
+ 			clock -= 5000000;
  	}
  
++	/* Workaround to reduce the clock frequency for ls1021a esdhc */
++	if (of_find_compatible_node(NULL, NULL, "fsl,ls1021a-esdhc")) {
++		if (clock == 50000000)
++			clock = 46500000;
++	}
++
  	temp = sdhci_readl(host, ESDHC_SYSTEM_CONTROL);
 -	temp &= ~(ESDHC_CLOCK_IPGEN | ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN
 -		| ESDHC_CLOCK_MASK);
@@ -264,7 +271,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  	sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL);
  
  	while (host->max_clk / pre_div / 16 > clock && pre_div < 256)
-@@ -462,7 +524,20 @@ static void esdhc_of_set_clock(struct sd
+@@ -462,7 +530,20 @@ static void esdhc_of_set_clock(struct sd
  		| (div << ESDHC_DIVIDER_SHIFT)
  		| (pre_div << ESDHC_PREDIV_SHIFT));
  	sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL);
@@ -286,7 +293,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  }
  
  static void esdhc_pltfm_set_bus_width(struct sdhci_host *host, int width)
-@@ -487,6 +562,33 @@ static void esdhc_pltfm_set_bus_width(st
+@@ -487,12 +568,136 @@ static void esdhc_pltfm_set_bus_width(st
  	sdhci_writel(host, ctrl, ESDHC_PROCTL);
  }
  
@@ -319,11 +326,20 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +
  static void esdhc_reset(struct sdhci_host *host, u8 mask)
  {
++	u32 val;
++
  	sdhci_reset(host, mask);
-@@ -495,6 +597,95 @@ static void esdhc_reset(struct sdhci_hos
- 	sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
- }
  
+ 	sdhci_writel(host, host->ier, SDHCI_INT_ENABLE);
+ 	sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
++
++	if (mask & SDHCI_RESET_ALL) {
++		val = sdhci_readl(host, ESDHC_TBCTL);
++		val &= ~ESDHC_TB_EN;
++		sdhci_writel(host, val, ESDHC_TBCTL);
++	}
++}
++
 +/* The SCFG, Supplemental Configuration Unit, provides SoC specific
 + * configuration and status registers for the device. There is a
 + * SDHC IO VSEL control register on SCFG for some platforms. It's
@@ -411,12 +427,10 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +	esdhc_clock_enable(host, true);
 +
 +	return sdhci_execute_tuning(mmc, opcode);
-+}
+ }
-+
+ 
  #ifdef CONFIG_PM_SLEEP
- static u32 esdhc_proctl;
+@@ -575,10 +780,19 @@ static const struct sdhci_pltfm_data sdh
- static int esdhc_of_suspend(struct device *dev)
-@@ -575,10 +766,19 @@ static const struct sdhci_pltfm_data sdh
  	.ops = &sdhci_esdhc_le_ops,
  };
  
@@ -436,7 +450,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  	u16 host_ver;
  
  	pltfm_host = sdhci_priv(host);
-@@ -588,6 +788,36 @@ static void esdhc_init(struct platform_d
+@@ -588,6 +802,36 @@ static void esdhc_init(struct platform_d
  	esdhc->vendor_ver = (host_ver & SDHCI_VENDOR_VER_MASK) >>
  			     SDHCI_VENDOR_VER_SHIFT;
  	esdhc->spec_ver = host_ver & SDHCI_SPEC_VER_MASK;
@@ -473,7 +487,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  }
  
  static int sdhci_esdhc_probe(struct platform_device *pdev)
-@@ -610,6 +840,11 @@ static int sdhci_esdhc_probe(struct plat
+@@ -610,6 +854,11 @@ static int sdhci_esdhc_probe(struct plat
  	if (IS_ERR(host))
  		return PTR_ERR(host);
  

target/linux/layerscape/patches-4.9/813-qe-support-layerscape.patch

@@ -1,9 +1,9 @@
-From adb377019768396f339010ebb9e80fa8384992f7 Mon Sep 17 00:00:00 2001
+From 2ab544f7e943c63c300933d34815e78451cc0c26 Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Mon, 25 Sep 2017 12:20:30 +0800
+Date: Wed, 17 Jan 2018 15:37:56 +0800
-Subject: [PATCH] qe: support layerscape
+Subject: [PATCH 25/30] qe: support layerscape
 
-This is a integrated patch for layerscape qe support.
+This is an integrated patch for layerscape qe support.
 
 Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>

target/linux/layerscape/patches-4.9/814-rtc-support-layerscape.patch

@@ -1,9 +1,9 @@
-From 7e7944c484954ff7b5d53047194e59bfffd1540a Mon Sep 17 00:00:00 2001
+From bda12381598c3df43f4e60362a8cd4af58b7f5b0 Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Mon, 25 Sep 2017 12:20:55 +0800
+Date: Wed, 17 Jan 2018 15:38:54 +0800
-Subject: [PATCH] rtc: support layerscape
+Subject: [PATCH 26/30] rtc: support layerscape
 
-This is a integrated patch for layerscape rtc support.
+This is an integrated patch for layerscape rtc support.
 
 Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>

target/linux/layerscape/patches-4.9/815-spi-support-layerscape.patch

@@ -1,9 +1,9 @@
-From a12f522b48a8cb637c1c026b46a76b2ef7983f8d Mon Sep 17 00:00:00 2001
+From 027b679f248f15dea36c6cd6782d6643e2151057 Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Mon, 25 Sep 2017 12:12:41 +0800
+Date: Wed, 17 Jan 2018 15:39:43 +0800
-Subject: [PATCH] spi: support layerscape
+Subject: [PATCH 27/30] spi: support layerscape
 
-This is a integrated patch for layerscape dspi support.
+This is an integrated patch for layerscape dspi support.
 
 Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
 Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
@@ -11,9 +11,8 @@ Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
 Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 ---
- drivers/spi/Kconfig        |   1 +
  drivers/spi/spi-fsl-dspi.c | 309 ++++++++++++++++++++++++++++++++++++++++++++-
- 2 files changed, 305 insertions(+), 5 deletions(-)
+ 1 file changed, 304 insertions(+), 5 deletions(-)
 
 --- a/drivers/spi/spi-fsl-dspi.c
 +++ b/drivers/spi/spi-fsl-dspi.c

target/linux/layerscape/patches-4.9/816-tty-serial-support-layerscape.patch

@@ -1,9 +1,9 @@
-From 469daac0faff06209bc1d1390571b860d153a82b Mon Sep 17 00:00:00 2001
+From c35aec61e5bb0faafb2847a0d750ebd7345a4b0f Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Wed, 27 Sep 2017 10:33:47 +0800
+Date: Wed, 17 Jan 2018 15:40:24 +0800
-Subject: [PATCH] tty: serial: support layerscape
+Subject: [PATCH 28/30] tty: serial: support layerscape
 
-This is a integrated patch for layerscape uart support.
+This is an integrated patch for layerscape uart support.
 
 Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
 Signed-off-by: Yuan Yao <yao.yuan@nxp.com>

target/linux/layerscape/patches-4.9/817-usb-support-layerscape.patch

@@ -1,9 +1,9 @@
-From b14460ee524a34d3b94b44032b52155c4cd708e5 Mon Sep 17 00:00:00 2001
+From a2a97f0d2c07a772899ca09967547bea6c9124c5 Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Wed, 27 Sep 2017 10:34:07 +0800
+Date: Wed, 17 Jan 2018 15:46:03 +0800
-Subject: [PATCH] usb: support layerscape
+Subject: [PATCH 29/30] usb: support layerscape
 
-This is a integrated patch for layerscape usb support.
+This is an integrated patch for layerscape usb support.
 
 Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com>
 Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
@@ -15,29 +15,68 @@ Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com>
 Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 ---
- drivers/net/usb/r8152.c               |   4 +
+ drivers/net/usb/cdc_ether.c           |   8 +
+ drivers/net/usb/r8152.c               |   6 +
  drivers/usb/common/common.c           |  50 ++++++
  drivers/usb/core/hub.c                |   8 +
- drivers/usb/dwc3/core.c               | 235 ++++++++++++++++++++++++++-
+ drivers/usb/dwc3/core.c               | 243 ++++++++++++++++++++++++++++-
- drivers/usb/dwc3/core.h               |  46 +++++-
+ drivers/usb/dwc3/core.h               |  51 ++++++-
- drivers/usb/dwc3/host.c               |  15 +-
+ drivers/usb/dwc3/ep0.c                |   4 +-
+ drivers/usb/dwc3/gadget.c             |   7 +
+ drivers/usb/dwc3/host.c               |  24 ++-
  drivers/usb/gadget/udc/fsl_udc_core.c |  46 +++---
  drivers/usb/gadget/udc/fsl_usb2_udc.h |  16 +-
  drivers/usb/host/Kconfig              |   2 +-
- drivers/usb/host/ehci-fsl.c           | 289 +++++++++++++++++++++++++++++++---
+ drivers/usb/host/ehci-fsl.c           | 279 +++++++++++++++++++++++++++++++---
  drivers/usb/host/ehci-fsl.h           |   3 +
- drivers/usb/host/ehci-hub.c           |   2 +
+ drivers/usb/host/ehci-hub.c           |   4 +
- drivers/usb/host/ehci.h               |   5 +
+ drivers/usb/host/ehci.h               |   9 ++
  drivers/usb/host/fsl-mph-dr-of.c      |  12 ++
+ drivers/usb/host/xhci-plat.c          |  10 ++
+ drivers/usb/host/xhci-ring.c          |  29 +++-
+ drivers/usb/host/xhci.c               |  38 ++++-
+ drivers/usb/host/xhci.h               |   5 +-
  drivers/usb/phy/phy-fsl-usb.c         |  59 +++++--
  drivers/usb/phy/phy-fsl-usb.h         |   8 +
  include/linux/usb.h                   |   1 +
  include/linux/usb/of.h                |   2 +
- 18 files changed, 730 insertions(+), 73 deletions(-)
+ 25 files changed, 836 insertions(+), 88 deletions(-)
 
+--- a/drivers/net/usb/cdc_ether.c
++++ b/drivers/net/usb/cdc_ether.c
+@@ -532,6 +532,7 @@ static const struct driver_info wwan_inf
+ #define LENOVO_VENDOR_ID	0x17ef
+ #define NVIDIA_VENDOR_ID	0x0955
+ #define HP_VENDOR_ID		0x03f0
++#define TPLINK_VENDOR_ID	0x2357
+ 
+ static const struct usb_device_id	products[] = {
+ /* BLACKLIST !!
+@@ -732,6 +733,13 @@ static const struct usb_device_id	produc
+ 			USB_CDC_SUBCLASS_ETHERNET, USB_CDC_PROTO_NONE),
+ 	.driver_info = 0,
+ },
++
++	/* TP-LINK UE300 USB 3.0 Ethernet Adapters (based on Realtek RTL8153) */
++{
++	USB_DEVICE_AND_INTERFACE_INFO(TPLINK_VENDOR_ID, 0x0601, USB_CLASS_COMM,
++			USB_CDC_SUBCLASS_ETHERNET, USB_CDC_PROTO_NONE),
++	.driver_info = 0,
++},
+ 
+ /* WHITELIST!!!
+  *
 --- a/drivers/net/usb/r8152.c
 +++ b/drivers/net/usb/r8152.c
-@@ -1816,6 +1816,10 @@ static int rx_bottom(struct r8152 *tp, i
+@@ -520,6 +520,7 @@ enum rtl8152_flags {
+ #define VENDOR_ID_SAMSUNG		0x04e8
+ #define VENDOR_ID_LENOVO		0x17ef
+ #define VENDOR_ID_NVIDIA		0x0955
++#define VENDOR_ID_TPLINK		0x2357
+ 
+ #define MCU_TYPE_PLA			0x0100
+ #define MCU_TYPE_USB			0x0000
+@@ -1816,6 +1817,10 @@ static int rx_bottom(struct r8152 *tp, i
  			unsigned int pkt_len;
  			struct sk_buff *skb;
  
@@ -48,6 +87,14 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  			pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
  			if (pkt_len < ETH_ZLEN)
  				break;
+@@ -4507,6 +4512,7 @@ static struct usb_device_id rtl8152_tabl
+ 	{REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x7205)},
+ 	{REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x304f)},
+ 	{REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA,  0x09ff)},
++	{REALTEK_USB_DEVICE(VENDOR_ID_TPLINK,  0x0601)},
+ 	{}
+ };
+ 
 --- a/drivers/usb/common/common.c
 +++ b/drivers/usb/common/common.c
 @@ -105,6 +105,56 @@ static const char *const usb_dr_modes[]
@@ -280,7 +327,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  	/* Adjust Frame Length */
  	dwc3_frame_length_adjustment(dwc);
  
-@@ -919,11 +1034,109 @@ static void dwc3_core_exit_mode(struct d
+@@ -919,11 +1034,117 @@ static void dwc3_core_exit_mode(struct d
  	}
  }
  
@@ -325,6 +372,12 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +				&hird_threshold);
 +	dwc->usb3_lpm_capable = device_property_read_bool(dev,
 +				"snps,usb3_lpm_capable");
++	dwc->quirk_reverse_in_out = device_property_read_bool(dev,
++				"snps,quirk_reverse_in_out");
++	dwc->quirk_stop_transfer_in_block = device_property_read_bool(dev,
++				"snps,quirk_stop_transfer_in_block");
++	dwc->quirk_stop_ep_in_u1 = device_property_read_bool(dev,
++				"snps,quirk_stop_ep_in_u1");
 +
 +	dwc->needs_fifo_resize = of_property_read_bool(node, "tx-fifo-resize");
 +
@@ -365,6 +418,8 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +
 +	dwc->tx_de_emphasis_quirk = device_property_read_bool(dev,
 +				"snps,tx_de_emphasis_quirk");
++	dwc->disable_devinit_u1u2_quirk = device_property_read_bool(dev,
++				"snps,disable_devinit_u1u2");
 +	device_property_read_u8(dev, "snps,tx_de_emphasis",
 +				&tx_de_emphasis);
 +	device_property_read_string(dev, "snps,hsphy_interface",
@@ -390,7 +445,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  	struct resource		*res;
  	struct dwc3		*dwc;
  	u8			lpm_nyet_threshold;
-@@ -955,6 +1168,11 @@ static int dwc3_probe(struct platform_de
+@@ -955,6 +1176,11 @@ static int dwc3_probe(struct platform_de
  	dwc->xhci_resources[0].flags = res->flags;
  	dwc->xhci_resources[0].name = res->name;
  
@@ -402,7 +457,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  	res->start += DWC3_GLOBALS_REGS_START;
  
  	/*
-@@ -997,6 +1215,12 @@ static int dwc3_probe(struct platform_de
+@@ -997,6 +1223,12 @@ static int dwc3_probe(struct platform_de
  	dwc->usb3_lpm_capable = device_property_read_bool(dev,
  				"snps,usb3_lpm_capable");
  
@@ -415,7 +470,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  	dwc->disable_scramble_quirk = device_property_read_bool(dev,
  				"snps,disable_scramble_quirk");
  	dwc->u2exit_lfps_quirk = device_property_read_bool(dev,
-@@ -1041,6 +1265,8 @@ static int dwc3_probe(struct platform_de
+@@ -1041,6 +1273,8 @@ static int dwc3_probe(struct platform_de
  	dwc->hird_threshold = hird_threshold
  		| (dwc->is_utmi_l1_suspend << 4);
  
@@ -424,7 +479,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  	platform_set_drvdata(pdev, dwc);
  	dwc3_cache_hwparams(dwc);
  
-@@ -1064,6 +1290,11 @@ static int dwc3_probe(struct platform_de
+@@ -1064,6 +1298,11 @@ static int dwc3_probe(struct platform_de
  	if (ret < 0)
  		goto err1;
  
@@ -506,7 +561,15 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
   * @irq_gadget: peripheral controller's IRQ number
   * @nr_scratch: number of scratch buffers
   * @u1u2: only used on revisions <1.83a for workaround
-@@ -847,6 +878,7 @@ struct dwc3 {
+@@ -829,6 +860,7 @@ struct dwc3_scratchpad_array {
+  * 	1	- -3.5dB de-emphasis
+  * 	2	- No de-emphasis
+  * 	3	- Reserved
++ * @disable_devinit_u1u2_quirk: disable device-initiated U1/U2 request.
+  */
+ struct dwc3 {
+ 	struct usb_ctrlrequest	*ctrl_req;
+@@ -847,6 +879,7 @@ struct dwc3 {
  	spinlock_t		lock;
  
  	struct device		*dev;
@@ -514,7 +577,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  
  	struct platform_device	*xhci;
  	struct resource		xhci_resources[DWC3_XHCI_RESOURCES_NUM];
-@@ -872,6 +904,12 @@ struct dwc3 {
+@@ -872,6 +905,12 @@ struct dwc3 {
  	enum usb_phy_interface	hsphy_mode;
  
  	u32			fladj;
@@ -527,7 +590,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  	u32			irq_gadget;
  	u32			nr_scratch;
  	u32			u1u2;
-@@ -948,9 +986,12 @@ struct dwc3 {
+@@ -948,9 +987,12 @@ struct dwc3 {
  	unsigned		ep0_bounced:1;
  	unsigned		ep0_expect_in:1;
  	unsigned		has_hibernation:1;
@@ -540,7 +603,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  	unsigned		pending_events:1;
  	unsigned		pullups_connected:1;
  	unsigned		setup_packet_pending:1;
-@@ -971,9 +1012,12 @@ struct dwc3 {
+@@ -971,9 +1013,16 @@ struct dwc3 {
  	unsigned		dis_rxdet_inp3_quirk:1;
  	unsigned		dis_u2_freeclk_exists_quirk:1;
  	unsigned		dis_del_phy_power_chg_quirk:1;
@@ -548,11 +611,52 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  
  	unsigned		tx_de_emphasis_quirk:1;
  	unsigned		tx_de_emphasis:2;
++	unsigned		disable_devinit_u1u2_quirk:1;
++	unsigned                quirk_reverse_in_out:1;
++	unsigned                quirk_stop_transfer_in_block:1;
++	unsigned                quirk_stop_ep_in_u1:1;
 +
 +	u16                     imod_interval;
  };
  
  /* -------------------------------------------------------------------------- */
+--- a/drivers/usb/dwc3/ep0.c
++++ b/drivers/usb/dwc3/ep0.c
+@@ -360,9 +360,9 @@ static int dwc3_ep0_handle_status(struct
+ 		if ((dwc->speed == DWC3_DSTS_SUPERSPEED) ||
+ 		    (dwc->speed == DWC3_DSTS_SUPERSPEED_PLUS)) {
+ 			reg = dwc3_readl(dwc->regs, DWC3_DCTL);
+-			if (reg & DWC3_DCTL_INITU1ENA)
++			if ((reg & DWC3_DCTL_INITU1ENA) && !dwc->disable_devinit_u1u2_quirk)
+ 				usb_status |= 1 << USB_DEV_STAT_U1_ENABLED;
+-			if (reg & DWC3_DCTL_INITU2ENA)
++			if ((reg & DWC3_DCTL_INITU2ENA) && !dwc->disable_devinit_u1u2_quirk)
+ 				usb_status |= 1 << USB_DEV_STAT_U2_ENABLED;
+ 		}
+ 
+--- a/drivers/usb/dwc3/gadget.c
++++ b/drivers/usb/dwc3/gadget.c
+@@ -2930,6 +2930,7 @@ static irqreturn_t dwc3_interrupt(int ir
+ int dwc3_gadget_init(struct dwc3 *dwc)
+ {
+ 	int ret, irq;
++	u32	reg;
+ 	struct platform_device *dwc3_pdev = to_platform_device(dwc->dev);
+ 
+ 	irq = platform_get_irq_byname(dwc3_pdev, "peripheral");
+@@ -3044,6 +3045,12 @@ int dwc3_gadget_init(struct dwc3 *dwc)
+ 		goto err5;
+ 	}
+ 
++	if (dwc->disable_devinit_u1u2_quirk) {
++		reg = dwc3_readl(dwc->regs, DWC3_DCTL);
++		reg &= ~(DWC3_DCTL_INITU1ENA | DWC3_DCTL_INITU2ENA);
++		dwc3_writel(dwc->regs, DWC3_DCTL, reg);
++	}
++
+ 	return 0;
+ 
+ err5:
 --- a/drivers/usb/dwc3/host.c
 +++ b/drivers/usb/dwc3/host.c
 @@ -17,6 +17,8 @@
@@ -588,6 +692,22 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  	dwc->xhci = xhci;
  
  	ret = platform_device_add_resources(xhci, dwc->xhci_resources,
+@@ -90,6 +101,15 @@ int dwc3_host_init(struct dwc3 *dwc)
+ 
+ 	memset(props, 0, sizeof(struct property_entry) * ARRAY_SIZE(props));
+ 
++	if (dwc->quirk_reverse_in_out)
++		props[prop_idx++].name = "quirk-reverse-in-out";
++
++	if (dwc->quirk_stop_transfer_in_block)
++		props[prop_idx++].name = "quirk-stop-transfer-in-block";
++
++	if (dwc->quirk_stop_ep_in_u1)
++		props[prop_idx++].name = "quirk-stop-ep-in-u1";
++
+ 	if (dwc->usb3_lpm_capable)
+ 		props[prop_idx++].name = "usb3-lpm-capable";
+ 
 --- a/drivers/usb/gadget/udc/fsl_udc_core.c
 +++ b/drivers/usb/gadget/udc/fsl_udc_core.c
 @@ -198,7 +198,11 @@ __acquires(ep->udc->lock)
@@ -815,15 +935,17 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  	  Variation of ARC USB block used in some Freescale chips.
 --- a/drivers/usb/host/ehci-fsl.c
 +++ b/drivers/usb/host/ehci-fsl.c
-@@ -37,13 +37,141 @@
+@@ -36,15 +36,127 @@
+ #include <linux/platform_device.h>
  #include <linux/fsl_devices.h>
  #include <linux/of_platform.h>
- 
++#include <linux/io.h>
++
 +#ifdef CONFIG_PPC
 +#include <asm/fsl_pm.h>
 +#include <linux/suspend.h>
 +#endif
-+
+ 
  #include "ehci.h"
  #include "ehci-fsl.h"
  
@@ -864,13 +986,23 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  #define DRV_NAME "ehci-fsl"
  
  static struct hc_driver __read_mostly fsl_ehci_hc_driver;
+ 
 +struct ehci_fsl {
-+       /* store current hcd state for otg;
++	struct ehci_hcd ehci;
-+	* have_hcd is true when host drv al already part of otg framework,
++
-+	* otherwise false;
++#ifdef CONFIG_PM
-+	* hcd_add is true when otg framework wants to add host
++struct ehci_regs saved_regs;
-+	* drv as part of otg;flase when it wants to remove it
++struct ccsr_usb_phy saved_phy_regs;
-+	*/
++/* Saved USB PHY settings, need to restore after deep sleep. */
++u32 usb_ctrl;
++#endif
++	/*
++	 * store current hcd state for otg;
++	 * have_hcd is true when host drv al already part of otg framework,
++	 * otherwise false;
++	 * hcd_add is true when otg framework wants to add host
++	 * drv as part of otg;flase when it wants to remove it
++	 */
 +unsigned have_hcd:1;
 +unsigned hcd_add:1;
 +};
@@ -897,7 +1029,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +	/* host, gadget and otg share same int line */
 +	retval = usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
 +	if (retval == 0)
-+	ehci_fsl->have_hcd = 1;
++		ehci_fsl->have_hcd = 1;
 +	} else if (!ehci_fsl->hcd_add && ehci_fsl->have_hcd) {
 +		usb_remove_hcd(hcd);
 +		ehci_fsl->have_hcd = 0;
@@ -905,59 +1037,33 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +}
 +#endif
 +
-+struct ehci_fsl {
-+	struct ehci_hcd ehci;
-+
-+#ifdef CONFIG_PM
-+struct ehci_regs saved_regs;
-+struct ccsr_usb_phy saved_phy_regs;
-+/* Saved USB PHY settings, need to restore after deep sleep. */
-+u32 usb_ctrl;
-+#endif
-+	/*
-+	 * store current hcd state for otg;
-+	 * have_hcd is true when host drv al already part of otg framework,
-+	 * otherwise false;
-+	 * hcd_add is true when otg framework wants to add host
-+	 * drv as part of otg;flase when it wants to remove it
-+	 */
-+unsigned have_hcd:1;
-+unsigned hcd_add:1;
-+};
-+
-+static strut ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd)
-+{
-+struct ehci_hcd *ehci = hcd_to_ehci(hcd);
-+
-+return container_of(ehci, struct ehci_fsl, ehci);
-+}
-+
 +#if defined(CONFIG_FSL_USB2_OTG) || defined(CONFIG_FSL_USB2_OTG_MODULE)
 +static void do_change_hcd(struct work_struct *work)
 +{
-+struct ehci_hcd *ehci = container_of(work, struct ehci_hcd,
++	struct ehci_hcd *ehci = container_of(work, struct ehci_hcd,
-+change_hcd_work);
++			change_hcd_work);
-+struct usb_hcd *hcd = ehci_to_hcd(ehci);
++	struct usb_hcd *hcd = ehci_to_hcd(ehci);
-+struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
++	struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
-+void __iomem *non_ehci = hcd->regs;
++	void __iomem *non_ehci = hcd->regs;
-+int retval;
++	int retval;
 +
-+if (ehci_fsl->hcd_add && !ehci_fsl->have_hcd) {
++	if (ehci_fsl->hcd_add && !ehci_fsl->have_hcd) {
-+writel(USBMODE_CM_HOST, non_ehci + FSL_SOC_USB_USBMODE);
++		writel(USBMODE_CM_HOST, non_ehci + FSL_SOC_USB_USBMODE);
-+/* host, gadget and otg share same int line */
++		/* host, gadget and otg share same int line */
-+retval = usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
++		retval = usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
-+if (retval == 0)
++		if (retval == 0)
-+ehci_fsl->have_hcd = 1;
++			ehci_fsl->have_hcd = 1;
-+} else if (!ehci_fsl->hcd_add && ehci_fsl->have_hcd) {
++	} else if (!ehci_fsl->hcd_add && ehci_fsl->have_hcd) {
-+	usb_remove_hcd(hcd);
++		usb_remove_hcd(hcd);
-+ehci_fsl->have_hcd = 0;
++		ehci_fsl->have_hcd = 0;
-+}
++	}
 +}
 +#endif
- 
++
  /* configure so an HC device and id are always provided */
  /* always called with process context; sleeping is OK */
-@@ -131,6 +259,12 @@ static int fsl_ehci_drv_probe(struct pla
+ 
+@@ -131,6 +243,12 @@ static int fsl_ehci_drv_probe(struct pla
  		clrsetbits_be32(hcd->regs + FSL_SOC_USB_CTRL,
  				CONTROL_REGISTER_W1C_MASK, 0x4);
  
@@ -970,7 +1076,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  	/*
  	 * Enable UTMI phy and program PTS field in UTMI mode before asserting
  	 * controller reset for USB Controller version 2.5
-@@ -143,16 +277,20 @@ static int fsl_ehci_drv_probe(struct pla
+@@ -143,16 +261,20 @@ static int fsl_ehci_drv_probe(struct pla
  
  	/* Don't need to set host mode here. It will be done by tdi_reset() */
  
@@ -993,7 +1099,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  		dev_dbg(&pdev->dev, "hcd=0x%p  ehci=0x%p, phy=0x%p\n",
  			hcd, ehci, hcd->usb_phy);
  
-@@ -168,6 +306,11 @@ static int fsl_ehci_drv_probe(struct pla
+@@ -168,6 +290,11 @@ static int fsl_ehci_drv_probe(struct pla
  			retval = -ENODEV;
  			goto err2;
  		}
@@ -1005,17 +1111,16 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  	}
  #endif
  	return retval;
-@@ -181,6 +324,18 @@ static int fsl_ehci_drv_probe(struct pla
+@@ -181,6 +308,17 @@ static int fsl_ehci_drv_probe(struct pla
  	return retval;
  }
  
-+static bool usb_phy_clk_valid(struct usb_hcd *hcd,
++static bool usb_phy_clk_valid(struct usb_hcd *hcd)
-+			enum fsl_usb2_phy_modes phy_mode)
 +{
 +	void __iomem *non_ehci = hcd->regs;
 +	bool ret = true;
 +
-+	if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) & PHY_CLK_VALID))
++	if (!(ioread32be(non_ehci + FSL_SOC_USB_CTRL) & PHY_CLK_VALID))
 +		ret = false;
 +
 +	return ret;
@@ -1024,7 +1129,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
  			       enum fsl_usb2_phy_modes phy_mode,
  			       unsigned int port_offset)
-@@ -219,6 +374,21 @@ static int ehci_fsl_setup_phy(struct usb
+@@ -219,6 +357,21 @@ static int ehci_fsl_setup_phy(struct usb
  		/* fall through */
  	case FSL_USB2_PHY_UTMI:
  	case FSL_USB2_PHY_UTMI_DUAL:
@@ -1046,7 +1151,16 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  		if (pdata->have_sysif_regs && pdata->controller_ver) {
  			/* controller version 1.6 or above */
  			clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL,
-@@ -292,14 +462,9 @@ static int ehci_fsl_usb_setup(struct ehc
+@@ -286,20 +439,18 @@ static int ehci_fsl_usb_setup(struct ehc
+ 	if (pdata->has_fsl_erratum_a005275 == 1)
+ 		ehci->has_fsl_hs_errata = 1;
+ 
++	if (pdata->has_fsl_erratum_a005697 == 1)
++		ehci->has_fsl_susp_errata = 1;
++
+ 	if ((pdata->operating_mode == FSL_USB2_DR_HOST) ||
+ 			(pdata->operating_mode == FSL_USB2_DR_OTG))
+ 		if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
  			return -EINVAL;
  
  	if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
@@ -1062,7 +1176,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  			ehci->has_fsl_port_bug = 1;
  
  		if (pdata->port_enables & FSL_USB2_PORT0_ENABLED)
-@@ -379,16 +544,57 @@ static int ehci_fsl_setup(struct usb_hcd
+@@ -379,16 +530,57 @@ static int ehci_fsl_setup(struct usb_hcd
  	return retval;
  }
  
@@ -1127,7 +1241,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  
  #ifdef CONFIG_PPC_MPC512x
  static int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
-@@ -535,26 +741,43 @@ static inline int ehci_fsl_mpc512x_drv_r
+@@ -535,26 +727,45 @@ static inline int ehci_fsl_mpc512x_drv_r
  }
  #endif /* CONFIG_PPC_MPC512x */
  
@@ -1149,7 +1263,9 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +
 +#ifdef CONFIG_PPC
 +suspend_state_t pm_state;
-+pm_state = pm_suspend_state();
++/* FIXME:Need to port fsl_pm.h before enable below code. */
++/*pm_state = pm_suspend_state();*/
++pm_state = PM_SUSPEND_MEM;
 +
 +if (pm_state == PM_SUSPEND_MEM)
 +	ehci_fsl_save_context(hcd);
@@ -1178,7 +1294,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  	if (!fsl_deep_sleep())
  		return 0;
  
-@@ -568,12 +791,34 @@ static int ehci_fsl_drv_resume(struct de
+@@ -568,12 +779,36 @@ static int ehci_fsl_drv_resume(struct de
  	struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
  	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  	void __iomem *non_ehci = hcd->regs;
@@ -1188,7 +1304,9 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +
 +#ifdef CONFIG_PPC
 +suspend_state_t pm_state;
-+pm_state = pm_suspend_state();
++/* FIXME:Need to port fsl_pm.h before enable below code.*/
++/* pm_state = pm_suspend_state(); */
++pm_state = PM_SUSPEND_MEM;
 +
 +if (pm_state == PM_SUSPEND_MEM)
 +	ehci_fsl_restore_context(hcd);
@@ -1225,7 +1343,16 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  #endif				/* _EHCI_FSL_H */
 --- a/drivers/usb/host/ehci-hub.c
 +++ b/drivers/usb/host/ehci-hub.c
-@@ -305,6 +305,8 @@ static int ehci_bus_suspend (struct usb_
+@@ -278,6 +278,8 @@ static int ehci_bus_suspend (struct usb_
+ 		else if ((t1 & PORT_PE) && !(t1 & PORT_SUSPEND)) {
+ 			t2 |= PORT_SUSPEND;
+ 			set_bit(port, &ehci->bus_suspended);
++			if (ehci_has_fsl_susp_errata(ehci))
++				usleep_range(10000, 20000);
+ 		}
+ 
+ 		/* enable remote wakeup on all ports, if told to do so */
+@@ -305,6 +307,8 @@ static int ehci_bus_suspend (struct usb_
  						USB_PORT_STAT_HIGH_SPEED)
  				fs_idle_delay = true;
  			ehci_writel(ehci, t2, reg);
@@ -1246,8 +1373,21 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  
  	/* list of itds & sitds completed while now_frame was still active */
  	struct list_head	cached_itd_list;
-@@ -706,8 +709,10 @@ ehci_port_speed(struct ehci_hcd *ehci, u
+@@ -219,6 +222,7 @@ struct ehci_hcd {			/* one per controlle
+ 	unsigned		no_selective_suspend:1;
+ 	unsigned		has_fsl_port_bug:1; /* FreeScale */
+ 	unsigned		has_fsl_hs_errata:1;	/* Freescale HS quirk */
++	unsigned		has_fsl_susp_errata:1; /*Freescale SUSP quirk*/
+ 	unsigned		big_endian_mmio:1;
+ 	unsigned		big_endian_desc:1;
+ 	unsigned		big_endian_capbase:1;
+@@ -704,10 +708,15 @@ ehci_port_speed(struct ehci_hcd *ehci, u
+ #if defined(CONFIG_PPC_85xx)
+ /* Some Freescale processors have an erratum (USB A-005275) in which
   * incoming packets get corrupted in HS mode
++ * Some Freescale processors have an erratum (USB A-005697) in which
++ * we need to wait for 10ms for bus to fo into suspend mode after
++ * setting SUSP bit
   */
  #define ehci_has_fsl_hs_errata(e)	((e)->has_fsl_hs_errata)
 +#define ehci_has_fsl_susp_errata(e)     ((e)->has_fsl_susp_errata)
@@ -1278,6 +1418,149 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  
  	/*
  	 * Determine whether phy_clk_valid needs to be checked
+--- a/drivers/usb/host/xhci-plat.c
++++ b/drivers/usb/host/xhci-plat.c
+@@ -223,6 +223,16 @@ static int xhci_plat_probe(struct platfo
+ 	if (device_property_read_bool(&pdev->dev, "usb3-lpm-capable"))
+ 		xhci->quirks |= XHCI_LPM_SUPPORT;
+ 
++	if (device_property_read_bool(&pdev->dev, "quirk-reverse-in-out"))
++		xhci->quirks |= XHCI_REVERSE_IN_OUT;
++
++	if (device_property_read_bool(&pdev->dev,
++				"quirk-stop-transfer-in-block"))
++		xhci->quirks |= XHCI_STOP_TRANSFER_IN_BLOCK;
++
++	if (device_property_read_bool(&pdev->dev, "quirk-stop-ep-in-u1"))
++		xhci->quirks |= XHCI_STOP_EP_IN_U1;
++
+ 	if (device_property_read_bool(&pdev->dev, "quirk-broken-port-ped"))
+ 		xhci->quirks |= XHCI_BROKEN_PORT_PED;
+ 
+--- a/drivers/usb/host/xhci-ring.c
++++ b/drivers/usb/host/xhci-ring.c
+@@ -1852,14 +1852,17 @@ static int finish_td(struct xhci_hcd *xh
+ 	union xhci_trb *event_trb, struct xhci_transfer_event *event,
+ 	struct xhci_virt_ep *ep, int *status, bool skip)
+ {
++	struct xhci_dequeue_state deq_state;
+ 	struct xhci_virt_device *xdev;
+ 	struct xhci_ring *ep_ring;
++	unsigned int stream_id;
+ 	unsigned int slot_id;
+ 	int ep_index;
+ 	struct urb *urb = NULL;
+ 	struct xhci_ep_ctx *ep_ctx;
+ 	int ret = 0;
+ 	struct urb_priv	*urb_priv;
++	u32 remaining;
+ 	u32 trb_comp_code;
+ 
+ 	slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
+@@ -1885,13 +1888,29 @@ static int finish_td(struct xhci_hcd *xh
+ 	if (trb_comp_code == COMP_STALL ||
+ 		xhci_requires_manual_halt_cleanup(xhci, ep_ctx,
+ 						trb_comp_code)) {
+-		/* Issue a reset endpoint command to clear the host side
+-		 * halt, followed by a set dequeue command to move the
+-		 * dequeue pointer past the TD.
+-		 * The class driver clears the device side halt later.
++		/*
++		 * A-007463: After transaction error, controller switches
++		 * control transfer data stage from IN to OUT direction.
+ 		 */
+-		xhci_cleanup_halted_endpoint(xhci, slot_id, ep_index,
++		remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
++		if (remaining && xhci_requires_manual_halt_cleanup(xhci, ep_ctx,
++					trb_comp_code) &&
++					(xhci->quirks & XHCI_REVERSE_IN_OUT)) {
++			memset(&deq_state, 0, sizeof(deq_state));
++			xhci_find_new_dequeue_state(xhci, slot_id,
++				ep_index, td->urb->stream_id, td, &deq_state);
++			xhci_queue_new_dequeue_state(xhci, slot_id, ep_index,
++							stream_id, &deq_state);
++			xhci_ring_cmd_db(xhci);
++		} else {
++			/* Issue a reset endpoint command to clear the host side
++			 * halt, followed by a set dequeue command to move the
++			 * dequeue pointer past the TD.
++			 * The class driver clears the device side halt later.
++			 */
++			xhci_cleanup_halted_endpoint(xhci, slot_id, ep_index,
+ 					ep_ring->stream_id, td, event_trb);
++		}
+ 	} else {
+ 		/* Update ring dequeue pointer */
+ 		while (ep_ring->dequeue != td->last_trb)
+--- a/drivers/usb/host/xhci.c
++++ b/drivers/usb/host/xhci.c
+@@ -1570,14 +1570,38 @@ int xhci_urb_dequeue(struct usb_hcd *hcd
+ 			ret = -ENOMEM;
+ 			goto done;
+ 		}
+-		ep->ep_state |= EP_HALT_PENDING;
+-		ep->stop_cmds_pending++;
+-		ep->stop_cmd_timer.expires = jiffies +
++		/*
++		 *A-009611: Issuing an End Transfer command on an IN endpoint.
++		 *when a transfer is in progress on USB blocks the transmission
++		 *Workaround: Software must wait for all existing TRBs to
++		 *complete before issuing End transfer command.
++		 */
++		if ((ep_ring->enqueue == ep_ring->dequeue &&
++				(xhci->quirks & XHCI_STOP_TRANSFER_IN_BLOCK)) ||
++				!(xhci->quirks & XHCI_STOP_TRANSFER_IN_BLOCK)) {
++			ep->ep_state |= EP_HALT_PENDING;
++			ep->stop_cmds_pending++;
++			ep->stop_cmd_timer.expires = jiffies +
+ 			XHCI_STOP_EP_CMD_TIMEOUT * HZ;
+-		add_timer(&ep->stop_cmd_timer);
+-		xhci_queue_stop_endpoint(xhci, command, urb->dev->slot_id,
+-					 ep_index, 0);
+-		xhci_ring_cmd_db(xhci);
++			add_timer(&ep->stop_cmd_timer);
++			xhci_queue_stop_endpoint(xhci, command,
++					urb->dev->slot_id,
++					ep_index, 0);
++			xhci_ring_cmd_db(xhci);
++		}
++
++		/*
++		 *A-009668: Stop Endpoint Command does not complete.
++		 *Workaround: Instead of issuing a Stop Endpoint Command,
++		 *issue a Disable Slot Command with the corresponding slot ID.
++		 *Alternately, you can issue an Address Device Command with
++		 *BSR=1
++		 */
++		if ((urb->dev->speed <= USB_SPEED_HIGH) &&
++					(xhci->quirks & XHCI_STOP_EP_IN_U1)) {
++			xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
++					urb->dev->slot_id);
++		}
+ 	}
+ done:
+ 	spin_unlock_irqrestore(&xhci->lock, flags);
+--- a/drivers/usb/host/xhci.h
++++ b/drivers/usb/host/xhci.h
+@@ -1621,7 +1621,7 @@ struct xhci_hcd {
+ #define XHCI_STATE_REMOVING	(1 << 2)
+ 	/* Statistics */
+ 	int			error_bitmask;
+-	unsigned int		quirks;
++	u64			quirks;
+ #define	XHCI_LINK_TRB_QUIRK	(1 << 0)
+ #define XHCI_RESET_EP_QUIRK	(1 << 1)
+ #define XHCI_NEC_HOST		(1 << 2)
+@@ -1657,6 +1657,9 @@ struct xhci_hcd {
+ #define XHCI_SSIC_PORT_UNUSED	(1 << 22)
+ #define XHCI_NO_64BIT_SUPPORT	(1 << 23)
+ #define XHCI_MISSING_CAS	(1 << 24)
++#define XHCI_REVERSE_IN_OUT    (1 << 29)
++#define XHCI_STOP_TRANSFER_IN_BLOCK    (1 << 30)
++#define XHCI_STOP_EP_IN_U1    (1 << 31)
+ /* For controller with a broken Port Disable implementation */
+ #define XHCI_BROKEN_PORT_PED	(1 << 25)
+ #define XHCI_LIMIT_ENDPOINT_INTERVAL_7	(1 << 26)
 --- a/drivers/usb/phy/phy-fsl-usb.c
 +++ b/drivers/usb/phy/phy-fsl-usb.c
 @@ -1,5 +1,5 @@

target/linux/layerscape/patches-4.9/818-vfio-support-layerscape.patch

@@ -1,9 +1,9 @@
-From 8d82d92ea697145c32bb36d9f39afd5bb0927bc2 Mon Sep 17 00:00:00 2001
+From 954edeee88305fecefe3f681e67a298f06e27974 Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Wed, 27 Sep 2017 10:34:46 +0800
+Date: Wed, 17 Jan 2018 15:48:47 +0800
-Subject: [PATCH] vfio: support layerscape
+Subject: [PATCH 30/30] vfio: support layerscape
 
-This is a integrated patch for layerscape vfio support.
+This is an integrated patch for layerscape vfio support.
 
 Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
 Signed-off-by: Eric Auger <eric.auger@redhat.com>

target/linux/layerscape/patches-4.9/819-Revert-usb-kconfig-remove-dependency-FSL_SOC-for-ehc.patch

@@ -1,28 +0,0 @@
-From ba4f9dd74ccb9da91195b3570310754716064ef2 Mon Sep 17 00:00:00 2001
-From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Tue, 10 Oct 2017 15:55:31 +0800
-Subject: [PATCH] Revert "usb: kconfig: remove dependency FSL_SOC for ehci fsl
- driver"
-
-This reverts commit 92042e8b3622a9bbfce0ebfc90edf6cd14d45708 on
-LSDK linux (https://github.com/qoriq-open-source/linux).
-
-The patch reverted allowed to build ehci-fsl driver for non-PPC
-platforms, but actually the driver was not ready.
-
-Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
----
- drivers/usb/host/Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/usb/host/Kconfig
-+++ b/drivers/usb/host/Kconfig
-@@ -165,7 +165,7 @@ config XPS_USB_HCD_XILINX
- 
- config USB_EHCI_FSL
- 	tristate "Support for Freescale PPC on-chip EHCI USB controller"
--	depends on USB_EHCI_HCD
-+	depends on FSL_SOC
- 	select USB_EHCI_ROOT_HUB_TT
- 	---help---
- 	  Variation of ARC USB block used in some Freescale chips.