mirror of https://github.com/hak5/openwrt-owl.git
bcm53xx: add BCM5301X patches sent upstream (bus and R6250 LEDs)
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> SVN-Revision: 42711owl
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From a2533caee935fff97e3e8dbfad5cc159e6bf6034 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
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Date: Wed, 1 Oct 2014 09:21:07 +0200
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Subject: [PATCH 1/2] ARM: BCM5301X: Add Broadcom's bus-axi to the DTS file
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
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---
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arch/arm/boot/dts/bcm5301x.dtsi | 16 ++++++++++++++++
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1 file changed, 16 insertions(+)
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diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
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index 53c624f..6d80922 100644
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--- a/arch/arm/boot/dts/bcm5301x.dtsi
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+++ b/arch/arm/boot/dts/bcm5301x.dtsi
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@@ -8,6 +8,7 @@
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* Licensed under the GNU/GPL. See COPYING for details.
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*/
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+#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include "skeleton.dtsi"
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@@ -92,4 +93,19 @@
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clock-frequency = <400000000>;
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};
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};
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+
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+ axi@18000000 {
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+ compatible = "brcm,bus-axi";
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+ reg = <0x18000000 0x1000>;
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+ ranges = <0x00000000 0x18000000 0x00100000>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ chipcommon: chipcommon@0 {
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+ reg = <0x00000000 0x1000>;
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+
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ };
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+ };
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};
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--
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1.8.4.5
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@ -0,0 +1,59 @@
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From b7e4d148906685882a081e7e50692313c5a8724e Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
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Date: Wed, 1 Oct 2014 09:23:09 +0200
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Subject: [PATCH 2/2] ARM: BCM5301X: Add LEDs for Netgear R6250 V1
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
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---
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arch/arm/boot/dts/bcm4708-netgear-r6250.dts | 34 +++++++++++++++++++++++++++++
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1 file changed, 34 insertions(+)
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diff --git a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
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index 3b5259d..58d999d 100644
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--- a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
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+++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
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@@ -32,4 +32,38 @@
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status = "okay";
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};
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};
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+
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+ leds {
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+ compatible = "gpio-leds";
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+
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+ logo {
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+ label = "bcm53xx:white:logo";
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+ gpios = <&chipcommon 1 GPIO_ACTIVE_HIGH>;
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+ linux,default-trigger = "default-on";
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+ };
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+
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+ power0 {
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+ label = "bcm53xx:green:power";
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+ gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>;
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+ linux,default-trigger = "default-off";
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+ };
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+
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+ power1 {
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+ label = "bcm53xx:amber:power";
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+ gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
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+ linux,default-trigger = "default-on";
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+ };
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+
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+ usb {
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+ label = "bcm53xx:blue:usb";
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+ gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>;
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+ linux,default-trigger = "default-off";
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+ };
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+
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+ wireless {
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+ label = "bcm53xx:blue:wireless";
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+ gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
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+ linux,default-trigger = "default-off";
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+ };
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+ };
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};
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--
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1.8.4.5
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@ -9,11 +9,10 @@ Subject: [PATCH 07/17] ARM: BCM5301X: register bcma bus
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--- a/arch/arm/boot/dts/bcm5301x.dtsi
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--- a/arch/arm/boot/dts/bcm5301x.dtsi
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+++ b/arch/arm/boot/dts/bcm5301x.dtsi
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+++ b/arch/arm/boot/dts/bcm5301x.dtsi
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@@ -92,4 +92,100 @@
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@@ -94,18 +94,102 @@
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clock-frequency = <400000000>;
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};
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};
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};
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};
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+
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+ nvram0: nvram@1c000000 {
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+ nvram0: nvram@1c000000 {
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+ compatible = "brcm,bcm47xx-nvram";
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+ compatible = "brcm,bcm47xx-nvram";
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+ reg = <0x1c000000 0x01000000>;
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+ reg = <0x1c000000 0x01000000>;
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@ -24,18 +23,21 @@ Subject: [PATCH 07/17] ARM: BCM5301X: register bcma bus
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+ nvram = <&nvram0>;
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+ nvram = <&nvram0>;
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+ };
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+ };
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+
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+
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+ axi@18000000 {
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axi@18000000 {
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+ compatible = "brcm,bus-axi";
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compatible = "brcm,bus-axi";
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+ reg = <0x18000000 0x1000>;
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reg = <0x18000000 0x1000>;
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+ ranges = <0x00000000 0x18000000 0x00100000>;
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ranges = <0x00000000 0x18000000 0x00100000>;
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+ #address-cells = <1>;
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#address-cells = <1>;
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+ #size-cells = <1>;
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#size-cells = <1>;
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+ sprom = <&sprom0>;
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+ sprom = <&sprom0>;
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+
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+ chipcommon@0 {
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chipcommon: chipcommon@0 {
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+ reg = <0x00000000 0x1000>;
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reg = <0x00000000 0x1000>;
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+ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
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+ };
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gpio-controller;
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#gpio-cells = <2>;
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};
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+
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+
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+ pcie@12000 {
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+ pcie@12000 {
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+ reg = <0x00012000 0x1000>;
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+ reg = <0x00012000 0x1000>;
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@ -107,6 +109,6 @@ Subject: [PATCH 07/17] ARM: BCM5301X: register bcma bus
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+ <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
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+ <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
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+ };
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+ };
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+ };
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};
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};
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};
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