ar71xx: don't use mac_base2 in the ag71xx driver

SVN-Revision: 17693
owl
Gabor Juhos 2009-09-23 17:44:02 +00:00
parent 6ed55b43d7
commit 0eba7ba4ff
4 changed files with 23 additions and 58 deletions

View File

@ -181,8 +181,8 @@ static struct resource ar71xx_mdio_resources[] = {
{
.name = "mdio_base",
.flags = IORESOURCE_MEM,
.start = AR71XX_GE0_BASE + 0x20,
.end = AR71XX_GE0_BASE + 0x38 - 1,
.start = AR71XX_GE0_BASE,
.end = AR71XX_GE0_BASE + 0x200 - 1,
}
};
@ -348,11 +348,6 @@ static struct resource ar71xx_eth0_resources[] = {
.name = "mac_base",
.flags = IORESOURCE_MEM,
.start = AR71XX_GE0_BASE,
.end = AR71XX_GE0_BASE + 0x20 - 1,
}, {
.name = "mac_base2",
.flags = IORESOURCE_MEM,
.start = AR71XX_GE0_BASE + 0x38,
.end = AR71XX_GE0_BASE + 0x200 - 1,
}, {
.name = "mii_ctrl",
@ -386,11 +381,6 @@ static struct resource ar71xx_eth1_resources[] = {
.name = "mac_base",
.flags = IORESOURCE_MEM,
.start = AR71XX_GE1_BASE,
.end = AR71XX_GE1_BASE + 0x20 - 1,
}, {
.name = "mac_base2",
.flags = IORESOURCE_MEM,
.start = AR71XX_GE1_BASE + 0x38,
.end = AR71XX_GE1_BASE + 0x200 - 1,
}, {
.name = "mii_ctrl",

View File

@ -38,7 +38,7 @@
#define ETH_FCS_LEN 4
#define AG71XX_DRV_NAME "ag71xx"
#define AG71XX_DRV_VERSION "0.5.23"
#define AG71XX_DRV_VERSION "0.5.24"
#define AG71XX_NAPI_WEIGHT 64
#define AG71XX_OOM_REFILL (1 + HZ/10)
@ -110,7 +110,6 @@ struct ag71xx_mdio {
struct ag71xx {
void __iomem *mac_base;
void __iomem *mac_base2;
void __iomem *mii_ctrl;
spinlock_t lock;
@ -314,14 +313,12 @@ static inline void ag71xx_wr(struct ag71xx *ag, unsigned reg, u32 value)
switch (reg) {
case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL:
case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS:
r = ag->mac_base + reg;
__raw_writel(value, r);
__raw_readl(r);
break;
case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS:
r = ag->mac_base2 + reg - AG71XX_REG_MAC_IFCTL;
__raw_writel(value, r);
__raw_readl(r);
/* flush write */
(void) __raw_readl(r);
break;
default:
BUG();
@ -335,11 +332,8 @@ static inline u32 ag71xx_rr(struct ag71xx *ag, unsigned reg)
switch (reg) {
case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL:
r = ag->mac_base + reg;
ret = __raw_readl(r);
break;
case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS:
r = ag->mac_base2 + reg - AG71XX_REG_MAC_IFCTL;
r = ag->mac_base + reg;
ret = __raw_readl(r);
break;
default:
@ -355,14 +349,12 @@ static inline void ag71xx_sb(struct ag71xx *ag, unsigned reg, u32 mask)
switch (reg) {
case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL:
case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS:
r = ag->mac_base + reg;
__raw_writel(__raw_readl(r) | mask, r);
__raw_readl(r);
break;
case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS:
r = ag->mac_base2 + reg - AG71XX_REG_MAC_IFCTL;
__raw_writel(__raw_readl(r) | mask, r);
__raw_readl(r);
/* flush write */
(void)__raw_readl(r);
break;
default:
BUG();
@ -375,14 +367,12 @@ static inline void ag71xx_cb(struct ag71xx *ag, unsigned reg, u32 mask)
switch (reg) {
case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL:
case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS:
r = ag->mac_base + reg;
__raw_writel(__raw_readl(r) & ~mask, r);
__raw_readl(r);
break;
case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS:
r = ag->mac_base2 + reg - AG71XX_REG_MAC_IFCTL;
__raw_writel(__raw_readl(r) & ~mask, r);
__raw_readl(r);
/* flush write */
(void) __raw_readl(r);
break;
default:
BUG();
@ -407,6 +397,8 @@ static inline void ag71xx_mii_ctrl_wr(struct ag71xx *ag, u32 value)
return;
__raw_writel(value, ag->mii_ctrl);
/* flush write */
__raw_readl(ag->mii_ctrl);
}

View File

@ -837,32 +837,18 @@ static int __init ag71xx_probe(struct platform_device *pdev)
goto err_free_dev;
}
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mac_base2");
if (!res) {
dev_err(&pdev->dev, "no mac_base2 resource found\n");
err = -ENXIO;
goto err_unmap_base1;
}
ag->mac_base2 = ioremap_nocache(res->start, res->end - res->start + 1);
if (!ag->mac_base) {
dev_err(&pdev->dev, "unable to ioremap mac_base2\n");
err = -ENOMEM;
goto err_unmap_base1;
}
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mii_ctrl");
if (!res) {
dev_err(&pdev->dev, "no mii_ctrl resource found\n");
err = -ENXIO;
goto err_unmap_base2;
goto err_unmap_base;
}
ag->mii_ctrl = ioremap_nocache(res->start, res->end - res->start + 1);
if (!ag->mii_ctrl) {
dev_err(&pdev->dev, "unable to ioremap mii_ctrl\n");
err = -ENOMEM;
goto err_unmap_base2;
goto err_unmap_base;
}
dev->irq = platform_get_irq(pdev, 0);
@ -929,9 +915,7 @@ static int __init ag71xx_probe(struct platform_device *pdev)
free_irq(dev->irq, dev);
err_unmap_mii_ctrl:
iounmap(ag->mii_ctrl);
err_unmap_base2:
iounmap(ag->mac_base2);
err_unmap_base1:
err_unmap_base:
iounmap(ag->mac_base);
err_free_dev:
kfree(dev);
@ -951,7 +935,6 @@ static int __exit ag71xx_remove(struct platform_device *pdev)
unregister_netdev(dev);
free_irq(dev->irq, dev);
iounmap(ag->mii_ctrl);
iounmap(ag->mac_base2);
iounmap(ag->mac_base);
kfree(dev);
platform_set_drvdata(pdev, NULL);

View File

@ -21,12 +21,12 @@ struct ag71xx_mdio *ag71xx_mdio_bus;
static inline void ag71xx_mdio_wr(struct ag71xx_mdio *am, unsigned reg,
u32 value)
{
__raw_writel(value, am->mdio_base + reg - AG71XX_REG_MII_CFG);
__raw_writel(value, am->mdio_base + reg);
}
static inline u32 ag71xx_mdio_rr(struct ag71xx_mdio *am, unsigned reg)
{
return __raw_readl(am->mdio_base + reg - AG71XX_REG_MII_CFG);
return __raw_readl(am->mdio_base + reg);
}
static void ag71xx_mdio_dump_regs(struct ag71xx_mdio *am)