mirror of https://github.com/hak5/openwrt-owl.git
parent
59bff8bf18
commit
055e317ed8
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@ -248,10 +248,9 @@ static void __init ar71xx_misc_irq_init(void)
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}
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}
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/*
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/*
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* The IP2 line is tied to a PCI/WMAC device. Drivers for these
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* The IP2/IP3 lines are tied to a PCI/WMAC/USB device. Drivers for
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* devices typically allocate coherent DMA memory for the descriptor
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* these devices typically allocate coherent DMA memory, however the
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* ring, however the DMA controller may still have some unsynchronized
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* DMA controller may still have some unsynchronized data in the FIFO.
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* data in the FIFO.
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* Issue a flush in the handlers to ensure that the driver sees
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* Issue a flush in the handlers to ensure that the driver sees
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* the update.
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* the update.
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*/
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*/
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@ -285,7 +284,37 @@ static void ar934x_ip2_handler(void)
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do_IRQ(AR71XX_CPU_IRQ_IP2);
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do_IRQ(AR71XX_CPU_IRQ_IP2);
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}
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}
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static void ar71xx_ip3_handler(void)
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{
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ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_USB);
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do_IRQ(AR71XX_CPU_IRQ_USB);
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}
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static void ar724x_ip3_handler(void)
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{
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ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_USB);
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do_IRQ(AR71XX_CPU_IRQ_USB);
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}
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static void ar913x_ip3_handler(void)
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{
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ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_USB);
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do_IRQ(AR71XX_CPU_IRQ_USB);
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}
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static void ar933x_ip3_handler(void)
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{
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ar71xx_ddr_flush(AR933X_DDR_REG_FLUSH_USB);
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do_IRQ(AR71XX_CPU_IRQ_USB);
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}
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static void ar934x_ip3_handler(void)
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{
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do_IRQ(AR71XX_CPU_IRQ_USB);
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}
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static void (*ip2_handler)(void);
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static void (*ip2_handler)(void);
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static void (*ip3_handler)(void);
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asmlinkage void plat_irq_dispatch(void)
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asmlinkage void plat_irq_dispatch(void)
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{
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{
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@ -306,7 +335,7 @@ asmlinkage void plat_irq_dispatch(void)
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do_IRQ(AR71XX_CPU_IRQ_GE1);
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do_IRQ(AR71XX_CPU_IRQ_GE1);
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else if (pending & STATUSF_IP3)
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else if (pending & STATUSF_IP3)
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do_IRQ(AR71XX_CPU_IRQ_USB);
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ip3_handler();
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else if (pending & STATUSF_IP6)
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else if (pending & STATUSF_IP6)
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ar71xx_misc_irq_dispatch();
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ar71xx_misc_irq_dispatch();
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@ -321,28 +350,33 @@ void __init arch_init_irq(void)
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case AR71XX_SOC_AR7141:
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case AR71XX_SOC_AR7141:
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case AR71XX_SOC_AR7161:
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case AR71XX_SOC_AR7161:
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ip2_handler = ar71xx_ip2_handler;
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ip2_handler = ar71xx_ip2_handler;
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ip3_handler = ar71xx_ip3_handler;
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break;
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break;
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7241:
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case AR71XX_SOC_AR7241:
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case AR71XX_SOC_AR7242:
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case AR71XX_SOC_AR7242:
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ip2_handler = ar724x_ip2_handler;
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ip2_handler = ar724x_ip2_handler;
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ip3_handler = ar724x_ip3_handler;
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break;
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break;
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case AR71XX_SOC_AR9130:
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case AR71XX_SOC_AR9130:
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case AR71XX_SOC_AR9132:
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case AR71XX_SOC_AR9132:
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ip2_handler = ar913x_ip2_handler;
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ip2_handler = ar913x_ip2_handler;
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ip3_handler = ar913x_ip3_handler;
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break;
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break;
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case AR71XX_SOC_AR9330:
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case AR71XX_SOC_AR9330:
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case AR71XX_SOC_AR9331:
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case AR71XX_SOC_AR9331:
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ip2_handler = ar933x_ip2_handler;
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ip2_handler = ar933x_ip2_handler;
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ip3_handler = ar933x_ip3_handler;
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break;
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break;
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case AR71XX_SOC_AR9341:
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case AR71XX_SOC_AR9341:
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case AR71XX_SOC_AR9342:
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case AR71XX_SOC_AR9342:
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case AR71XX_SOC_AR9344:
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case AR71XX_SOC_AR9344:
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ip2_handler = ar934x_ip2_handler;
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ip2_handler = ar934x_ip2_handler;
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ip3_handler = ar934x_ip3_handler;
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break;
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break;
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default:
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default:
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