mirror of https://github.com/hak5/openwrt-owl.git
brcm63xx: 3.14: fix ath9k_pci_fixup
Since kernel commit 928bea964827 ("PCI: Delay enabling bridges until they're needed"), pci fixups are run with bridges (e.g. the pcie port) disabled. This causses hangs when ath9k_pci_fixup tries to manually enable the device to apply the register fixups. Fix this by enabling any parent bridges before trying to access the device itself. Fixes boot on DSL-274XB rev F1. Reported-by: Matteo Croce <matteo@openwrt.org> Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 41856owl
parent
fd619513d1
commit
042fb8eb57
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@ -24,7 +24,7 @@ Subject: [PATCH 61/72] BCM63XX: add a fixup for ath9k devices
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obj-y += boards/
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obj-y += boards/
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--- /dev/null
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--- /dev/null
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+++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
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+++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
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@@ -0,0 +1,192 @@
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@@ -0,0 +1,199 @@
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+/*
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+/*
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+ * Broadcom BCM63XX Ath9k EEPROM fixup helper.
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+ * Broadcom BCM63XX Ath9k EEPROM fixup helper.
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+ *
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+ *
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@ -117,6 +117,7 @@ Subject: [PATCH 61/72] BCM63XX: add a fixup for ath9k devices
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+{
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+{
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+ void __iomem *mem;
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+ void __iomem *mem;
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+ struct ath9k_platform_data *pdata = NULL;
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+ struct ath9k_platform_data *pdata = NULL;
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+ struct pci_dev *bridge = pci_upstream_bridge(dev);
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+ u16 *cal_data = NULL;
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+ u16 *cal_data = NULL;
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+ u16 cmd;
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+ u16 cmd;
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+ u32 bar0;
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+ u32 bar0;
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@ -161,6 +162,9 @@ Subject: [PATCH 61/72] BCM63XX: add a fixup for ath9k devices
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+ return;
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+ return;
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+ }
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+ }
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+
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+
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+ if (bridge)
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+ pci_enable_device(bridge);
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+
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+ pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
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+ pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
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+ pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
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+ pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
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+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, val);
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+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, val);
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@ -195,6 +199,9 @@ Subject: [PATCH 61/72] BCM63XX: add a fixup for ath9k devices
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+
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+
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+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
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+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
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+
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+
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+ if (bridge)
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+ pci_disable_device(bridge);
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+
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+ iounmap(mem);
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+ iounmap(mem);
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+
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+
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+ dev->dev.platform_data = pdata;
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+ dev->dev.platform_data = pdata;
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@ -21,7 +21,7 @@
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/*
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/*
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--- a/arch/mips/bcm63xx/pci-ath9k-fixup.c
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--- a/arch/mips/bcm63xx/pci-ath9k-fixup.c
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+++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
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+++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
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@@ -174,12 +174,14 @@ static void ath9k_pci_fixup(struct pci_d
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@@ -181,12 +181,14 @@ static void ath9k_pci_fixup(struct pci_d
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}
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}
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
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@ -11,7 +11,7 @@
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}
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}
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--- a/arch/mips/bcm63xx/pci-ath9k-fixup.c
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--- a/arch/mips/bcm63xx/pci-ath9k-fixup.c
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+++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
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+++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
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@@ -175,13 +175,14 @@ static void ath9k_pci_fixup(struct pci_d
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@@ -182,13 +182,14 @@ static void ath9k_pci_fixup(struct pci_d
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
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void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset,
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void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset,
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