mirror of https://github.com/hak5/openwrt-owl.git
68 lines
2.5 KiB
Diff
68 lines
2.5 KiB
Diff
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From 96b40de5e36ec479dabb88500f1830a87818a809 Mon Sep 17 00:00:00 2001
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From: Ray Jui <rjui@broadcom.com>
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Date: Mon, 16 Nov 2015 17:57:33 -0800
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Subject: [PATCH 152/154] PCI: iproc: Add iProc PCIe MSI device tree binding
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This patch updates the iProc PCIe device tree bindings with added
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binding information for MSI
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Signed-off-by: Ray Jui <rjui@broadcom.com>
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Reviewed-by: Anup Patel <anup.patel@broadcom.com>
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Reviewed-by: Vikram Prakash <vikramp@broadcom.com>
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Reviewed-by: Scott Branden <sbranden@broadcom.com>
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---
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.../devicetree/bindings/pci/brcm,iproc-pcie.txt | 35 ++++++++++++++++++++++
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1 file changed, 35 insertions(+)
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--- a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt
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+++ b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt
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@@ -35,6 +35,28 @@ Optional:
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- brcm,pcie-ob-oarr-size: Some iProc SoCs need the OARR size bit to be set to
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increase the outbound window size
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+MSI support (optional):
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+
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+For older platforms without MSI integrated in the GIC, iProc PCIe core provides
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+an event queue based MSI support. The iProc MSI uses host memories to store
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+MSI posted writes in the event queues
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+
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+- msi-parent: Link to the device node of the MSI controller. On newer iProc
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+platforms, the MSI controller may be gicv2m or gicv3-its. On older iProc
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+platforms without MSI support in its interrupt controller, one may use the
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+event queue based MSI support integrated within the iProc PCIe core
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+
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+When the iProc event queue based MSI is used, one needs to define the
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+following properties in the MSI device node:
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+- compatible: Must be "brcm,iproc-msi"
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+- msi-controller: claims itself as an MSI controller
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+- interrupt-parent: Link to its parent interrupt device
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+- interrupts: List of interrupt IDs from its parent interrupt device
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+
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+Optional properties:
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+- brcm,pcie-msi-inten: Needs to be present for some older iProc platforms that
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+require the interrupt enable registers to be set explicitly to enable MSI
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+
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Example:
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pcie0: pcie@18012000 {
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compatible = "brcm,iproc-pcie";
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@@ -61,6 +83,19 @@ Example:
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brcm,pcie-ob-oarr-size;
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brcm,pcie-ob-axi-offset = <0x00000000>;
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brcm,pcie-ob-window-size = <256>;
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+
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+ msi-parent = <&msi0>;
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+
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+ /* iProc event queue based MSI */
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+ msi0: msi@18012000 {
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+ compatible = "brcm,iproc-msi";
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+ msi-controller;
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+ interrupt-parent = <&gic>;
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+ interrupts = <GIC_SPI 96 IRQ_TYPE_NONE>,
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+ <GIC_SPI 97 IRQ_TYPE_NONE>,
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+ <GIC_SPI 98 IRQ_TYPE_NONE>,
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+ <GIC_SPI 99 IRQ_TYPE_NONE>,
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+ };
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};
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pcie1: pcie@18013000 {
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