mirror of https://github.com/hak5/openwrt-owl.git
59 lines
2.1 KiB
Diff
59 lines
2.1 KiB
Diff
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From: Pratyush Anand <pratyush.anand@st.com>
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pp->io_base which is the input of the outbound IO address translation
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unit should be the cpu address, it was programmed wrongly to realio
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address.
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We should pass global_io_offset rather than sys->io_offset to
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pci_ioremap_io, so we map the new window into the first available spot
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in the Linux view of the I/O space.
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We must also pass cpu address instead of realio address to
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pci_ioremap_io.
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This patch fixes above issue. It has been tested with Lecroy PTC in AIC
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mode and Pericom PI7C9X2G303EL PCIe switch, which does not work
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otherwise.
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Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
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Tested-by: Mohit Kumar <mohit.kumar@st.com>
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Tested-by: Tim Harvey <tharvey@gateworks.com>
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Cc: Arnd Bergmann <arnd@arndb.de>
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Cc: Marek Vasut <marex@denx.de>
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Cc: Richard Zhu <Hong-Xing.Zhu@freescale.com>
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Cc: linux-pci@vger.kernel.org
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Cc: spear-devel@list.st.com
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---
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drivers/pci/host/pcie-designware.c | 5 ++---
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1 files changed, 2 insertions(+), 3 deletions(-)
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http://thread.gmane.org/gmane.linux.kernel.pci/27204
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--- a/drivers/pci/host/pcie-designware.c
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+++ b/drivers/pci/host/pcie-designware.c
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@@ -177,6 +177,7 @@ int __init dw_pcie_host_init(struct pcie
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+ global_io_offset);
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pp->config.io_size = resource_size(&pp->io);
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pp->config.io_bus_addr = range.pci_addr;
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+ pp->io_base = range.cpu_addr;
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}
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if (restype == IORESOURCE_MEM) {
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of_pci_range_to_resource(&range, np, &pp->mem);
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@@ -202,7 +203,6 @@ int __init dw_pcie_host_init(struct pcie
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pp->cfg0_base = pp->cfg.start;
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pp->cfg1_base = pp->cfg.start + pp->config.cfg0_size;
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- pp->io_base = pp->io.start;
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pp->mem_base = pp->mem.start;
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pp->va_cfg0_base = devm_ioremap(pp->dev, pp->cfg0_base,
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@@ -449,7 +449,7 @@ int dw_pcie_setup(int nr, struct pci_sys
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if (global_io_offset < SZ_1M && pp->config.io_size > 0) {
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sys->io_offset = global_io_offset - pp->config.io_bus_addr;
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- pci_ioremap_io(sys->io_offset, pp->io.start);
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+ pci_ioremap_io(global_io_offset, pp->io_base);
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global_io_offset += SZ_64K;
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pci_add_resource_offset(&sys->resources, &pp->io,
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sys->io_offset);
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