mirror of https://github.com/hak5/openwrt-owl.git
59 lines
2.2 KiB
Diff
59 lines
2.2 KiB
Diff
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From ff5fadaff39180dc0b652753b5614a564711be29 Mon Sep 17 00:00:00 2001
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From: Florian Fainelli <florian@openwrt.org>
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Date: Wed, 24 Jul 2013 17:12:11 +0100
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Subject: [PATCH] MIPS: BMIPS: fix slave CPU booting when physical CPU is not 0
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The current BMIPS SMP code assumes that the slave CPU is physical and
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logical CPU 1, but on some systems such as BCM3368, the slave CPU is
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physical CPU0. Fix the code to read the physical CPU (thread ID) we are
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running this code on, and adjust the relocation vector address based on
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it. This allows bringing up the second CPU on BCM3368 for instance.
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Signed-off-by: Florian Fainelli <florian@openwrt.org>
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Cc: linux-mips@linux-mips.org
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Cc: cernekee@gmail.com
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Cc: jogo@openwrt.org
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Cc: blogic@openwrt.org
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Patchwork: https://patchwork.linux-mips.org/patch/5621/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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---
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arch/mips/kernel/bmips_vec.S | 6 +++++-
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arch/mips/kernel/smp-bmips.c | 10 ++++++++--
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2 files changed, 13 insertions(+), 3 deletions(-)
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--- a/arch/mips/kernel/bmips_vec.S
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+++ b/arch/mips/kernel/bmips_vec.S
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@@ -56,7 +56,11 @@ LEAF(bmips_smp_movevec)
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/* set up CPU1 CBR; move BASE to 0xa000_0000 */
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li k0, 0xff400000
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mtc0 k0, $22, 6
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- li k1, CKSEG1 | BMIPS_RELO_VECTOR_CONTROL_1
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+ /* set up relocation vector address based on thread ID */
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+ mfc0 k1, $22, 3
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+ srl k1, 16
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+ andi k1, 0x8000
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+ or k1, CKSEG1 | BMIPS_RELO_VECTOR_CONTROL_0
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or k0, k1
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li k1, 0xa0080000
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sw k1, 0(k0)
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--- a/arch/mips/kernel/smp-bmips.c
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+++ b/arch/mips/kernel/smp-bmips.c
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@@ -196,9 +196,15 @@ static void bmips_init_secondary(void)
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#if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380)
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void __iomem *cbr = BMIPS_GET_CBR();
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unsigned long old_vec;
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+ unsigned long relo_vector;
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+ int boot_cpu;
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- old_vec = __raw_readl(cbr + BMIPS_RELO_VECTOR_CONTROL_1);
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- __raw_writel(old_vec & ~0x20000000, cbr + BMIPS_RELO_VECTOR_CONTROL_1);
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+ boot_cpu = !!(read_c0_brcm_cmt_local() & (1 << 31));
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+ relo_vector = boot_cpu ? BMIPS_RELO_VECTOR_CONTROL_0 :
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+ BMIPS_RELO_VECTOR_CONTROL_1;
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+
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+ old_vec = __raw_readl(cbr + relo_vector);
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+ __raw_writel(old_vec & ~0x20000000, cbr + relo_vector);
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clear_c0_cause(smp_processor_id() ? C_SW1 : C_SW0);
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#elif defined(CONFIG_CPU_BMIPS5000)
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