mirror of https://github.com/hak5/openwrt-owl.git
355 lines
12 KiB
Diff
355 lines
12 KiB
Diff
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--- a/drivers/tty/serial/amba-pl010.c
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+++ b/drivers/tty/serial/amba-pl010.c
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@@ -48,11 +48,9 @@
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#include <linux/slab.h>
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#include <linux/io.h>
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-#define UART_NR 8
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-
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#define SERIAL_AMBA_MAJOR 204
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#define SERIAL_AMBA_MINOR 16
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-#define SERIAL_AMBA_NR UART_NR
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+#define SERIAL_AMBA_NR CONFIG_SERIAL_AMBA_PL010_NUMPORTS
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#define AMBA_ISR_PASS_LIMIT 256
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@@ -78,9 +76,9 @@ static void pl010_stop_tx(struct uart_po
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struct uart_amba_port *uap = (struct uart_amba_port *)port;
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unsigned int cr;
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- cr = readb(uap->port.membase + UART010_CR);
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+ cr = __raw_readl(uap->port.membase + UART010_CR);
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cr &= ~UART010_CR_TIE;
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- writel(cr, uap->port.membase + UART010_CR);
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+ __raw_writel(cr, uap->port.membase + UART010_CR);
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}
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static void pl010_start_tx(struct uart_port *port)
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@@ -88,9 +86,9 @@ static void pl010_start_tx(struct uart_p
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struct uart_amba_port *uap = (struct uart_amba_port *)port;
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unsigned int cr;
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- cr = readb(uap->port.membase + UART010_CR);
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+ cr = __raw_readl(uap->port.membase + UART010_CR);
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cr |= UART010_CR_TIE;
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- writel(cr, uap->port.membase + UART010_CR);
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+ __raw_writel(cr, uap->port.membase + UART010_CR);
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}
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static void pl010_stop_rx(struct uart_port *port)
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@@ -98,9 +96,9 @@ static void pl010_stop_rx(struct uart_po
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struct uart_amba_port *uap = (struct uart_amba_port *)port;
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unsigned int cr;
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- cr = readb(uap->port.membase + UART010_CR);
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+ cr = __raw_readl(uap->port.membase + UART010_CR);
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cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
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- writel(cr, uap->port.membase + UART010_CR);
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+ __raw_writel(cr, uap->port.membase + UART010_CR);
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}
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static void pl010_enable_ms(struct uart_port *port)
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@@ -108,18 +106,18 @@ static void pl010_enable_ms(struct uart_
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struct uart_amba_port *uap = (struct uart_amba_port *)port;
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unsigned int cr;
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- cr = readb(uap->port.membase + UART010_CR);
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+ cr = __raw_readl(uap->port.membase + UART010_CR);
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cr |= UART010_CR_MSIE;
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- writel(cr, uap->port.membase + UART010_CR);
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+ __raw_writel(cr, uap->port.membase + UART010_CR);
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}
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static void pl010_rx_chars(struct uart_amba_port *uap)
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{
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unsigned int status, ch, flag, rsr, max_count = 256;
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- status = readb(uap->port.membase + UART01x_FR);
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+ status = __raw_readl(uap->port.membase + UART01x_FR);
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while (UART_RX_DATA(status) && max_count--) {
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- ch = readb(uap->port.membase + UART01x_DR);
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+ ch = __raw_readl(uap->port.membase + UART01x_DR);
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flag = TTY_NORMAL;
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uap->port.icount.rx++;
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@@ -128,9 +126,9 @@ static void pl010_rx_chars(struct uart_a
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* Note that the error handling code is
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* out of the main execution path
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*/
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- rsr = readb(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
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+ rsr = __raw_readl(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
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if (unlikely(rsr & UART01x_RSR_ANY)) {
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- writel(0, uap->port.membase + UART01x_ECR);
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+ __raw_writel(0, uap->port.membase + UART01x_ECR);
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if (rsr & UART01x_RSR_BE) {
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rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
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@@ -160,7 +158,7 @@ static void pl010_rx_chars(struct uart_a
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uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag);
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ignore_char:
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- status = readb(uap->port.membase + UART01x_FR);
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+ status = __raw_readl(uap->port.membase + UART01x_FR);
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}
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spin_unlock(&uap->port.lock);
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tty_flip_buffer_push(&uap->port.state->port);
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@@ -173,7 +171,7 @@ static void pl010_tx_chars(struct uart_a
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int count;
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if (uap->port.x_char) {
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- writel(uap->port.x_char, uap->port.membase + UART01x_DR);
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+ __raw_writel(uap->port.x_char, uap->port.membase + UART01x_DR);
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uap->port.icount.tx++;
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uap->port.x_char = 0;
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return;
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@@ -185,7 +183,7 @@ static void pl010_tx_chars(struct uart_a
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count = uap->port.fifosize >> 1;
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do {
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- writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
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+ __raw_writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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uap->port.icount.tx++;
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if (uart_circ_empty(xmit))
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@@ -203,9 +201,9 @@ static void pl010_modem_status(struct ua
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{
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unsigned int status, delta;
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- writel(0, uap->port.membase + UART010_ICR);
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+ __raw_writel(0, uap->port.membase + UART010_ICR);
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- status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
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+ status = __raw_readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
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delta = status ^ uap->old_status;
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uap->old_status = status;
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@@ -233,7 +231,7 @@ static irqreturn_t pl010_int(int irq, vo
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spin_lock(&uap->port.lock);
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- status = readb(uap->port.membase + UART010_IIR);
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+ status = __raw_readl(uap->port.membase + UART010_IIR);
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if (status) {
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do {
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if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
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@@ -246,7 +244,7 @@ static irqreturn_t pl010_int(int irq, vo
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if (pass_counter-- == 0)
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break;
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- status = readb(uap->port.membase + UART010_IIR);
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+ status = __raw_readl(uap->port.membase + UART010_IIR);
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} while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
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UART010_IIR_TIS));
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handled = 1;
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@@ -260,7 +258,7 @@ static irqreturn_t pl010_int(int irq, vo
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static unsigned int pl010_tx_empty(struct uart_port *port)
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{
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struct uart_amba_port *uap = (struct uart_amba_port *)port;
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- unsigned int status = readb(uap->port.membase + UART01x_FR);
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+ unsigned int status = __raw_readl(uap->port.membase + UART01x_FR);
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return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
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}
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@@ -270,7 +268,7 @@ static unsigned int pl010_get_mctrl(stru
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unsigned int result = 0;
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unsigned int status;
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- status = readb(uap->port.membase + UART01x_FR);
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+ status = __raw_readl(uap->port.membase + UART01x_FR);
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if (status & UART01x_FR_DCD)
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result |= TIOCM_CAR;
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if (status & UART01x_FR_DSR)
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@@ -296,12 +294,12 @@ static void pl010_break_ctl(struct uart_
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unsigned int lcr_h;
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spin_lock_irqsave(&uap->port.lock, flags);
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- lcr_h = readb(uap->port.membase + UART010_LCRH);
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+ lcr_h = __raw_readl(uap->port.membase + UART010_LCRH);
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if (break_state == -1)
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lcr_h |= UART01x_LCRH_BRK;
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else
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lcr_h &= ~UART01x_LCRH_BRK;
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- writel(lcr_h, uap->port.membase + UART010_LCRH);
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+ __raw_writel(lcr_h, uap->port.membase + UART010_LCRH);
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spin_unlock_irqrestore(&uap->port.lock, flags);
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}
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@@ -329,12 +327,12 @@ static int pl010_startup(struct uart_por
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/*
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* initialise the old status of the modem signals
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*/
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- uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
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+ uap->old_status = __raw_readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
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/*
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* Finally, enable interrupts
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*/
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- writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
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+ __raw_writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
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uap->port.membase + UART010_CR);
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return 0;
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@@ -357,10 +355,10 @@ static void pl010_shutdown(struct uart_p
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/*
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* disable all interrupts, disable the port
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*/
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- writel(0, uap->port.membase + UART010_CR);
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+ __raw_writel(0, uap->port.membase + UART010_CR);
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/* disable break condition and fifos */
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- writel(readb(uap->port.membase + UART010_LCRH) &
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+ __raw_writel(__raw_readl(uap->port.membase + UART010_LCRH) &
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~(UART01x_LCRH_BRK | UART01x_LCRH_FEN),
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uap->port.membase + UART010_LCRH);
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@@ -382,7 +380,7 @@ pl010_set_termios(struct uart_port *port
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/*
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* Ask the core to calculate the divisor for us.
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*/
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- baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
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+ baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
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quot = uart_get_divisor(port, baud);
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switch (termios->c_cflag & CSIZE) {
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@@ -445,25 +443,25 @@ pl010_set_termios(struct uart_port *port
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uap->port.ignore_status_mask |= UART_DUMMY_RSR_RX;
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/* first, disable everything */
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- old_cr = readb(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
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+ old_cr = __raw_readl(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
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if (UART_ENABLE_MS(port, termios->c_cflag))
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old_cr |= UART010_CR_MSIE;
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- writel(0, uap->port.membase + UART010_CR);
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+ __raw_writel(0, uap->port.membase + UART010_CR);
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/* Set baud rate */
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quot -= 1;
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- writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
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- writel(quot & 0xff, uap->port.membase + UART010_LCRL);
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+ __raw_writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
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+ __raw_writel(quot & 0xff, uap->port.membase + UART010_LCRL);
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/*
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* ----------v----------v----------v----------v-----
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* NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
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* ----------^----------^----------^----------^-----
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*/
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- writel(lcr_h, uap->port.membase + UART010_LCRH);
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- writel(old_cr, uap->port.membase + UART010_CR);
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+ __raw_writel(lcr_h, uap->port.membase + UART010_LCRH);
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+ __raw_writel(old_cr, uap->port.membase + UART010_CR);
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spin_unlock_irqrestore(&uap->port.lock, flags);
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}
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@@ -545,7 +543,7 @@ static struct uart_ops amba_pl010_pops =
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.verify_port = pl010_verify_port,
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};
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-static struct uart_amba_port *amba_ports[UART_NR];
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+static struct uart_amba_port *amba_ports[SERIAL_AMBA_NR];
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#ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
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@@ -555,10 +553,10 @@ static void pl010_console_putchar(struct
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unsigned int status;
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do {
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- status = readb(uap->port.membase + UART01x_FR);
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+ status = __raw_readl(uap->port.membase + UART01x_FR);
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barrier();
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} while (!UART_TX_READY(status));
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- writel(ch, uap->port.membase + UART01x_DR);
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+ __raw_writel(ch, uap->port.membase + UART01x_DR);
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}
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static void
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@@ -572,8 +570,8 @@ pl010_console_write(struct console *co,
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/*
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* First save the CR then disable the interrupts
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*/
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- old_cr = readb(uap->port.membase + UART010_CR);
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- writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
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+ old_cr = __raw_readl(uap->port.membase + UART010_CR);
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+ __raw_writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
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uart_console_write(&uap->port, s, count, pl010_console_putchar);
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@@ -582,10 +580,10 @@ pl010_console_write(struct console *co,
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* and restore the TCR
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*/
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do {
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- status = readb(uap->port.membase + UART01x_FR);
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+ status = __raw_readl(uap->port.membase + UART01x_FR);
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barrier();
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} while (status & UART01x_FR_BUSY);
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- writel(old_cr, uap->port.membase + UART010_CR);
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+ __raw_writel(old_cr, uap->port.membase + UART010_CR);
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clk_disable(uap->clk);
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}
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@@ -594,9 +592,9 @@ static void __init
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pl010_console_get_options(struct uart_amba_port *uap, int *baud,
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int *parity, int *bits)
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{
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- if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
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+ if (__raw_readl(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
|
||
|
|
unsigned int lcr_h, quot;
|
||
|
|
- lcr_h = readb(uap->port.membase + UART010_LCRH);
|
||
|
|
+ lcr_h = __raw_readl(uap->port.membase + UART010_LCRH);
|
||
|
|
|
||
|
|
*parity = 'n';
|
||
|
|
if (lcr_h & UART01x_LCRH_PEN) {
|
||
|
|
@@ -611,8 +609,8 @@ pl010_console_get_options(struct uart_am
|
||
|
|
else
|
||
|
|
*bits = 8;
|
||
|
|
|
||
|
|
- quot = readb(uap->port.membase + UART010_LCRL) |
|
||
|
|
- readb(uap->port.membase + UART010_LCRM) << 8;
|
||
|
|
+ quot = __raw_readl(uap->port.membase + UART010_LCRL) |
|
||
|
|
+ __raw_readl(uap->port.membase + UART010_LCRM) << 8;
|
||
|
|
*baud = uap->port.uartclk / (16 * (quot + 1));
|
||
|
|
}
|
||
|
|
}
|
||
|
|
@@ -631,7 +629,7 @@ static int __init pl010_console_setup(st
|
||
|
|
* if so, search for the first available port that does have
|
||
|
|
* console support.
|
||
|
|
*/
|
||
|
|
- if (co->index >= UART_NR)
|
||
|
|
+ if (co->index >= SERIAL_AMBA_NR)
|
||
|
|
co->index = 0;
|
||
|
|
uap = amba_ports[co->index];
|
||
|
|
if (!uap)
|
||
|
|
@@ -673,7 +671,7 @@ static struct uart_driver amba_reg = {
|
||
|
|
.dev_name = "ttyAM",
|
||
|
|
.major = SERIAL_AMBA_MAJOR,
|
||
|
|
.minor = SERIAL_AMBA_MINOR,
|
||
|
|
- .nr = UART_NR,
|
||
|
|
+ .nr = SERIAL_AMBA_NR,
|
||
|
|
.cons = AMBA_CONSOLE,
|
||
|
|
};
|
||
|
|
|
||
|
|
--- a/drivers/tty/serial/Kconfig
|
||
|
|
+++ b/drivers/tty/serial/Kconfig
|
||
|
|
@@ -25,10 +25,18 @@ config SERIAL_AMBA_PL010
|
||
|
|
help
|
||
|
|
This selects the ARM(R) AMBA(R) PrimeCell PL010 UART. If you have
|
||
|
|
an Integrator/AP or Integrator/PP2 platform, or if you have a
|
||
|
|
- Cirrus Logic EP93xx CPU, say Y or M here.
|
||
|
|
+ Cirrus Logic EP93xx CPU or an Infineon ADM5120 SOC, say Y or M here.
|
||
|
|
|
||
|
|
If unsure, say N.
|
||
|
|
|
||
|
|
+config SERIAL_AMBA_PL010_NUMPORTS
|
||
|
|
+ int "Maximum number of AMBA PL010 serial ports"
|
||
|
|
+ depends on SERIAL_AMBA_PL010
|
||
|
|
+ default "8"
|
||
|
|
+ ---help---
|
||
|
|
+ Set this to the number of serial ports you want the AMBA PL010 driver
|
||
|
|
+ to support.
|
||
|
|
+
|
||
|
|
config SERIAL_AMBA_PL010_CONSOLE
|
||
|
|
bool "Support for console on AMBA serial port"
|
||
|
|
depends on SERIAL_AMBA_PL010=y
|