mirror of https://github.com/hak5/openwrt-owl.git
997 lines
25 KiB
C
997 lines
25 KiB
C
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/*
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* HCD driver for ADM5120 SoC
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*
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* Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
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*
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* Based on the ADMtek 2.4 driver
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* (C) Copyright 2003 Junius Chen <juniusc@admtek.com.tw>
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* Which again was based on the ohci and uhci drivers.
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*/
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/debugfs.h>
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#include <linux/seq_file.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/list.h>
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#include <linux/usb.h>
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#include <linux/platform_device.h>
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#include <asm/bootinfo.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/system.h>
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#include <asm/byteorder.h>
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#include <asm/mach-adm5120/adm5120_info.h>
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#include "../core/hcd.h"
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MODULE_DESCRIPTION("ADM5120 USB Host Controller Driver");
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Jeroen Vreeken (pe1rxq@amsat.org)");
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#define PFX "adm5120-hcd: "
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#define ADMHCD_REG_CONTROL 0x00
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#define ADMHCD_SW_RESET 0x00000008 /* Reset */
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#define ADMHCD_DMAA 0x00000004 /* DMA arbitration control */
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#define ADMHCD_SW_INTREQ 0x00000002 /* request software int */
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#define ADMHCD_HOST_EN 0x00000001 /* Host enable */
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#define ADMHCD_REG_INTSTATUS 0x04
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#define ADMHCD_INT_ACT 0x80000000 /* Interrupt active */
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#define ADMHCD_INT_FATAL 0x40000000 /* Fatal interrupt */
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#define ADMHCD_INT_SW 0x20000000 /* software interrupt */
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#define ADMHCD_INT_TD 0x00100000 /* TD completed */
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#define ADMHCD_FNO 0x00000800 /* Frame number overaflow */
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#define ADMHCD_SO 0x00000400 /* Scheduling overrun */
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#define ADMHCD_INSMI 0x00000200 /* Root hub status change */
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#define ADMHCD_BABI 0x00000100 /* Babble detected, host mode */
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#define ADMHCD_RESI 0x00000020 /* Resume detected */
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#define ADMHCD_SOFI 0x00000010 /* SOF transmitted/received, host mode */
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#define ADMHCD_REG_INTENABLE 0x08
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#define ADMHCD_INT_EN 0x80000000 /* Interrupt enable */
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#define ADMHCD_INTMASK 0x00000001 /* Interrupt mask */
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#define ADMHCD_REG_HOSTCONTROL 0x10
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#define ADMHCD_DMA_EN 0x00000004 /* USB host DMA enable */
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#define ADMHCD_STATE_MASK 0x00000003
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#define ADMHCD_STATE_RST 0x00000000 /* bus state reset */
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#define ADMHCD_STATE_RES 0x00000001 /* bus state resume */
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#define ADMHCD_STATE_OP 0x00000002 /* bus state operational */
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#define ADMHCD_STATE_SUS 0x00000003 /* bus state suspended */
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#define ADMHCD_REG_FMINTERVAL 0x18
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#define ADMHCD_REG_FMNUMBER 0x1c
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#define ADMHCD_REG_LSTHRESH 0x70
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#define ADMHCD_REG_RHDESCR 0x74
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#define ADMHCD_CRWE 0x20000000 /* Clear wakeup enable */
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#define ADMHCD_DRWE 0x10000000 /* Device remote wakeup enable */
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#define ADMHCD_HW_OCIC 0x08000000 /* Over current indication change */
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#define ADMHCD_LPSC 0x04000000 /* Local power switch change */
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#define ADMHCD_OCI 0x02000000 /* Over current indication */
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#define ADMHCD_LPS 0x01000000 /* Local power switch/global power switch */
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#define ADMHCD_NOCP 0x00000800 /* No over current protect mode */
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#define ADMHCD_OPCM 0x00000400 /* Over current protect mode */
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#define ADMHCD_NPS 0x00000200 /* No Power Switch */
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#define ADMHCD_PSM 0x00000100 /* Power switch mode */
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#define ADMHCD_REG_PORTSTATUS0 0x78
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#define ADMHCD_CCS 0x00000001 /* current connect status */
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#define ADMHCD_PES 0x00000002 /* port enable status */
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#define ADMHCD_PSS 0x00000004 /* port suspend status */
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#define ADMHCD_POCI 0x00000008 /* port overcurrent indicator */
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#define ADMHCD_PRS 0x00000010 /* port reset status */
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#define ADMHCD_PPS 0x00000100 /* port power status */
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#define ADMHCD_LSDA 0x00000200 /* low speed device attached */
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#define ADMHCD_CSC 0x00010000 /* connect status change */
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#define ADMHCD_PESC 0x00020000 /* enable status change */
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#define ADMHCD_PSSC 0x00040000 /* suspend status change */
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#define ADMHCD_OCIC 0x00080000 /* overcurrent change*/
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#define ADMHCD_PRSC 0x00100000 /* reset status change */
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#define ADMHCD_REG_PORTSTATUS1 0x7c
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#define ADMHCD_REG_HOSTHEAD 0x80
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#define ADMHCD_NUMPORTS 1
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#define ADMHCD_DESC_ALIGN 16
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struct admhcd_ed {
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/* Don't change first four, they used for DMA */
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u32 control;
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struct admhcd_td *tail;
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struct admhcd_td *head;
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struct admhcd_ed *next;
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/* the rest is for the driver only: */
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struct admhcd_td *cur;
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struct usb_host_endpoint *ep;
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struct urb *urb;
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struct admhcd_ed *real;
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} __attribute__ ((packed));
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#define ADMHCD_ED_EPSHIFT 7 /* Shift for endpoint number */
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#define ADMHCD_ED_INT 0x00000800 /* Is this an int endpoint */
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#define ADMHCD_ED_SPEED 0x00002000 /* Is it a high speed dev? */
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#define ADMHCD_ED_SKIP 0x00004000 /* Skip this ED */
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#define ADMHCD_ED_FORMAT 0x00008000 /* Is this an isoc endpoint */
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#define ADMHCD_ED_MAXSHIFT 16 /* Shift for max packet size */
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struct admhcd_td {
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/* Don't change first four, they are used for DMA */
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u32 control;
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u32 buffer;
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u32 buflen;
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struct admhcd_td *next;
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/* the rest is for the driver only: */
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struct urb *urb;
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struct admhcd_td *real;
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} __attribute__ ((packed));
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#define ADMHCD_TD_OWN 0x80000000
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#define ADMHCD_TD_TOGGLE 0x00000000
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#define ADMHCD_TD_DATA0 0x01000000
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#define ADMHCD_TD_DATA1 0x01800000
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#define ADMHCD_TD_OUT 0x00200000
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#define ADMHCD_TD_IN 0x00400000
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#define ADMHCD_TD_SETUP 0x00000000
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#define ADMHCD_TD_ISO 0x00010000
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#define ADMHCD_TD_R 0x00040000
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#define ADMHCD_TD_INTEN 0x00010000
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static int admhcd_td_err[16] = {
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0, /* No */
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-EREMOTEIO, /* CRC */
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-EREMOTEIO, /* bit stuff */
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-EREMOTEIO, /* data toggle */
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-EPIPE, /* stall */
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-ETIMEDOUT, /* timeout */
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-EPROTO, /* pid err */
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-EPROTO, /* unexpected pid */
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-EREMOTEIO, /* data overrun */
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-EREMOTEIO, /* data underrun */
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-ETIMEDOUT, /* 1010 */
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-ETIMEDOUT, /* 1011 */
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-EREMOTEIO, /* buffer overrun */
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-EREMOTEIO, /* buffer underrun */
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-ETIMEDOUT, /* 1110 */
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-ETIMEDOUT, /* 1111 */
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};
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#define ADMHCD_TD_ERRMASK 0x38000000
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#define ADMHCD_TD_ERRSHIFT 27
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#define TD(td) ((struct admhcd_td *)(((u32)(td)) & ~(ADMHCD_DESC_ALIGN-1)))
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#define ED(ed) ((struct admhcd_ed *)(((u32)(ed)) & ~(ADMHCD_DESC_ALIGN-1)))
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struct admhcd {
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spinlock_t lock;
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/* Root hub registers */
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u32 rhdesca;
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u32 rhdescb;
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u32 rhstatus;
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u32 rhport[2];
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/* async schedule: control, bulk */
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struct list_head async;
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u32 base;
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u32 dma_en;
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unsigned long flags;
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};
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static inline struct admhcd *hcd_to_admhcd(struct usb_hcd *hcd)
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{
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return (struct admhcd *)(hcd->hcd_priv);
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}
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static inline struct usb_hcd *admhcd_to_hcd(struct admhcd *admhcd)
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{
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return container_of((void *)admhcd, struct usb_hcd, hcd_priv);
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}
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static char hcd_name[] = "adm5120-hcd";
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static u32 admhcd_reg_get(struct admhcd *ahcd, int reg)
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{
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return *(volatile u32 *)KSEG1ADDR(ahcd->base+reg);
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}
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static void admhcd_reg_set(struct admhcd *ahcd, int reg, u32 val)
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{
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*(volatile u32 *)KSEG1ADDR(ahcd->base+reg) = val;
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}
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static void admhcd_lock(struct admhcd *ahcd)
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{
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spin_lock_irqsave(&ahcd->lock, ahcd->flags);
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ahcd->dma_en = admhcd_reg_get(ahcd, ADMHCD_REG_HOSTCONTROL) &
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ADMHCD_DMA_EN;
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admhcd_reg_set(ahcd, ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP);
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}
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static void admhcd_unlock(struct admhcd *ahcd)
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{
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admhcd_reg_set(ahcd, ADMHCD_REG_HOSTCONTROL,
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ADMHCD_STATE_OP | ahcd->dma_en);
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spin_unlock_irqrestore(&ahcd->lock, ahcd->flags);
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}
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static struct admhcd_td *admhcd_td_alloc(struct admhcd_ed *ed, struct urb *urb)
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{
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struct admhcd_td *tdn, *td;
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tdn = kzalloc(sizeof(*tdn)+ADMHCD_DESC_ALIGN, GFP_ATOMIC);
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if (!tdn)
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return NULL;
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tdn->real = tdn;
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tdn = TD(KSEG1ADDR(tdn));
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if (ed->cur == NULL) {
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ed->cur = tdn;
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ed->head = tdn;
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ed->tail = tdn;
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td = tdn;
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} else {
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/* Supply back the old tail and link in new td as tail */
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td = TD(ed->tail);
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TD(ed->tail)->next = tdn;
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ed->tail = tdn;
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}
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td->urb = urb;
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return td;
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}
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static void admhcd_td_free(struct admhcd_ed *ed, struct urb *urb)
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{
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struct admhcd_td *td, **tdp;
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if (urb == NULL)
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ed->control |= ADMHCD_ED_SKIP;
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tdp = &ed->cur;
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td = ed->cur;
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do {
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if (td->urb == urb)
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break;
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tdp = &td->next;
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td = TD(td->next);
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} while (td);
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while (td && td->urb == urb) {
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*tdp = TD(td->next);
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kfree(td->real);
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td = *tdp;
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}
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}
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/* Find an endpoint's descriptor, if needed allocate a new one and link it
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in the DMA chain
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*/
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static struct admhcd_ed *admhcd_get_ed(struct admhcd *ahcd,
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struct usb_host_endpoint *ep, struct urb *urb)
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{
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struct admhcd_ed *hosthead;
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struct admhcd_ed *found = NULL, *ed = NULL;
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unsigned int pipe = urb->pipe;
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admhcd_lock(ahcd);
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hosthead = (struct admhcd_ed *)admhcd_reg_get(ahcd, ADMHCD_REG_HOSTHEAD);
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if (hosthead) {
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for (ed = hosthead;; ed = ED(ed->next)) {
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if (ed->ep == ep) {
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found = ed;
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break;
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}
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if (ED(ed->next) == hosthead)
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break;
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}
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}
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if (!found) {
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found = kzalloc(sizeof(*found)+ADMHCD_DESC_ALIGN, GFP_ATOMIC);
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if (!found)
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goto out;
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found->real = found;
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found->ep = ep;
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found = ED(KSEG1ADDR(found));
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found->control = usb_pipedevice(pipe) |
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(usb_pipeendpoint(pipe) << ADMHCD_ED_EPSHIFT) |
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(usb_pipeint(pipe) ? ADMHCD_ED_INT : 0) |
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(urb->dev->speed == USB_SPEED_FULL ? ADMHCD_ED_SPEED : 0) |
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(usb_pipeisoc(pipe) ? ADMHCD_ED_FORMAT : 0) |
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(usb_maxpacket(urb->dev, pipe, usb_pipeout(pipe)) << ADMHCD_ED_MAXSHIFT);
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/* Alloc first dummy td */
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admhcd_td_alloc(found, NULL);
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if (hosthead) {
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found->next = hosthead;
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ed->next = found;
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} else {
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found->next = found;
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admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, (u32)found);
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}
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}
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out:
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admhcd_unlock(ahcd);
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return found;
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}
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static struct admhcd_td *admhcd_td_fill(u32 control, struct admhcd_td *td,
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dma_addr_t data, int len)
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{
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td->buffer = data;
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td->buflen = len;
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td->control = control;
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return TD(td->next);
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}
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static void admhcd_ed_start(struct admhcd *ahcd, struct admhcd_ed *ed)
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{
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struct admhcd_td *td = ed->cur;
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if (ed->urb)
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return;
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if (td->urb) {
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ed->urb = td->urb;
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while (1) {
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td->control |= ADMHCD_TD_OWN;
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if (TD(td->next)->urb != td->urb) {
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td->buflen |= ADMHCD_TD_INTEN;
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break;
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}
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td = TD(td->next);
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}
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}
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ed->head = TD(ed->head);
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ahcd->dma_en |= ADMHCD_DMA_EN;
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}
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static irqreturn_t admhcd_irq(struct usb_hcd *hcd)
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{
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struct admhcd *ahcd = hcd_to_admhcd(hcd);
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u32 intstatus;
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intstatus = admhcd_reg_get(ahcd, ADMHCD_REG_INTSTATUS);
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if (intstatus & ADMHCD_INT_FATAL) {
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admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_FATAL);
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/* FIXME: handle fatal interrupts */
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}
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if (intstatus & ADMHCD_INT_SW) {
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admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_SW);
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/* FIXME: handle software interrupts */
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}
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if (intstatus & ADMHCD_INT_TD) {
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struct admhcd_ed *ed, *head;
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admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_TD);
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head = (struct admhcd_ed *)admhcd_reg_get(ahcd, ADMHCD_REG_HOSTHEAD);
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ed = head;
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if (ed) do {
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/* Is it a finished TD? */
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if (ed->urb && !(ed->cur->control & ADMHCD_TD_OWN)) {
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struct admhcd_td *td;
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int error;
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td = ed->cur;
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error = (td->control & ADMHCD_TD_ERRMASK) >>
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ADMHCD_TD_ERRSHIFT;
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ed->urb->status = admhcd_td_err[error];
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admhcd_td_free(ed, ed->urb);
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// Calculate real length!!!
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ed->urb->actual_length = ed->urb->transfer_buffer_length;
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ed->urb->hcpriv = NULL;
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usb_hcd_giveback_urb(hcd, ed->urb);
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ed->urb = NULL;
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}
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admhcd_ed_start(ahcd, ed);
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ed = ED(ed->next);
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} while (ed != head);
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}
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return IRQ_HANDLED;
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}
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static int admhcd_urb_enqueue(struct usb_hcd *hcd, struct usb_host_endpoint *ep,
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struct urb *urb, gfp_t mem_flags)
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||
|
{
|
||
|
struct admhcd *ahcd = hcd_to_admhcd(hcd);
|
||
|
struct admhcd_ed *ed;
|
||
|
struct admhcd_td *td;
|
||
|
int size = 0, i, zero = 0, ret = 0;
|
||
|
unsigned int pipe = urb->pipe, toggle = 0;
|
||
|
dma_addr_t data = (dma_addr_t)urb->transfer_buffer;
|
||
|
int data_len = urb->transfer_buffer_length;
|
||
|
|
||
|
ed = admhcd_get_ed(ahcd, ep, urb);
|
||
|
if (!ed)
|
||
|
return -ENOMEM;
|
||
|
|
||
|
switch(usb_pipetype(pipe)) {
|
||
|
case PIPE_CONTROL:
|
||
|
size = 2;
|
||
|
case PIPE_INTERRUPT:
|
||
|
case PIPE_BULK:
|
||
|
default:
|
||
|
size += urb->transfer_buffer_length / 4096;
|
||
|
if (urb->transfer_buffer_length % 4096)
|
||
|
size++;
|
||
|
if (size == 0)
|
||
|
size++;
|
||
|
else if (urb->transfer_flags & URB_ZERO_PACKET &&
|
||
|
!(urb->transfer_buffer_length %
|
||
|
usb_maxpacket(urb->dev, pipe, usb_pipeout(pipe)))) {
|
||
|
size++;
|
||
|
zero = 1;
|
||
|
}
|
||
|
break;
|
||
|
case PIPE_ISOCHRONOUS:
|
||
|
size = urb->number_of_packets;
|
||
|
break;
|
||
|
}
|
||
|
|
||
|
admhcd_lock(ahcd);
|
||
|
/* Remember the first td */
|
||
|
td = admhcd_td_alloc(ed, urb);
|
||
|
if (!td) {
|
||
|
ret = -ENOMEM;
|
||
|
goto out;
|
||
|
}
|
||
|
/* Allocate additionall tds first */
|
||
|
for (i = 1; i < size; i++) {
|
||
|
if (admhcd_td_alloc(ed, urb) == NULL) {
|
||
|
admhcd_td_free(ed, urb);
|
||
|
ret = -ENOMEM;
|
||
|
goto out;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
if (usb_gettoggle(urb->dev, usb_pipeendpoint(pipe), usb_pipeout(pipe)))
|
||
|
toggle = ADMHCD_TD_TOGGLE;
|
||
|
else {
|
||
|
toggle = ADMHCD_TD_DATA0;
|
||
|
usb_settoggle(urb->dev, usb_pipeendpoint(pipe),
|
||
|
usb_pipeout(pipe), 1);
|
||
|
}
|
||
|
|
||
|
switch(usb_pipetype(pipe)) {
|
||
|
case PIPE_CONTROL:
|
||
|
td = admhcd_td_fill(ADMHCD_TD_SETUP | ADMHCD_TD_DATA0,
|
||
|
td, (dma_addr_t)urb->setup_packet, 8);
|
||
|
while (data_len > 0) {
|
||
|
td = admhcd_td_fill(ADMHCD_TD_DATA1
|
||
|
| ADMHCD_TD_R |
|
||
|
(usb_pipeout(pipe) ?
|
||
|
ADMHCD_TD_OUT : ADMHCD_TD_IN), td,
|
||
|
data, data_len % 4097);
|
||
|
data_len -= 4096;
|
||
|
}
|
||
|
admhcd_td_fill(ADMHCD_TD_DATA1 | (usb_pipeout(pipe) ?
|
||
|
ADMHCD_TD_IN : ADMHCD_TD_OUT), td,
|
||
|
data, 0);
|
||
|
break;
|
||
|
case PIPE_INTERRUPT:
|
||
|
case PIPE_BULK:
|
||
|
//info ok for interrupt?
|
||
|
i = 0;
|
||
|
while(data_len > 4096) {
|
||
|
td = admhcd_td_fill((usb_pipeout(pipe) ?
|
||
|
ADMHCD_TD_OUT :
|
||
|
ADMHCD_TD_IN | ADMHCD_TD_R) |
|
||
|
(i ? ADMHCD_TD_TOGGLE : toggle), td,
|
||
|
data, 4096);
|
||
|
data += 4096;
|
||
|
data_len -= 4096;
|
||
|
i++;
|
||
|
}
|
||
|
td = admhcd_td_fill((usb_pipeout(pipe) ?
|
||
|
ADMHCD_TD_OUT : ADMHCD_TD_IN) |
|
||
|
(i ? ADMHCD_TD_TOGGLE : toggle), td, data, data_len);
|
||
|
i++;
|
||
|
if (zero)
|
||
|
admhcd_td_fill((usb_pipeout(pipe) ?
|
||
|
ADMHCD_TD_OUT : ADMHCD_TD_IN) |
|
||
|
(i ? ADMHCD_TD_TOGGLE : toggle), td, 0, 0);
|
||
|
break;
|
||
|
case PIPE_ISOCHRONOUS:
|
||
|
for (i = 0; i < urb->number_of_packets; i++) {
|
||
|
td = admhcd_td_fill(ADMHCD_TD_ISO |
|
||
|
((urb->start_frame + i) & 0xffff), td,
|
||
|
data + urb->iso_frame_desc[i].offset,
|
||
|
urb->iso_frame_desc[i].length);
|
||
|
}
|
||
|
break;
|
||
|
}
|
||
|
urb->hcpriv = ed;
|
||
|
admhcd_ed_start(ahcd, ed);
|
||
|
out:
|
||
|
admhcd_unlock(ahcd);
|
||
|
return ret;
|
||
|
}
|
||
|
|
||
|
static int admhcd_urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
|
||
|
{
|
||
|
struct admhcd *ahcd = hcd_to_admhcd(hcd);
|
||
|
struct admhcd_ed *ed;
|
||
|
|
||
|
admhcd_lock(ahcd);
|
||
|
|
||
|
ed = urb->hcpriv;
|
||
|
if (ed && ed->urb != urb)
|
||
|
admhcd_td_free(ed, urb);
|
||
|
|
||
|
admhcd_unlock(ahcd);
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static void admhcd_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
|
||
|
{
|
||
|
struct admhcd *ahcd = hcd_to_admhcd(hcd);
|
||
|
struct admhcd_ed *ed, *edt, *head;
|
||
|
|
||
|
admhcd_lock(ahcd);
|
||
|
|
||
|
head = (struct admhcd_ed *)admhcd_reg_get(ahcd, ADMHCD_REG_HOSTHEAD);
|
||
|
if (!head)
|
||
|
goto out;
|
||
|
for (ed = head; ED(ed->next) != head; ed = ED(ed->next))
|
||
|
if (ed->ep == ep)
|
||
|
break;
|
||
|
if (ed->ep != ep)
|
||
|
goto out;
|
||
|
while (ed->cur)
|
||
|
admhcd_td_free(ed, ed->cur->urb);
|
||
|
if (head == ed) {
|
||
|
if (ED(ed->next) == ed) {
|
||
|
admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, 0);
|
||
|
ahcd->dma_en = 0;
|
||
|
goto out_free;
|
||
|
}
|
||
|
head = ED(ed->next);
|
||
|
for (edt = head; ED(edt->next) != head; edt = ED(edt->next));
|
||
|
edt->next = ED(ed->next);
|
||
|
admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, (u32)ed->next);
|
||
|
goto out_free;
|
||
|
}
|
||
|
for (edt = head; edt->next != ed; edt = edt->next);
|
||
|
edt->next = ed->next;
|
||
|
|
||
|
out_free:
|
||
|
kfree(ed->real);
|
||
|
out:
|
||
|
admhcd_unlock(ahcd);
|
||
|
}
|
||
|
|
||
|
static int admhcd_get_frame_number(struct usb_hcd *hcd)
|
||
|
{
|
||
|
struct admhcd *ahcd = hcd_to_admhcd(hcd);
|
||
|
|
||
|
return admhcd_reg_get(ahcd, ADMHCD_REG_FMNUMBER) & 0x0000ffff;
|
||
|
}
|
||
|
|
||
|
static int admhcd_hub_status_data(struct usb_hcd *hcd, char *buf)
|
||
|
{
|
||
|
struct admhcd *ahcd = hcd_to_admhcd(hcd);
|
||
|
int port;
|
||
|
|
||
|
*buf = 0;
|
||
|
for (port = 0; port < ADMHCD_NUMPORTS; port++) {
|
||
|
if (admhcd_reg_get(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4) &
|
||
|
(ADMHCD_CSC | ADMHCD_PESC | ADMHCD_PSSC | ADMHCD_OCIC |
|
||
|
ADMHCD_PRSC))
|
||
|
*buf |= (1 << (port + 1));
|
||
|
}
|
||
|
return !!*buf;
|
||
|
}
|
||
|
|
||
|
static __u8 root_hub_hub_des[] = {
|
||
|
0x09, /* __u8 bLength; */
|
||
|
0x29, /* __u8 bDescriptorType; Hub-descriptor */
|
||
|
0x02, /* __u8 bNbrPorts; */
|
||
|
0x0a, 0x00, /* __u16 wHubCharacteristics; */
|
||
|
0x01, /* __u8 bPwrOn2pwrGood; 2ms */
|
||
|
0x00, /* __u8 bHubContrCurrent; 0mA */
|
||
|
0x00, /* __u8 DeviceRemovable; */
|
||
|
0xff, /* __u8 PortPwrCtrlMask; */
|
||
|
};
|
||
|
|
||
|
static int admhcd_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
|
||
|
u16 wIndex, char *buf, u16 wLength)
|
||
|
{
|
||
|
struct admhcd *ahcd = hcd_to_admhcd(hcd);
|
||
|
int retval = 0, len;
|
||
|
unsigned int port = wIndex -1;
|
||
|
|
||
|
switch (typeReq) {
|
||
|
|
||
|
case GetHubStatus:
|
||
|
*(__le32 *)buf = cpu_to_le32(0);
|
||
|
break;
|
||
|
case GetPortStatus:
|
||
|
if (port >= ADMHCD_NUMPORTS)
|
||
|
goto err;
|
||
|
*(__le32 *)buf = cpu_to_le32(
|
||
|
admhcd_reg_get(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4));
|
||
|
break;
|
||
|
case SetHubFeature: /* We don't implement these */
|
||
|
case ClearHubFeature:
|
||
|
switch (wValue) {
|
||
|
case C_HUB_OVER_CURRENT:
|
||
|
case C_HUB_LOCAL_POWER:
|
||
|
break;
|
||
|
default:
|
||
|
goto err;
|
||
|
}
|
||
|
case SetPortFeature:
|
||
|
if (port >= ADMHCD_NUMPORTS)
|
||
|
goto err;
|
||
|
|
||
|
switch (wValue) {
|
||
|
case USB_PORT_FEAT_SUSPEND:
|
||
|
admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
|
||
|
ADMHCD_PSS);
|
||
|
break;
|
||
|
case USB_PORT_FEAT_RESET:
|
||
|
if (admhcd_reg_get(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4)
|
||
|
& ADMHCD_CCS) {
|
||
|
admhcd_reg_set(ahcd,
|
||
|
ADMHCD_REG_PORTSTATUS0 + port*4,
|
||
|
ADMHCD_PRS | ADMHCD_CSC);
|
||
|
mdelay(50);
|
||
|
admhcd_reg_set(ahcd,
|
||
|
ADMHCD_REG_PORTSTATUS0 + port*4,
|
||
|
ADMHCD_PES | ADMHCD_CSC);
|
||
|
}
|
||
|
break;
|
||
|
case USB_PORT_FEAT_POWER:
|
||
|
admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
|
||
|
ADMHCD_PPS);
|
||
|
break;
|
||
|
default:
|
||
|
goto err;
|
||
|
}
|
||
|
break;
|
||
|
case ClearPortFeature:
|
||
|
if (port >= ADMHCD_NUMPORTS)
|
||
|
goto err;
|
||
|
|
||
|
switch (wValue) {
|
||
|
case USB_PORT_FEAT_ENABLE:
|
||
|
admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
|
||
|
ADMHCD_CCS);
|
||
|
break;
|
||
|
case USB_PORT_FEAT_C_ENABLE:
|
||
|
admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
|
||
|
ADMHCD_PESC);
|
||
|
break;
|
||
|
case USB_PORT_FEAT_SUSPEND:
|
||
|
admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
|
||
|
ADMHCD_POCI);
|
||
|
break;
|
||
|
case USB_PORT_FEAT_C_SUSPEND:
|
||
|
admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
|
||
|
ADMHCD_PSSC);
|
||
|
case USB_PORT_FEAT_POWER:
|
||
|
admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
|
||
|
ADMHCD_LSDA);
|
||
|
break;
|
||
|
case USB_PORT_FEAT_C_CONNECTION:
|
||
|
admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
|
||
|
ADMHCD_CSC);
|
||
|
break;
|
||
|
case USB_PORT_FEAT_C_OVER_CURRENT:
|
||
|
admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
|
||
|
ADMHCD_OCIC);
|
||
|
break;
|
||
|
case USB_PORT_FEAT_C_RESET:
|
||
|
admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
|
||
|
ADMHCD_PRSC);
|
||
|
break;
|
||
|
default:
|
||
|
goto err;
|
||
|
}
|
||
|
break;
|
||
|
case GetHubDescriptor:
|
||
|
len = min_t(unsigned int, sizeof(root_hub_hub_des), wLength);
|
||
|
memcpy(buf, root_hub_hub_des, len);
|
||
|
break;
|
||
|
default:
|
||
|
err:
|
||
|
retval = -EPIPE;
|
||
|
}
|
||
|
|
||
|
return retval;
|
||
|
}
|
||
|
|
||
|
static int admhcd_start(struct usb_hcd *hcd)
|
||
|
{
|
||
|
struct admhcd *ahcd = hcd_to_admhcd(hcd);
|
||
|
unsigned long flags;
|
||
|
|
||
|
spin_lock_irqsave(&ahcd->lock, flags);
|
||
|
|
||
|
/* Initialise the HCD registers */
|
||
|
admhcd_reg_set(ahcd, ADMHCD_REG_INTENABLE, 0);
|
||
|
mdelay(10);
|
||
|
|
||
|
admhcd_reg_set(ahcd, ADMHCD_REG_CONTROL, ADMHCD_SW_RESET);
|
||
|
|
||
|
while (admhcd_reg_get(ahcd, ADMHCD_REG_CONTROL) & ADMHCD_SW_RESET) {
|
||
|
printk(KERN_WARNING PFX "waiting for reset to complete\n");
|
||
|
mdelay(1);
|
||
|
}
|
||
|
|
||
|
//hcd->uses_new_polling = 1;
|
||
|
|
||
|
/* Enable USB host mode */
|
||
|
admhcd_reg_set(ahcd, ADMHCD_REG_CONTROL, ADMHCD_HOST_EN);
|
||
|
|
||
|
/* Set host specific settings */
|
||
|
admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, 0x00000000);
|
||
|
admhcd_reg_set(ahcd, ADMHCD_REG_FMINTERVAL, 0x20002edf);
|
||
|
admhcd_reg_set(ahcd, ADMHCD_REG_LSTHRESH, 0x628);
|
||
|
|
||
|
/* Set interrupts */
|
||
|
admhcd_reg_set(ahcd, ADMHCD_REG_INTENABLE, ADMHCD_INT_ACT |
|
||
|
ADMHCD_INT_FATAL | ADMHCD_INT_SW | ADMHCD_INT_TD);
|
||
|
admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_ACT |
|
||
|
ADMHCD_INT_FATAL | ADMHCD_INT_SW | ADMHCD_INT_TD);
|
||
|
|
||
|
/* Power on all ports */
|
||
|
admhcd_reg_set(ahcd, ADMHCD_REG_RHDESCR, ADMHCD_NPS | ADMHCD_LPSC);
|
||
|
|
||
|
/* HCD is now operationnal */
|
||
|
admhcd_reg_set(ahcd, ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP);
|
||
|
|
||
|
hcd->state = HC_STATE_RUNNING;
|
||
|
|
||
|
spin_unlock_irqrestore(&ahcd->lock, flags);
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static int admhcd_sw_reset(struct admhcd *ahcd)
|
||
|
{
|
||
|
int retries = 15;
|
||
|
unsigned long flags;
|
||
|
int ret = 0;
|
||
|
|
||
|
spin_lock_irqsave(&ahcd->lock, flags);
|
||
|
|
||
|
admhcd_reg_set(ahcd, ADMHCD_REG_INTENABLE, 0);
|
||
|
mdelay(10);
|
||
|
|
||
|
admhcd_reg_set(ahcd, ADMHCD_REG_CONTROL, ADMHCD_SW_RESET);
|
||
|
|
||
|
while (--retries) {
|
||
|
mdelay(1);
|
||
|
if (!(admhcd_reg_get(ahcd, ADMHCD_REG_CONTROL) & ADMHCD_SW_RESET))
|
||
|
break;
|
||
|
}
|
||
|
if (!retries) {
|
||
|
printk(KERN_WARNING "%s: software reset timeout\n", hcd_name);
|
||
|
ret = -ETIME;
|
||
|
}
|
||
|
spin_unlock_irqrestore(&ahcd->lock, flags);
|
||
|
return ret;
|
||
|
}
|
||
|
|
||
|
static int admhcd_reset(struct usb_hcd *hcd)
|
||
|
{
|
||
|
struct admhcd *ahcd = hcd_to_admhcd(hcd);
|
||
|
u32 state = 0;
|
||
|
int ret, timeout = 15; /* ms */
|
||
|
unsigned long t;
|
||
|
|
||
|
ret = admhcd_sw_reset(ahcd);
|
||
|
if (ret)
|
||
|
return ret;
|
||
|
|
||
|
t = jiffies + msecs_to_jiffies(timeout);
|
||
|
do {
|
||
|
spin_lock_irq(&ahcd->lock);
|
||
|
state = admhcd_reg_get(ahcd, ADMHCD_REG_HOSTCONTROL);
|
||
|
spin_unlock_irq(&ahcd->lock);
|
||
|
state &= ADMHCD_STATE_MASK;
|
||
|
if (state == ADMHCD_STATE_RST)
|
||
|
break;
|
||
|
msleep(4);
|
||
|
} while (time_before_eq(jiffies, t));
|
||
|
|
||
|
if (state != ADMHCD_STATE_RST) {
|
||
|
printk(KERN_WARNING "%s: device not ready after %dms\n",
|
||
|
hcd_name, timeout);
|
||
|
ret = -ENODEV;
|
||
|
}
|
||
|
|
||
|
return ret;
|
||
|
}
|
||
|
|
||
|
static void admhcd_stop(struct usb_hcd *hcd)
|
||
|
{
|
||
|
struct admhcd *ahcd = hcd_to_admhcd(hcd);
|
||
|
unsigned long flags;
|
||
|
u32 val;
|
||
|
|
||
|
spin_lock_irqsave(&ahcd->lock, flags);
|
||
|
admhcd_reg_set(ahcd, ADMHCD_REG_INTENABLE, 0);
|
||
|
|
||
|
/* Set global control of power for ports */
|
||
|
val = admhcd_reg_get(ahcd, ADMHCD_REG_RHDESCR);
|
||
|
val &= (~ADMHCD_PSM | ADMHCD_LPS);
|
||
|
admhcd_reg_set(ahcd, ADMHCD_REG_RHDESCR, val);
|
||
|
|
||
|
spin_unlock_irqrestore(&ahcd->lock, flags);
|
||
|
|
||
|
/* Ask for software reset */
|
||
|
admhcd_sw_reset(ahcd);
|
||
|
}
|
||
|
|
||
|
|
||
|
static struct hc_driver adm5120_hc_driver = {
|
||
|
.description = hcd_name,
|
||
|
.product_desc = "ADM5120 HCD",
|
||
|
.hcd_priv_size = sizeof(struct admhcd),
|
||
|
.irq = admhcd_irq,
|
||
|
.flags = HCD_USB11,
|
||
|
.urb_enqueue = admhcd_urb_enqueue,
|
||
|
.urb_dequeue = admhcd_urb_dequeue,
|
||
|
.endpoint_disable = admhcd_endpoint_disable,
|
||
|
.get_frame_number = admhcd_get_frame_number,
|
||
|
.hub_status_data = admhcd_hub_status_data,
|
||
|
.hub_control = admhcd_hub_control,
|
||
|
.start = admhcd_start,
|
||
|
.stop = admhcd_stop,
|
||
|
.reset = admhcd_reset,
|
||
|
};
|
||
|
|
||
|
#define resource_len(r) (((r)->end - (r)->start) + 1)
|
||
|
|
||
|
static int __init adm5120hcd_probe(struct platform_device *pdev)
|
||
|
{
|
||
|
struct usb_hcd *hcd;
|
||
|
struct admhcd *ahcd;
|
||
|
struct resource *data;
|
||
|
void __iomem *data_reg;
|
||
|
|
||
|
int err = 0, irq;
|
||
|
|
||
|
if (pdev->num_resources < 2) {
|
||
|
printk(KERN_WARNING PFX "not enough resources\n");
|
||
|
err = -ENODEV;
|
||
|
goto out;
|
||
|
}
|
||
|
|
||
|
irq = platform_get_irq(pdev, 0);
|
||
|
data = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||
|
|
||
|
if (pdev->dev.dma_mask) {
|
||
|
printk(KERN_DEBUG PFX "no we won't dma\n");
|
||
|
return -EINVAL;
|
||
|
}
|
||
|
|
||
|
if (!data || irq < 0) {
|
||
|
printk(KERN_DEBUG PFX "either IRQ or data resource is invalid\n");
|
||
|
err = -ENODEV;
|
||
|
goto out;
|
||
|
}
|
||
|
|
||
|
if (!request_mem_region(data->start, resource_len(data), hcd_name)) {
|
||
|
printk(KERN_DEBUG PFX "cannot request memory regions for the data resource\n");
|
||
|
err = -EBUSY;
|
||
|
goto out;
|
||
|
}
|
||
|
|
||
|
data_reg = ioremap(data->start, resource_len(data));
|
||
|
if (data_reg == NULL) {
|
||
|
printk(KERN_DEBUG PFX "unable to ioremap\n");
|
||
|
err = -ENOMEM;
|
||
|
goto out_mem;
|
||
|
}
|
||
|
|
||
|
hcd = usb_create_hcd(&adm5120_hc_driver, &pdev->dev, pdev->dev.bus_id);
|
||
|
if (!hcd) {
|
||
|
printk(KERN_DEBUG PFX "unable to create the hcd\n");
|
||
|
err = -ENOMEM;
|
||
|
goto out_unmap;
|
||
|
}
|
||
|
|
||
|
hcd->rsrc_start = data->start;
|
||
|
hcd->rsrc_len = resource_len(data);
|
||
|
hcd->regs = data_reg;
|
||
|
|
||
|
ahcd = hcd_to_admhcd(hcd);
|
||
|
ahcd->base = (u32)data_reg;
|
||
|
|
||
|
spin_lock_init(&ahcd->lock);
|
||
|
INIT_LIST_HEAD(&ahcd->async);
|
||
|
|
||
|
hcd->product_desc = "ADM5120 HCD";
|
||
|
|
||
|
err = usb_add_hcd(hcd, irq, IRQF_DISABLED);
|
||
|
if (err) {
|
||
|
printk(KERN_DEBUG PFX "unable to add hcd\n");
|
||
|
goto out_dev;
|
||
|
}
|
||
|
|
||
|
return 0;
|
||
|
|
||
|
out_dev:
|
||
|
usb_put_hcd(hcd);
|
||
|
out_unmap:
|
||
|
iounmap(data_reg);
|
||
|
out_mem:
|
||
|
release_mem_region(data->start, resource_len(data));
|
||
|
out:
|
||
|
return err;
|
||
|
}
|
||
|
|
||
|
#ifdef CONFIG_PM
|
||
|
static int adm5120hcd_suspend(struct platform_device *pdev, pm_message_t state)
|
||
|
{
|
||
|
pdev->dev.power.power_state = state;
|
||
|
mdelay(1);
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static int adm5120hcd_resume(struct platform_device *pdev, pm_message_t state)
|
||
|
{
|
||
|
pdev->dev.power.power_state = PMSG_ON;
|
||
|
mdelay(1);
|
||
|
return 0;
|
||
|
}
|
||
|
#else
|
||
|
#define adm5120hcd_suspend NULL
|
||
|
#define adm5120hcd_resume NULL
|
||
|
#endif
|
||
|
|
||
|
static int __init_or_module adm5120hcd_remove(struct platform_device *pdev)
|
||
|
{
|
||
|
struct usb_hcd *hcd = platform_get_drvdata(pdev);
|
||
|
struct admhcd *ahcd;
|
||
|
|
||
|
if (!hcd)
|
||
|
return 0;
|
||
|
ahcd = hcd_to_admhcd(hcd);
|
||
|
usb_remove_hcd(hcd);
|
||
|
|
||
|
usb_put_hcd(hcd);
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static struct platform_driver adm5120hcd_driver = {
|
||
|
.probe = adm5120hcd_probe,
|
||
|
.remove = adm5120hcd_remove,
|
||
|
.suspend = adm5120hcd_suspend,
|
||
|
.remove = adm5120hcd_resume,
|
||
|
.driver = {
|
||
|
.name = (char *)hcd_name,
|
||
|
.owner = THIS_MODULE,
|
||
|
},
|
||
|
};
|
||
|
|
||
|
static int __init adm5120hcd_init(void)
|
||
|
{
|
||
|
int ret;
|
||
|
|
||
|
if (usb_disabled()) {
|
||
|
printk(KERN_DEBUG PFX "USB support is disabled\n");
|
||
|
return -ENODEV;
|
||
|
}
|
||
|
|
||
|
if (mips_machgroup != MACH_GROUP_ADM5120) {
|
||
|
printk(KERN_DEBUG PFX "unsupported machine group\n");
|
||
|
return -ENODEV;
|
||
|
}
|
||
|
|
||
|
ret = platform_driver_register(&adm5120hcd_driver);
|
||
|
if (ret == 0)
|
||
|
printk(KERN_INFO PFX "registered\n");
|
||
|
|
||
|
return ret;
|
||
|
}
|
||
|
|
||
|
static void __exit adm5120hcd_exit(void)
|
||
|
{
|
||
|
platform_driver_unregister(&adm5120hcd_driver);
|
||
|
printk(KERN_INFO PFX "driver unregistered\n");
|
||
|
}
|
||
|
|
||
|
module_init(adm5120hcd_init);
|
||
|
module_exit(adm5120hcd_exit);
|