mirror of https://github.com/hak5/openwrt-owl.git
69 lines
2.1 KiB
Diff
69 lines
2.1 KiB
Diff
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From: Florian Fainelli <f.fainelli@gmail.com>
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Date: Fri, 20 Jan 2017 12:36:34 -0800
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Subject: [PATCH] net: phy: bcm7xxx: Implement EGPHY workaround for 7278
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Implement the HW design team recommended workaround in for 7278. Since
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the GPHY now returns its revision information in MII_PHYS_ID[23] we need
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to check whether the revision provided in flags is 0 or not.
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Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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--- a/drivers/net/phy/bcm7xxx.c
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+++ b/drivers/net/phy/bcm7xxx.c
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@@ -163,12 +163,43 @@ static int bcm7xxx_28nm_e0_plus_afe_conf
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return 0;
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}
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+static int bcm7xxx_28nm_a0_patch_afe_config_init(struct phy_device *phydev)
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+{
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+ /* +1 RC_CAL codes for RL centering for both LT and HT conditions */
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+ bcm_phy_write_misc(phydev, AFE_RXCONFIG_2, 0xd003);
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+
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+ /* Cut master bias current by 2% to compensate for RC_CAL offset */
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+ bcm_phy_write_misc(phydev, DSP_TAP10, 0x791b);
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+
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+ /* Improve hybrid leakage */
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+ bcm_phy_write_misc(phydev, AFE_HPF_TRIM_OTHERS, 0x10e3);
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+
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+ /* Change rx_on_tune 8 to 0xf */
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+ bcm_phy_write_misc(phydev, 0x21, 0x2, 0x87f6);
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+
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+ /* Change 100Tx EEE bandwidth */
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+ bcm_phy_write_misc(phydev, 0x22, 0x2, 0x017d);
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+
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+ /* Enable ffe zero detection for Vitesse interoperability */
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+ bcm_phy_write_misc(phydev, 0x26, 0x2, 0x0015);
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+
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+ r_rc_cal_reset(phydev);
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+
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+ return 0;
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+}
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+
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static int bcm7xxx_28nm_config_init(struct phy_device *phydev)
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{
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u8 rev = PHY_BRCM_7XXX_REV(phydev->dev_flags);
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u8 patch = PHY_BRCM_7XXX_PATCH(phydev->dev_flags);
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int ret = 0;
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+ /* Newer devices have moved the revision information back into a
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+ * standard location in MII_PHYS_ID[23]
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+ */
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+ if (rev == 0)
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+ rev = phydev->phy_id & ~phydev->drv->phy_id_mask;
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+
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pr_info_once("%s: %s PHY revision: 0x%02x, patch: %d\n",
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phydev_name(phydev), phydev->drv->name, rev, patch);
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@@ -192,6 +223,9 @@ static int bcm7xxx_28nm_config_init(stru
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case 0x10:
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ret = bcm7xxx_28nm_e0_plus_afe_config_init(phydev);
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break;
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+ case 0x01:
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+ ret = bcm7xxx_28nm_a0_patch_afe_config_init(phydev);
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+ break;
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default:
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break;
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}
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